annotate Small_CPU/Src/spi.c @ 942:06aaccaf2e02 Evo_2_23

Power down gnss module during dive: The gnss modul will now be send to powerdown at the start of the dive. After end of dive the module returns to normal operation. For development / test purpose a new simulated dive profile has been added.
author Ideenmodellierer
date Mon, 16 Dec 2024 19:09:00 +0100
parents 8f3a8c85a6c4
children
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1 /**
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2 ******************************************************************************
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3 * @file spi.c
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4 * @author heinrichs weikamp gmbh
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5 * @version V0.0.1
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6 * @date 16-Sept-2014
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7 * @brief Source code for spi control
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8 *
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9 @verbatim
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10 ==============================================================================
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11 ##### How to use #####
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12 ==============================================================================
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13 @endverbatim
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14 ******************************************************************************
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15 * @attention
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16 *
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17 * <h2><center>&copy; COPYRIGHT(c) 2014 heinrichs weikamp</center></h2>
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18 *
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19 ******************************************************************************
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20 */
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22 /* Includes ------------------------------------------------------------------*/
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23
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24 #include "global_constants.h"
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25 #include "spi.h"
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26 #include "dma.h"
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27 #include "batteryGasGauge.h"
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28 #include "pressure.h"
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29
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30 //#include "gpio.h"
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32 /* USER CODE BEGIN 0 */
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33 #include "scheduler.h"
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34
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35 #ifdef DEBUG_GPIO
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36 extern void GPIO_new_DEBUG_LOW(void);
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37 extern void GPIO_new_DEBUG_HIGH(void);
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38 #endif
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39
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40 uint8_t data_error = 0;
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41 uint32_t data_error_time = 0;
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42 uint8_t SPIDataRX = 0; /* Flag to signal that SPI RX callback has been triggered */
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44 static void SPI_Error_Handler(void);
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45
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46 /* USER CODE END 0 */
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47
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48 static uint8_t SPI_check_header_and_footer_ok(void);
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49 static uint8_t DataEX_check_header_and_footer_shifted(void);
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50
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51 SPI_HandleTypeDef hspi1;
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52 SPI_HandleTypeDef hspi3;
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53
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54 DMA_HandleTypeDef hdma_tx;
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55 DMA_HandleTypeDef hdma_rx;
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56
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57 // SPI3 init function
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58 void MX_SPI3_Init(void) {
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59 hspi3.Instance = SPI3;
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60 hspi3.Init.Mode = SPI_MODE_MASTER;
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61 hspi3.Init.Direction = SPI_DIRECTION_2LINES;
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62 hspi3.Init.DataSize = SPI_DATASIZE_8BIT;
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63 hspi3.Init.CLKPolarity = SPI_POLARITY_HIGH;
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64 hspi3.Init.CLKPhase = SPI_PHASE_1EDGE;
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65 hspi3.Init.NSS = SPI_NSS_SOFT;
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66 hspi3.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
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67 hspi3.Init.FirstBit = SPI_FIRSTBIT_MSB;
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68 hspi3.Init.TIMode = SPI_TIMODE_DISABLED;
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69 hspi3.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
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70 hspi3.Init.CRCPolynomial = 7;
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71 HAL_SPI_Init(&hspi3);
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72 }
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73
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74 void MX_SPI3_DeInit(void) {
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75 HAL_SPI_DeInit(&hspi3);
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76 }
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77
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78 uint8_t SPI3_ButtonAdjust(uint8_t *arrayInput, uint8_t *arrayOutput) {
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79 HAL_StatusTypeDef status;
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80 uint8_t answer[10];
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81 uint8_t rework[10];
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83 rework[0] = 0xFF;
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84 for (int i = 0; i < 3; i++) {
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85 // limiter
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86 if (arrayInput[i] == 0xFF)
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87 arrayInput[i] = 0xFE;
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88 if (arrayInput[i] >= 15) {
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89 // copy - ausl�se-schwelle
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90 rework[i + 1] = arrayInput[i];
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91 // wieder-scharf-schalte-schwelle
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92 rework[i + 3 + 1] = arrayInput[i] - 10;
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93 } else if (arrayInput[i] >= 10) {
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94 // copy - ausl�se-schwelle
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95 rework[i + 1] = arrayInput[i];
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96 // wieder-scharf-schalte-schwelle
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97 rework[i + 3 + 1] = arrayInput[i] - 5;
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98 } else {
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99 // copy - ausl�se-schwelle
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100 rework[i + 1] = 7;
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101 // wieder-scharf-schalte-schwelle
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102 rework[i + 3 + 1] = 6;
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103 }
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104 }
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105
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106 status = HAL_OK; /* = 0 */
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107 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
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108 for (int i = 0; i < 7; i++) {
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109 HAL_Delay(10);
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110 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_RESET);
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111 HAL_Delay(10);
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112 status += HAL_SPI_TransmitReceive(&hspi3, &rework[i], &answer[i], 1,
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113 20);
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114 HAL_Delay(10);
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115 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
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116 }
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117
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118 if (status == HAL_OK) {
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119 for (int i = 0; i < 3; i++) {
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120 arrayOutput[i] = answer[i + 2]; // first not, return of 0xFF not
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121 }
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122 return 1;
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123 } else
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124
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125 return 0;
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126 }
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127
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128 // SPI5 init function
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129 void MX_SPI1_Init(void) {
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130 hspi1.Instance = SPI1;
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131 hspi1.Init.Mode = SPI_MODE_SLAVE;
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132 hspi1.Init.Direction = SPI_DIRECTION_2LINES;
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133 hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
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134 hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
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135 hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
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136 hspi1.Init.NSS = SPI_NSS_HARD_INPUT; //SPI_NSS_SOFT;
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137 hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
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138 hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
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139 hspi1.Init.TIMode = SPI_TIMODE_DISABLED;
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140 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; //_DISABLED; _ENABLED;
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141 hspi1.Init.CRCPolynomial = 7;
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142 HAL_SPI_Init(&hspi1);
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143 }
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144
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145 void MX_SPI_DeInit(void) {
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146 HAL_SPI_DeInit(&hspi1);
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147 }
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148
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149 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) {
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150
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151 GPIO_InitTypeDef GPIO_InitStruct;
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152
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153 if (hspi->Instance == SPI1) {
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154 SPIDataRX = 0;
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155 // Peripheral clock enable
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156 __SPI1_CLK_ENABLE();
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157 __GPIOA_CLK_ENABLE();
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158 //SPI1 GPIO Configuration
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159 //PA4 ------> SPI1_CS
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160 //PA5 ------> SPI1_SCK
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161 //PA6 ------> SPI1_MISO
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162 //PA7 ------> SPI1_MOSI
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163
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164 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
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165 // GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
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166 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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167 GPIO_InitStruct.Pull = GPIO_PULLUP;
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168 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* Decision is based on errata which recommends FAST for GPIO at 90Mhz */
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169 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
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170 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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171
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172 //##-3- Configure the DMA streams ##########################################
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173 // Configure the DMA handler for Transmission process
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174 hdma_tx.Instance = DMA2_Stream3;
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175 hdma_tx.Init.Channel = DMA_CHANNEL_3;
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176 hdma_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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177 hdma_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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178 hdma_tx.Init.MemInc = DMA_MINC_ENABLE;
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179 hdma_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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180 hdma_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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181 hdma_tx.Init.Mode = DMA_NORMAL;
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182 hdma_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
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183 hdma_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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184 hdma_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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185 hdma_tx.Init.MemBurst = DMA_MBURST_INC4;
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186 hdma_tx.Init.PeriphBurst = DMA_PBURST_INC4;
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187
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188 HAL_DMA_Init(&hdma_tx);
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189
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190 // Associate the initialized DMA handle to the the SPI handle
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191 __HAL_LINKDMA(hspi, hdmatx, hdma_tx);
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192
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193 // Configure the DMA handler for Transmission process
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194 hdma_rx.Instance = DMA2_Stream0;
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195 hdma_rx.Init.Channel = DMA_CHANNEL_3;
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196 hdma_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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197 hdma_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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198 hdma_rx.Init.MemInc = DMA_MINC_ENABLE;
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199 hdma_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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200 hdma_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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201 hdma_rx.Init.Mode = DMA_NORMAL;
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202 hdma_rx.Init.Priority = DMA_PRIORITY_HIGH;
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203 hdma_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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204 hdma_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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205 hdma_rx.Init.MemBurst = DMA_MBURST_INC4;
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206 hdma_rx.Init.PeriphBurst = DMA_PBURST_INC4;
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207
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208 HAL_DMA_Init(&hdma_rx);
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209
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210 // Associate the initialized DMA handle to the the SPI handle
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211 __HAL_LINKDMA(hspi, hdmarx, hdma_rx);
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212
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213 //##-4- Configure the NVIC for DMA #########################################
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214 //NVIC configuration for DMA transfer complete interrupt (SPI3_RX)
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215 HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 1, 0);
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216 HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
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217
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218 // NVIC configuration for DMA transfer complete interrupt (SPI1_TX)
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219 HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 1, 1);
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220 HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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221 } else if (hspi->Instance == SPI3) {
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222 __GPIOC_CLK_ENABLE();
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223 __SPI3_CLK_ENABLE();
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224
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225 //SPI1 GPIO Configuration
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226 //PC10 ------> SPI3_SCK
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227 //PC11 ------> SPI3_MISO
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228 //PC12 ------> SPI3_MOSI
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229 //PA15 ------> SPI3_NSS (official)
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230 //PC9 ------> SPI3_NSS (hw)
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231
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232 GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
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233 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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234 GPIO_InitStruct.Pull = GPIO_PULLUP;
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235 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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236 GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
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237 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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238
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239 GPIO_InitStruct.Pin = GPIO_PIN_9;
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240 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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241 GPIO_InitStruct.Pull = GPIO_PULLUP;
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242 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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243 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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244
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245 HAL_GPIO_WritePin(GPIOC, GPIO_PIN_9, GPIO_PIN_SET);
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246 }
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247 }
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248
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249 void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) {
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250 if (hspi->Instance == SPI1) {
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251 __SPI1_FORCE_RESET();
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252 __SPI1_RELEASE_RESET();
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253
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254 //SPI1 GPIO Configuration
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255 //PA5 ------> SPI1_SCK
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256 //PA6 ------> SPI1_MISO
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257 //PA7 ------> SPI1_MOSI
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258
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259 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
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260
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261 HAL_DMA_DeInit(&hdma_tx);
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262 HAL_DMA_DeInit(&hdma_rx);
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263
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264 HAL_NVIC_DisableIRQ(DMA2_Stream3_IRQn);
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265 HAL_NVIC_DisableIRQ(DMA2_Stream0_IRQn);
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266 } else if (hspi->Instance == SPI3) {
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267 __SPI3_FORCE_RESET();
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268 __SPI3_RELEASE_RESET();
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269
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270 //SPI1 GPIO Configuration
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271 //PC10 ------> SPI3_SCK
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272 //PC11 ------> SPI3_MISO
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273 //PC12 ------> SPI3_MOSI
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274 //PA15 ------> SPI3_NSS (official)
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275 //PC9 ------> SPI3_NSS (hw)
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276 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12);
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277 }
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278 }
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279
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280 void SPI_synchronize_with_Master(void) {
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281 #ifdef USE_OLD_SYNC_METHOD
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282 GPIO_InitTypeDef GPIO_InitStruct;
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283 //
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284 __GPIOA_CLK_ENABLE();
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285 /**SPI1 GPIO Configuration
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286 PA5 ------> SPI1_SCK
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287 */
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288 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
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289 GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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290 GPIO_InitStruct.Pull = GPIO_PULLUP;
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291 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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292 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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293 //
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294 HAL_Delay(10);
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295 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_4) == 0);
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296 HAL_Delay(10);
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297 while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_5) == 1);
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298 HAL_Delay(50);
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299 #endif
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300 }
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301
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302 void SPI_Start_single_TxRx_with_Master(void) {
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303 static uint8_t DevicedataDelayCnt = 10;
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304 static uint8_t DeviceDataPending = 0;
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305 uint8_t * pOutput;
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306 HAL_StatusTypeDef retval;
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307
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308 if ((global.dataSendToSlave.getDeviceDataNow) || (DeviceDataPending))
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309 {
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310 if(((DevicedataDelayCnt == 0) || (((get_voltage() != 6.0) && (get_temperature() != 0.0)
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311 && global.deviceDataSendToMaster.hw_Info.checkCompass)
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312 && global.deviceDataSendToMaster.hw_Info.checkADC))) /* devicedata complete? */
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313 {
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314 global.dataSendToSlave.getDeviceDataNow = 0;
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315 DeviceDataPending = 0;
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
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diff changeset
316 pOutput = (uint8_t*) &(global.deviceDataSendToMaster);
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
317 }
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
318 else
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
319 {
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
320 DeviceDataPending = 1;
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
321 DevicedataDelayCnt--;
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
322 pOutput = (uint8_t*) &(global.dataSendToMaster);
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
323 }
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
324
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
325 }
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
326 else
2fc08a0d1ec3 Bugfix invalid voltage / temperatur after coldstart:
ideenmodellierer
parents: 277
diff changeset
327 {
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
328 pOutput = (uint8_t*) &(global.dataSendToMaster);
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
329 }
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
330 retval = HAL_SPI_TransmitReceive_DMA(&hspi1, pOutput,(uint8_t*) &(global.dataSendToSlave), EXCHANGE_BUFFERSIZE);
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
331 if ( retval!= HAL_OK) {
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
332 SPI_Error_Handler();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
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333 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
334 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
335
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
336 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
337 /* restart SPI */
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
338 if (hspi == &hspi1)
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
339 {
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
340 if(SPI_check_header_and_footer_ok()) /* process timestamp provided by main */
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
341 {
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
342 Scheduler_SyncToSPI(global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_TX_TICK]);
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
343 }
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
344 else
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
345 {
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
346 Scheduler_SyncToSPI(0); /* => no async will be calculated */
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
347 }
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
348
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
349 SPIDataRX = 1;
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
350
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
351 /* stop data exchange? */
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
352 if (global.mode == MODE_SHUTDOWN) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
353 global.dataSendToSlavePending = 0;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
354 global.dataSendToSlaveIsValid = 1;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
355 global.dataSendToSlaveIsNotValidCount = 0;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
356 }
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
357 }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
358 }
82
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
359
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
360 uint8_t SPI_Evaluate_RX_Data()
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
361 {
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
362 uint8_t resettimeout = 1;
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
363 uint8_t ret = SPIDataRX;
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
364
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
365 if ((global.mode != MODE_SHUTDOWN) && ( global.mode != MODE_SLEEP) && (SPIDataRX))
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
366 {
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
367 SPIDataRX = 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
368 /* data consistent? */
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
369 if (SPI_check_header_and_footer_ok()) {
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
370 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_RX_STATE] = SPI_RX_STATE_OK;
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
371 // GPIO_new_DEBUG_HIGH(); //For debug.
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
372 global.dataSendToSlaveIsValid = 1;
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
373 global.dataSendToSlaveIsNotValidCount = 0;
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
374 /* Master signal a data shift outside of his control => reset own DMA and resync */
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
375 if(global.dataSendToSlave.header.checkCode[SPI_HEADER_INDEX_RX_STATE] == SPI_RX_STATE_SHIFTED)
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
376 {
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
377 HAL_SPI_Abort_IT(&hspi1);
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
378 Scheduler_Request_sync_with_SPI(SPI_SYNC_METHOD_HARD);
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
379 }
277
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
380 else
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
381 {
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
382 }
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
383 SPI_Start_single_TxRx_with_Master();
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
384 }
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
385 else
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
386 {
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
387 // GPIO_new_DEBUG_LOW(); //For debug.
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
388 global.dataSendToSlaveIsValid = 0;
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
389 global.dataSendToSlaveIsNotValidCount++;
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
390 if(DataEX_check_header_and_footer_shifted())
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
391 {
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
392
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
393 /* Reset own DMA */
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
394 if ((global.dataSendToSlaveIsNotValidCount % 10) == 1) //% 10
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
395 {
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
396 HAL_SPI_Abort_IT(&hspi1); /* reset DMA only once */
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
397 }
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
398 /* Signal problem to master */
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
399 if ((global.dataSendToSlaveIsNotValidCount ) >= 2)
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
400 {
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
401 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_RX_STATE] = SPI_RX_STATE_SHIFTED;
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
402 }
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
403 }
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
404 else /* handle received data as if no data would have been received */
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
405 {
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
406 global.dataSendToMaster.header.checkCode[SPI_HEADER_INDEX_RX_STATE] = SPI_RX_STATE_OFFLINE;
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
407 resettimeout = 0;
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
408 }
277
580822b5d3d1 Rework SPI error handling.
ideenmodellierer
parents: 264
diff changeset
409 HAL_SPI_TransmitReceive_DMA(&hspi1,(uint8_t*) &(global.dataSendToMaster),(uint8_t*) &(global.dataSendToSlave), EXCHANGE_BUFFERSIZE);
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
410 }
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
411
726
8f3a8c85a6c4 Bugfix data synchronization after RTE start:
Ideenmodellierer
parents: 662
diff changeset
412 if(global.dataSendToSlaveIsValid)
8f3a8c85a6c4 Bugfix data synchronization after RTE start:
Ideenmodellierer
parents: 662
diff changeset
413 {
8f3a8c85a6c4 Bugfix data synchronization after RTE start:
Ideenmodellierer
parents: 662
diff changeset
414 global.dataSendToMaster.power_on_reset = 0;
8f3a8c85a6c4 Bugfix data synchronization after RTE start:
Ideenmodellierer
parents: 662
diff changeset
415 global.deviceDataSendToMaster.power_on_reset = 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
416
726
8f3a8c85a6c4 Bugfix data synchronization after RTE start:
Ideenmodellierer
parents: 662
diff changeset
417 scheduleSpecial_Evaluate_DataSendToSlave();
8f3a8c85a6c4 Bugfix data synchronization after RTE start:
Ideenmodellierer
parents: 662
diff changeset
418 }
136
6ae8ba5683d6 Introduces abort of communication in case of a out of sync DMA transfer
Ideenmodellierer
parents: 124
diff changeset
419
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
420 if(resettimeout)
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
421 {
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
422 global.check_sync_not_running = 0;
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
423 }
208
9fc06e1e0f66 Update SPI error display and handling
ideenmodellierer
parents: 148
diff changeset
424 }
264
b3685fbada3b Sync to Main 100ms time stamp & added Reinitialization of globals after startup
ideenmodellierer
parents: 239
diff changeset
425 return ret;
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
426 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
427
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
428 static uint8_t SPI_check_header_and_footer_ok(void) {
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
429 if (global.dataSendToSlave.header.checkCode[0] != 0xBB)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
430 return 0;
148
ee744c7160ce Use SPI TX callback to synchronize to main CPU
Ideenmodellierer
parents: 143
diff changeset
431 #ifdef USE_OLD_HEADER_FORMAT
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
432 if (global.dataSendToSlave.header.checkCode[1] != 0x01)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
433 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
434 if (global.dataSendToSlave.header.checkCode[2] != 0x01)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
435 return 0;
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
436 #endif
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
437 if (global.dataSendToSlave.header.checkCode[3] != 0xBB)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
438 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
439 if (global.dataSendToSlave.footer.checkCode[0] != 0xF4)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
440 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
441 if (global.dataSendToSlave.footer.checkCode[1] != 0xF3)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
442 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
443 if (global.dataSendToSlave.footer.checkCode[2] != 0xF2)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
444 return 0;
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
445 if (global.dataSendToSlave.footer.checkCode[3] != 0xF1)
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
446 return 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
447
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
448 return 1;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
449 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
450
143
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
451
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
452 /* Check if there is an empty frame providec by RTE (all 0) or even no data provided by RTE (all 0xFF)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
453 * If that is not the case the DMA is somehow not in sync
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
454 */
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
455 uint8_t DataEX_check_header_and_footer_shifted()
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
456 {
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
457 uint8_t ret = 1;
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
458 if((global.dataSendToSlave.footer.checkCode[0] == 0x00)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
459 && (global.dataSendToSlave.footer.checkCode[1] == 0x00)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
460 && (global.dataSendToSlave.footer.checkCode[2] == 0x00)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
461 && (global.dataSendToSlave.footer.checkCode[3] == 0x00)) { ret = 0; }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
462
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
463 if((global.dataSendToSlave.footer.checkCode[0] == 0xff)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
464 && (global.dataSendToSlave.footer.checkCode[1] == 0xff)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
465 && (global.dataSendToSlave.footer.checkCode[2] == 0xff)
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
466 && (global.dataSendToSlave.footer.checkCode[3] == 0xff)) { ret = 0; }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
467
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
468 return ret;
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
469 }
466c8d9c5e43 Introduced Token for SPI data exchange
Ideenmodellierer
parents: 136
diff changeset
470
89
ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
parents: 88
diff changeset
471 static void SPI_Error_Handler(void) {
82
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
472 //The device is locks. Hard to recover.
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
473 // while(1)
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
parents: 63
diff changeset
474 // {
a6f0881074a4 +i2c analog noise filtering
Dmitry Romanov <kitt@bk.ru>
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475 // }
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476 }
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477
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478 /**
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ff7775cc34c4 temp! full cyclic SPI
Dmitry Romanov <kitt@bk.ru>
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479 * @}
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480 */
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481
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482 /**
89
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Dmitry Romanov <kitt@bk.ru>
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483 * @}
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484 */
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485
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486 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/