Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pcd.h @ 942:06aaccaf2e02 Evo_2_23
Power down gnss module during dive:
The gnss modul will now be send to powerdown at the start of the dive. After end of dive the module returns to normal operation.
For development / test purpose a new simulated dive profile has been added.
author | Ideenmodellierer |
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date | Mon, 16 Dec 2024 19:09:00 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_pcd.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of PCD HAL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_HAL_PCD_H |
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38 #define __STM32F4xx_HAL_PCD_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
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44 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
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45 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ |
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46 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
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47 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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48 /* Includes ------------------------------------------------------------------*/ |
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49 #include "stm32f4xx_ll_usb.h" |
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50 |
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51 /** @addtogroup STM32F4xx_HAL_Driver |
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52 * @{ |
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53 */ |
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54 |
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55 /** @addtogroup PCD |
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56 * @{ |
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57 */ |
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58 |
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59 /* Exported types ------------------------------------------------------------*/ |
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60 /** @defgroup PCD_Exported_Types PCD Exported Types |
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61 * @{ |
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62 */ |
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63 |
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64 /** |
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65 * @brief PCD State structure definition |
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66 */ |
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67 typedef enum |
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68 { |
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69 HAL_PCD_STATE_RESET = 0x00U, |
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70 HAL_PCD_STATE_READY = 0x01U, |
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71 HAL_PCD_STATE_ERROR = 0x02U, |
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72 HAL_PCD_STATE_BUSY = 0x03U, |
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73 HAL_PCD_STATE_TIMEOUT = 0x04U |
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74 } PCD_StateTypeDef; |
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75 |
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76 #ifdef USB_OTG_GLPMCFG_LPMEN |
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77 /* Device LPM suspend state */ |
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78 typedef enum |
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79 { |
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80 LPM_L0 = 0x00U, /* on */ |
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81 LPM_L1 = 0x01U, /* LPM L1 sleep */ |
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82 LPM_L2 = 0x02U, /* suspend */ |
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83 LPM_L3 = 0x03U /* off */ |
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84 }PCD_LPM_StateTypeDef; |
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85 #endif /* USB_OTG_GLPMCFG_LPMEN */ |
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86 |
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87 typedef USB_OTG_GlobalTypeDef PCD_TypeDef; |
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88 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; |
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89 typedef USB_OTG_EPTypeDef PCD_EPTypeDef ; |
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90 |
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91 /** |
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92 * @brief PCD Handle Structure definition |
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93 */ |
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94 typedef struct |
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95 { |
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96 PCD_TypeDef *Instance; /*!< Register base address */ |
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97 PCD_InitTypeDef Init; /*!< PCD required parameters */ |
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98 PCD_EPTypeDef IN_ep[16U]; /*!< IN endpoint parameters */ |
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99 PCD_EPTypeDef OUT_ep[16U]; /*!< OUT endpoint parameters */ |
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100 HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
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101 __IO PCD_StateTypeDef State; /*!< PCD communication state */ |
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102 uint32_t Setup[12U]; /*!< Setup packet buffer */ |
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103 #ifdef USB_OTG_GLPMCFG_LPMEN |
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104 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ |
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105 uint32_t BESL; |
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106 uint32_t lpm_active; /*!< Enable or disable the Link Power Management . |
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107 This parameter can be set to ENABLE or DISABLE */ |
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108 #endif /* USB_OTG_GLPMCFG_LPMEN */ |
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109 #ifdef USB_OTG_GCCFG_BCDEN |
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110 uint32_t battery_charging_active; /*!< Enable or disable Battery charging. |
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111 This parameter can be set to ENABLE or DISABLE */ |
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112 #endif /* USB_OTG_GCCFG_BCDEN */ |
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113 void *pData; /*!< Pointer to upper stack Handler */ |
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114 } PCD_HandleTypeDef; |
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115 |
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116 /** |
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117 * @} |
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118 */ |
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119 |
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120 /* Include PCD HAL Extension module */ |
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121 #include "stm32f4xx_hal_pcd_ex.h" |
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122 |
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123 /* Exported constants --------------------------------------------------------*/ |
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124 /** @defgroup PCD_Exported_Constants PCD Exported Constants |
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125 * @{ |
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126 */ |
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127 |
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128 /** @defgroup PCD_Speed PCD Speed |
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129 * @{ |
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130 */ |
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131 #define PCD_SPEED_HIGH 0U |
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132 #define PCD_SPEED_HIGH_IN_FULL 1U |
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133 #define PCD_SPEED_FULL 2U |
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134 /** |
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135 * @} |
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136 */ |
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137 |
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138 /** @defgroup PCD_PHY_Module PCD PHY Module |
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139 * @{ |
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140 */ |
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141 #define PCD_PHY_ULPI 1U |
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142 #define PCD_PHY_EMBEDDED 2U |
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143 /** |
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144 * @} |
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145 */ |
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146 |
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147 /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value |
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148 * @{ |
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149 */ |
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150 #ifndef USBD_HS_TRDT_VALUE |
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151 #define USBD_HS_TRDT_VALUE 9U |
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152 #endif /* USBD_HS_TRDT_VALUE */ |
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153 #ifndef USBD_FS_TRDT_VALUE |
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154 #define USBD_FS_TRDT_VALUE 5U |
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155 #endif /* USBD_FS_TRDT_VALUE */ |
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156 /** |
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157 * @} |
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158 */ |
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159 |
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160 /** |
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161 * @} |
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162 */ |
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163 |
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164 /* Exported macros -----------------------------------------------------------*/ |
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165 /** @defgroup PCD_Exported_Macros PCD Exported Macros |
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166 * @brief macros to handle interrupts and specific clock configurations |
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167 * @{ |
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168 */ |
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169 #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) |
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170 #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) |
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171 |
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172 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
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173 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) |
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174 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) |
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175 |
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176 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ |
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177 ~(USB_OTG_PCGCCTL_STOPCLK) |
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178 |
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179 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK |
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180 |
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181 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10U) |
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182 |
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183 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U |
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184 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU |
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185 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U |
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186 |
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187 #define USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE 0x08U |
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188 #define USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE 0x0CU |
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189 #define USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U |
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190 |
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191 #define USB_OTG_HS_WAKEUP_EXTI_LINE 0x00100000U /*!< External interrupt line 20 Connected to the USB HS EXTI Line */ |
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192 #define USB_OTG_FS_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB FS EXTI Line */ |
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193 |
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194 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= (USB_OTG_HS_WAKEUP_EXTI_LINE) |
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195 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE) |
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196 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_HS_WAKEUP_EXTI_LINE) |
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197 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (USB_OTG_HS_WAKEUP_EXTI_LINE) |
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198 |
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199 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\ |
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200 EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\ |
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201 }while(0U) |
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202 |
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203 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_HS_WAKEUP_EXTI_LINE);\ |
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204 EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\ |
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205 }while(0U) |
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206 |
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207 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\ |
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208 EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\ |
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209 EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\ |
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210 EXTI->FTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\ |
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211 }while(0U) |
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212 |
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213 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE) |
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214 |
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215 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE |
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216 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) |
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217 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE) |
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218 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE |
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219 |
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220 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ |
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221 EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ |
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222 }while(0U) |
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223 |
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224 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\ |
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225 EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ |
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226 }while(0U) |
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227 |
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228 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ |
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229 EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ |
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230 EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ |
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231 EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ |
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232 }while(0U) |
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233 |
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234 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE) |
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235 /** |
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236 * @} |
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237 */ |
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238 |
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239 /* Exported functions --------------------------------------------------------*/ |
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240 /** @addtogroup PCD_Exported_Functions PCD Exported Functions |
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241 * @{ |
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242 */ |
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243 |
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244 /* Initialization/de-initialization functions ********************************/ |
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245 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions |
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246 * @{ |
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247 */ |
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248 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
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249 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); |
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250 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
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251 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
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252 /** |
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253 * @} |
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254 */ |
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255 |
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256 /* I/O operation functions ***************************************************/ |
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257 /* Non-Blocking mode: Interrupt */ |
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258 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions |
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259 * @{ |
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260 */ |
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261 /* Non-Blocking mode: Interrupt */ |
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262 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
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263 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
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264 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
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265 |
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266 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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267 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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268 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
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269 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
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270 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
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271 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
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272 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
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273 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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274 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
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275 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
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276 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
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277 /** |
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278 * @} |
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279 */ |
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280 |
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281 /* Peripheral Control functions **********************************************/ |
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282 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions |
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283 * @{ |
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284 */ |
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285 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
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286 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
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287 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
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288 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
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289 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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290 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
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291 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
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292 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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293 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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294 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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295 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
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296 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
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297 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
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298 /** |
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299 * @} |
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300 */ |
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301 |
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302 /* Peripheral State functions ************************************************/ |
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303 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions |
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304 * @{ |
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305 */ |
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306 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); |
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307 /** |
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308 * @} |
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309 */ |
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310 |
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311 /** |
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312 * @} |
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313 */ |
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314 |
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315 /* Private macros ------------------------------------------------------------*/ |
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316 /** @defgroup PCD_Private_Macros PCD Private Macros |
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317 * @{ |
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318 */ |
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319 |
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320 /** |
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321 * @} |
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322 */ |
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323 |
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324 /** |
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325 * @} |
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326 */ |
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327 |
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328 /** |
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329 * @} |
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330 */ |
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331 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || |
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332 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx || |
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333 STM32F412Vx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
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334 #ifdef __cplusplus |
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335 } |
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336 #endif |
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337 |
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338 |
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339 #endif /* __STM32F4xx_HAL_PCD_H */ |
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340 |
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341 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |