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diff code_part1/OSTC_code_asm_part1/start.asm @ 463:86fc79735d3b

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Experimental 32MHz mode
author heinrichsweikamp
date Tue, 27 Sep 2011 22:23:12 +0200
parents af2894e5cda4
children 915e0d38edec
line wrap: on
line diff
--- a/code_part1/OSTC_code_asm_part1/start.asm	Sun Sep 25 10:30:53 2011 +0200
+++ b/code_part1/OSTC_code_asm_part1/start.asm	Tue Sep 27 22:23:12 2011 +0200
@@ -395,9 +395,8 @@
 	bra		start3					; continue with normal start
 
 init:						
-	movlw	b'01101100'		; 4MHz (x4 PLL)
+	movlw	OSCCON_VALUE
 	movwf	OSCCON
-
 	movlw	b'00010001'		; I/O Ports
 	movwf	TRISA
 	clrf	PORTA
@@ -417,7 +416,7 @@
 	movlw	b'01000000'		; Bit6: PPL enable
 	movwf	OSCTUNE
 
-	movlw	b'00011111'		; Timer0
+	movlw	T0CON_VALUE		; Timer0
 	movwf	T0CON
 
 	movlw	b'00000111'		; Timer1
@@ -449,7 +448,8 @@
 	movwf	SSPCON1
 	movlw	b'00000000'
 	movwf	SSPCON2
-	movlw	d'8'			; 400kHz I2C clock @ 16MHz Fcy
+
+	movlw	SSPADD_VALUE	; I²C Speed
 	movwf	SSPADD
 
 	clrf	CCP1CON			; PWM Module off
@@ -468,7 +468,8 @@
 	movlw	b'00001000'
 	movwf	BAUDCON
 	clrf	SPBRGH
-	movlw	d'34'
+
+	movlw	SPBRG_VALUE
 	movwf	SPBRG
 	clrf	RCREG
 	clrf	PIR1