Mercurial > public > mk2
comparison code_part1/OSTC_code_asm_part1/eeprom_rs232.asm @ 0:96a35aeda5f2
Initial setup
| author | heinrichsweikamp |
|---|---|
| date | Tue, 12 Jan 2010 15:05:59 +0100 |
| parents | |
| children | 73014f788032 |
comparison
equal
deleted
inserted
replaced
| -1:000000000000 | 0:96a35aeda5f2 |
|---|---|
| 1 ; OSTC - diving computer code | |
| 2 ; Copyright (C) 2008 HeinrichsWeikamp GbR | |
| 3 | |
| 4 ; This program is free software: you can redistribute it and/or modify | |
| 5 ; it under the terms of the GNU General Public License as published by | |
| 6 ; the Free Software Foundation, either version 3 of the License, or | |
| 7 ; (at your option) any later version. | |
| 8 | |
| 9 ; This program is distributed in the hope that it will be useful, | |
| 10 ; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 ; GNU General Public License for more details. | |
| 13 | |
| 14 ; You should have received a copy of the GNU General Public License | |
| 15 ; along with this program. If not, see <http://www.gnu.org/licenses/>. | |
| 16 | |
| 17 | |
| 18 ; internal EEPROM and RS232 UART interface | |
| 19 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com | |
| 20 ; written: 02/01/06 | |
| 21 ; last updated: 090109 | |
| 22 ; known bugs: | |
| 23 ; ToDo: | |
| 24 | |
| 25 write_int_eeprom macro eeprom_address | |
| 26 movlw eeprom_address | |
| 27 call write_int_eeprom_1 | |
| 28 endm | |
| 29 | |
| 30 write_int_eeprom_1: | |
| 31 movwf EEADR | |
| 32 bra write_eeprom ; writes and "returns" after write | |
| 33 | |
| 34 read_int_eeprom macro eeprom_address | |
| 35 movlw eeprom_address | |
| 36 call read_int_eeprom_1 | |
| 37 endm | |
| 38 | |
| 39 read_int_eeprom_1: | |
| 40 movwf EEADR | |
| 41 bra read_eeprom ; reads and "returns" after write | |
| 42 | |
| 43 internal_eeprom_access_b1: ; accesses internal EEPROM BANK 1 via the UART | |
| 44 bcf internal_eeprom_write2 ; clear flag! | |
| 45 movlw d'1' | |
| 46 movwf EEADRH ;BANK1 | |
| 47 movlw "i" | |
| 48 bra internal_eeprom_access1 ; Continue with bank1 and bank0 common routines | |
| 49 | |
| 50 internal_eeprom_access_b0: ; accesses internal EEPROM BANK 0 via the UART | |
| 51 bcf internal_eeprom_write ; clear flag! | |
| 52 clrf EEADRH ; Bank0 | |
| 53 movlw "d" | |
| 54 ; bra internal_eeprom_access1 ; Continue with bank1 and bank0 common routines | |
| 55 | |
| 56 internal_eeprom_access1: | |
| 57 movwf TXREG ; Send command echo ("i" or "d") | |
| 58 bsf no_sensor_int ; No Sensor Interrupt | |
| 59 movlw d'4' | |
| 60 movwf EEADR | |
| 61 bcf PIE1,RCIE ; no interrupt for UART | |
| 62 bcf PIR1,RCIF ; clear flag | |
| 63 call set_LEDusb ; LEDusb ON | |
| 64 | |
| 65 internal_eeprom_access2: | |
| 66 rcall rs232_get_byte ; Get byte to write... | |
| 67 movff RCREG,EEDATA ; copy to write register | |
| 68 call set_LEDy ; show activity | |
| 69 | |
| 70 btfsc rs232_recieve_overflow ; overflow recieved? | |
| 71 bra internal_eeprom_access3 ; Yes, abort! | |
| 72 | |
| 73 rcall write_eeprom ; No, write one byte | |
| 74 call clear_LEDy | |
| 75 movff EEDATA,TXREG ; Send echo! | |
| 76 rcall rs232_wait_tx ; Wait for UART | |
| 77 incfsz EEADR,F ; Do until EEADR rolls to zero | |
| 78 bra internal_eeprom_access2 | |
| 79 internal_eeprom_access2a: | |
| 80 call clear_LEDusb ; LEDusb OFF | |
| 81 bcf PIR1,RCIF ; clear flag | |
| 82 bsf PIE1,RCIE ; re-enable interrupt for UART | |
| 83 clrf EEADRH ; Point to Bank0 again | |
| 84 bcf rs232_recieve_overflow ; Clear Flag | |
| 85 bcf no_sensor_int ; Renable Sensor Interrupt | |
| 86 goto restart | |
| 87 | |
| 88 internal_eeprom_access3: ; Overflow! Abort writing | |
| 89 movlw 0xFF | |
| 90 movwf TXREG ; Error Byte | |
| 91 bra internal_eeprom_access2a ; Quit | |
| 92 | |
| 93 read_eeprom: ; reads from internal eeprom | |
| 94 bcf EECON1,EEPGD | |
| 95 bcf EECON1,CFGS | |
| 96 bsf EECON1,RD | |
| 97 return | |
| 98 | |
| 99 write_eeprom: ; writes into internal eeprom | |
| 100 bcf EECON1,EEPGD | |
| 101 bcf EECON1,CFGS | |
| 102 bsf EECON1,WREN | |
| 103 | |
| 104 bcf INTCON,GIE ; even the RTC will be delayed for the next 5 instructions... | |
| 105 movlw 0x55 | |
| 106 movwf EECON2 | |
| 107 movlw 0xAA | |
| 108 movwf EECON2 | |
| 109 bsf EECON1,WR | |
| 110 bsf INTCON,GIE ; ...but the flag for the ISR routines were still set, so they will interrupt now! | |
| 111 | |
| 112 write_eep2: | |
| 113 btfsc EECON1,WR | |
| 114 bra write_eep2 ; wait about 4ms... | |
| 115 bcf EECON1,WREN | |
| 116 return | |
| 117 | |
| 118 | |
| 119 | |
| 120 ; RS232 Routines: | |
| 121 ;enable_rs232_19k2_tx: | |
| 122 ; bsf TRISC,6 ; TX Pin | |
| 123 ; movlw b'00100100' ; initialise serial port for 19200/8/N/1 BRGH=1 | |
| 124 ; movwf TXSTA | |
| 125 ; return | |
| 126 ; | |
| 127 ;disable_rs232_19k2_tx: | |
| 128 ; bcf TRISC,6 ; TX Pin | |
| 129 ; movlw b'00000100' ; Only receiver mode, BRGH=1 | |
| 130 ; movwf TXSTA | |
| 131 ; bsf PORTC,6 ; TX PIN | |
| 132 ; return | |
| 133 ; | |
| 134 ;enable_rs232_19k2: | |
| 135 ; bsf TRISC,6 ; TX Pin IO Ports must be input in order to activate the module | |
| 136 ; bsf TRISC,7 ; RX Pin | |
| 137 ; | |
| 138 ; movlw b'00100100' ; initialise serial port for 19200/8/N/1 BRGH=1 | |
| 139 ; movwf TXSTA | |
| 140 ; movlw b'10000000' | |
| 141 ; movwf RCSTA | |
| 142 ; movlw b'00001000' ; BRG16=1 | |
| 143 ; movwf BAUDCON | |
| 144 ; bsf RCSTA,CREN ; Enable | |
| 145 ; movlw d'0' | |
| 146 ; movwf SPBRGH | |
| 147 ; movlw d'207' ; Take care of the baud rate when changing Fosc! | |
| 148 ; movwf SPBRG | |
| 149 ; clrf RCREG | |
| 150 ; bcf PIE1,RCIE ; disable interrupt for RS232 | |
| 151 ; clrf PIR1 | |
| 152 ; return | |
| 153 ; | |
| 154 | |
| 155 enable_rs232: ;IO Ports must be input in order to activate the module | |
| 156 bsf TRISC,6 ; TX Pin | |
| 157 bsf TRISC,7 ; RX Pin | |
| 158 | |
| 159 movlw b'00100100' ; BRGH=1 | |
| 160 movwf TXSTA | |
| 161 movlw b'10010000' | |
| 162 movwf RCSTA | |
| 163 movlw b'00001000' | |
| 164 movwf BAUDCON | |
| 165 clrf SPBRGH | |
| 166 movlw d'34' ; Take care of the baud rate when changing Fosc! | |
| 167 movwf SPBRG | |
| 168 clrf RCREG | |
| 169 clrf PIR1 | |
| 170 bsf PIE1,RCIE ; enable interrupt for RS232 | |
| 171 return | |
| 172 | |
| 173 disable_rs232: | |
| 174 clrf TXSTA | |
| 175 clrf RCSTA | |
| 176 bcf PIE1,RCIE ; disable interrupt for RS232 | |
| 177 bcf TRISC,6 ; TX Pin | |
| 178 bcf TRISC,7 ; RX Pin | |
| 179 bcf PORTC,6 ; TX Pin | |
| 180 bcf PORTC,7 ; RX Pin | |
| 181 return | |
| 182 | |
| 183 rs232_wait_tx: | |
| 184 btfss RCSTA,SPEN ; Transmitter active? | |
| 185 return ; No, return! | |
| 186 nop | |
| 187 btfss TXSTA,TRMT ; RS232 Busy? | |
| 188 bra rs232_wait_tx ; yes, wait... | |
| 189 return ; Done. | |
| 190 | |
| 191 | |
| 192 rs232_get_byte: | |
| 193 bcf PIR1,RCIF ; clear flag | |
| 194 bcf rs232_recieve_overflow ; clear flag | |
| 195 clrf uart1_temp | |
| 196 rs232_get_byte2: | |
| 197 clrf uart2_temp | |
| 198 rs232_get_byte3: | |
| 199 btfsc PIR1,RCIF ; data arrived? | |
| 200 return ; data received | |
| 201 | |
| 202 nop ; Wait 1us * 255 * 255 = 65ms+x Timeout/Byte | |
| 203 nop | |
| 204 nop | |
| 205 nop | |
| 206 btfsc PIR1,RCIF ; data arrived? | |
| 207 return | |
| 208 | |
| 209 nop | |
| 210 nop | |
| 211 nop | |
| 212 nop | |
| 213 btfsc PIR1,RCIF ; data arrived? | |
| 214 return | |
| 215 | |
| 216 nop | |
| 217 nop | |
| 218 nop | |
| 219 nop | |
| 220 btfsc PIR1,RCIF ; data arrived? | |
| 221 return | |
| 222 nop | |
| 223 nop | |
| 224 nop | |
| 225 nop | |
| 226 btfsc PIR1,RCIF ; data arrived? | |
| 227 return | |
| 228 | |
| 229 decfsz uart2_temp,F | |
| 230 bra rs232_get_byte3 | |
| 231 decfsz uart1_temp,F | |
| 232 bra rs232_get_byte2 | |
| 233 ; timeout occoured (about 20ms) | |
| 234 bcf RCSTA,CREN ; Clear receiver status | |
| 235 bsf RCSTA,CREN | |
| 236 bsf rs232_recieve_overflow ; set flag | |
| 237 return ; and return anyway |
