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comparison code_part1/OSTC_code_asm_part1/start.asm @ 465:915e0d38edec

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Merge with 2.01stable
author heinrichsweikamp
date Sun, 02 Oct 2011 17:54:30 +0200
parents 86fc79735d3b 6ad9af3a5771
children 67d908f51e80
comparison
equal deleted inserted replaced
463:86fc79735d3b 465:915e0d38edec
140 write_int_eeprom d'191' 140 write_int_eeprom d'191'
141 write_int_eeprom d'192' 141 write_int_eeprom d'192'
142 write_int_eeprom d'193' 142 write_int_eeprom d'193'
143 write_int_eeprom d'194' ; Reset Default and Current Value to zero 143 write_int_eeprom d'194' ; Reset Default and Current Value to zero
144 clrf EEADRH 144 clrf EEADRH
145
146 ; reset gases (Bug in 2.0 stable)
147 call reset_gases
145 ; goto reset_all_cf ; resets all custom functions bank0 and bank1 and jumps to "restart" 148 ; goto reset_all_cf ; resets all custom functions bank0 and bank1 and jumps to "restart"
146 149
147 restart: 150 restart:
148 movlw b'00000011' 151 movlw b'00000011'
149 movwf T3CON ; Timer3 with 32768Hz clock running 152 movwf T3CON ; Timer3 with 32768Hz clock running
393 movwf EEDATA 396 movwf EEDATA
394 write_int_eeprom d'92' ; Store number of CF used in this firmware 397 write_int_eeprom d'92' ; Store number of CF used in this firmware
395 bra start3 ; continue with normal start 398 bra start3 ; continue with normal start
396 399
397 init: 400 init:
398 movlw OSCCON_VALUE 401 movlw b'01101100' ; 4MHz (x4 PLL)
399 movwf OSCCON 402 movwf OSCCON
403
400 movlw b'00010001' ; I/O Ports 404 movlw b'00010001' ; I/O Ports
401 movwf TRISA 405 movwf TRISA
402 clrf PORTA 406 clrf PORTA
403 movlw b'00000011' 407 movlw b'00000011'
404 movwf TRISB 408 movwf TRISB
414 clrf PORTD 418 clrf PORTD
415 419
416 movlw b'01000000' ; Bit6: PPL enable 420 movlw b'01000000' ; Bit6: PPL enable
417 movwf OSCTUNE 421 movwf OSCTUNE
418 422
419 movlw T0CON_VALUE ; Timer0 423 movlw b'00011111' ; Timer0
420 movwf T0CON 424 movwf T0CON
421 425
422 movlw b'00000111' ; Timer1 426 movlw b'00000111' ; Timer1
423 movwf T1CON 427 movwf T1CON
424 428
446 movwf SSPSTAT 450 movwf SSPSTAT
447 movlw b'00101000' 451 movlw b'00101000'
448 movwf SSPCON1 452 movwf SSPCON1
449 movlw b'00000000' 453 movlw b'00000000'
450 movwf SSPCON2 454 movwf SSPCON2
451 455 movlw d'8' ; 400kHz I2C clock @ 16MHz Fcy
452 movlw SSPADD_VALUE ; I²C Speed
453 movwf SSPADD 456 movwf SSPADD
454 457
455 clrf CCP1CON ; PWM Module off 458 clrf CCP1CON ; PWM Module off
456 clrf ECCP1CON ; PWM Module off 459 clrf ECCP1CON ; PWM Module off
457 460
466 movlw b'10010000' 469 movlw b'10010000'
467 movwf RCSTA 470 movwf RCSTA
468 movlw b'00001000' 471 movlw b'00001000'
469 movwf BAUDCON 472 movwf BAUDCON
470 clrf SPBRGH 473 clrf SPBRGH
471 474 movlw d'34'
472 movlw SPBRG_VALUE
473 movwf SPBRG 475 movwf SPBRG
474 clrf RCREG 476 clrf RCREG
475 clrf PIR1 477 clrf PIR1
476 return 478 return