Mercurial > public > mk2
comparison code_part1/OSTC_code_asm_part1/definitions.asm @ 537:3091628b2742
BUGFIX: Spurious logbook read issue
author | heinrichsweikamp |
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date | Sun, 08 Jan 2012 12:44:51 +0100 |
parents | e77df4e2d025 |
children | 5eff719fd292 |
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536:e77df4e2d025 | 537:3091628b2742 |
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20 ; 2011/01/20: [jDG] Create a common file included in ASM and C code. | 20 ; 2011/01/20: [jDG] Create a common file included in ASM and C code. |
21 ; known bugs: | 21 ; known bugs: |
22 ; ToDo: | 22 ; ToDo: |
23 | 23 |
24 #DEFINE softwareversion_x d'2' ; Software version XX.YY | 24 #DEFINE softwareversion_x d'2' ; Software version XX.YY |
25 #DEFINE softwareversion_y d'09' ; Software version XX.YY | 25 #DEFINE softwareversion_y d'10' ; Software version XX.YY |
26 | 26 |
27 #DEFINE softwareversion_beta 1 ; (and 0 for release) | 27 #DEFINE softwareversion_beta 1 ; (and 0 for release) |
28 | 28 |
29 #DEFINE max_custom_number d'58' ; Number of last used custom function | 29 #DEFINE max_custom_number d'58' ; Number of last used custom function |
30 | 30 |
44 | 44 |
45 ; CPU Speed Settings | 45 ; CPU Speed Settings |
46 ; Standard 16MHz mode | 46 ; Standard 16MHz mode |
47 ; #DEFINE SPBRG_VALUE d'34' | 47 ; #DEFINE SPBRG_VALUE d'34' |
48 ; #DEFINE OSCCON_VALUE b'01101100' ; 4MHz (x4 PLL) | 48 ; #DEFINE OSCCON_VALUE b'01101100' ; 4MHz (x4 PLL) |
49 ; #DEFINE SSPSTAT_VALUE b'00000000' ; with slew rate control (400kHz) | |
49 ; #DEFINE SSPADD_VALUE d'8' ; 400kHz I2C clock @ 16MHz Fcy | 50 ; #DEFINE SSPADD_VALUE d'8' ; 400kHz I2C clock @ 16MHz Fcy |
50 ; #DEFINE T0CON_VALUE b'00011111' ; Timer0 | 51 ; #DEFINE T0CON_VALUE b'00011111' ; Timer0 |
51 ; #DEFINE SPEED_16MHz | 52 ; #DEFINE SPEED_16MHz |
52 ; Experimental 32MHz mode | 53 ; Experimental 32MHz mode |
53 #DEFINE SPBRG_VALUE d'68' | 54 #DEFINE SPBRG_VALUE d'68' |
54 #DEFINE OSCCON_VALUE b'01111100' ; 8MHz (x4 PLL) | 55 #DEFINE OSCCON_VALUE b'01111100' ; 8MHz (x4 PLL) |
55 #DEFINE SSPADD_VALUE d'16' ; 400kHz I2C clock @ 32MHz Fcy | 56 ; #DEFINE SSPADD_VALUE d'16' ; 400kHz I2C clock @ 32MHz Fcy |
57 #DEFINE SSPADD_VALUE d'32' ; 200kHz I2C clock @ 32MHz Fcy | |
58 #DEFINE SSPSTAT_VALUE b'00000000' ; with slew rate control | |
56 #DEFINE T0CON_VALUE b'00010000' ; Timer0 | 59 #DEFINE T0CON_VALUE b'00010000' ; Timer0 |
57 #DEFINE SPEED_32MHz | 60 #DEFINE SPEED_32MHz |
58 | 61 |
59 #DEFINE FT_SMALL .0 | 62 #DEFINE FT_SMALL .0 |
60 #DEFINE FT_MEDIUM .1 | 63 #DEFINE FT_MEDIUM .1 |