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annotate code_part1/OSTC_code_asm_part1/i2c_eeprom.asm @ 376:ed26990716fe 64kByte Logbook

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first gas does not reset change depth, display fix with multigas dives in logbook
author heinrichsweikamp
date Sun, 12 Jun 2011 21:27:07 +0200
parents 7250ca7c8d24
children a76c5a3e9e96
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0
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1
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2 ; OSTC - diving computer code
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3 ; Copyright (C) 2008 HeinrichsWeikamp GbR
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4 ; This program is free software: you can redistribute it and/or modify
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5 ; it under the terms of the GNU General Public License as published by
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6 ; the Free Software Foundation, either version 3 of the License, or
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7 ; (at your option) any later version.
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8 ; This program is distributed in the hope that it will be useful,
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9 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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10 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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11 ; GNU General Public License for more details.
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12 ; You should have received a copy of the GNU General Public License
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13 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
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14 ; provides routines for external EEPROM via I2C
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15 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
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16 ; written: 10/30/05
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17 ; last updated: 08/21/06
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18 ; known bugs:
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19 ; ToDo: use 2nd 32KB from external EEPROM for something
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20
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21 incf_eeprom_address macro ext_ee_temp1 ; Will increase eeprom_address:2 with the 8Bit value "ext_ee_temp1"
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22 movlw ext_ee_temp1
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23 call incf_eeprom_address0
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24 endm
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25
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26 incf_eeprom_address0:
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27 addwf eeprom_address+0,F ; increase address
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28 movlw d'0'
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29 addwfc eeprom_address+1,F
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30 return
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31 ; btfss eeprom_address+1,7 ; at address 8000?
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32 ; return ; No, continue
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33 ;
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34 ; ; Yes, clear eeprom_address:2
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35 ; clrf eeprom_address+0 ; Clear eeprom address
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36 ; clrf eeprom_address+1
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37 ; return ; Done.
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38 ;
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39 ;=============================================================================
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40 ; Will decrease eeprom_address:2 with the 8Bit value "ext_ee_temp1"
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41
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42
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43 decf_eeprom_address macro ext_ee_temp1
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44 movlw ext_ee_temp1
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45 call decf_eeprom_address0
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46 endm
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47
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48 decf_eeprom_address0:
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49 subwf eeprom_address+0,F ; decrease address: do a 16-8bits substract.
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50 movlw d'0'
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51 subwfb eeprom_address+1,F
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52 return
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53 ;
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54 ; btfss eeprom_address+1,7 ; at address 8000?
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55 ; return ; No, done.
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56 ;
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57 ; movlw b'01111111' ; yes, reset highbyte
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58 ; movwf eeprom_address+1
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59 ; return ; Done.
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60
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61 ;=============================================================================
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62
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63 write_external_eeprom: ; data in WREG
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64 ; increase address eeprom_address+0:eeprom_address+1 after write
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65 ; with banking after 7FFF
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66 #ifdef TESTING
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67 ; When Simulating with MPLabSIM, there is no way to emulate external EEPROM...
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68 return
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69 #endif
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70
0
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71 rcall I2CWRITE ; writes WREG into EEPROM@eeprom_address
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72 movlw d'1' ; increase address
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73 addwf eeprom_address+0,F
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74 movlw d'0'
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75 addwfc eeprom_address+1,F
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76 return
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77 ; btfss eeprom_address+1,7 ; at address 8000?
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78 ; return ; no, return
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79 ;
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80 ; clrf eeprom_address+0 ; Clear eeprom address
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81 ; clrf eeprom_address+1
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82 ; return
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83 ;
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84 write_external_eeprom_block: ; Writes a block of 64Byte (one page in external EEPROM without stop condition
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85 #ifdef TESTING
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86 ; When Simulating with MPLabSIM, there is no way to emulate external EEPROM...
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87 return
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88 #endif
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89
0
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90 btfsc eeprom_blockwrite ; Blockwrite continue?
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91 rcall I2CWRITE_BLOCK2
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92 btfss eeprom_blockwrite ; Blockwrite start?
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93 rcall I2CWRITE_BLOCK
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94 bsf eeprom_blockwrite ; After the start, do blockwriting for the next 63Bytes!
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95
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96 movlw d'0' ; increase address
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97 incf eeprom_address+0,F
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98 addwfc eeprom_address+1,F
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99 return
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100
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101 ; btfss eeprom_address+1,7 ; at address 8000
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102 ; return ; no, return
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103 ;
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104 ; clrf eeprom_address+0 ; Clear eeprom address
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105 ; clrf eeprom_address+1
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106 ; return
0
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107 I2CWRITE_BLOCK:
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108 movwf ext_ee_temp1 ; Data byte in WREG
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109 bsf SSPCON2,SEN ; Start condition
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110 rcall WaitMSSP
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111 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
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112 btfss eeprom_address+1,7 ; Access Block2?
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113 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
0
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114 movwf SSPBUF ; control byte
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115 rcall WaitMSSP
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116 rcall I2C_WaitforACK
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117 movff eeprom_address+1,SSPBUF ; High Address byte
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118 rcall WaitMSSP
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119 rcall I2C_WaitforACK
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120 movff eeprom_address+0,SSPBUF ; Low Address byte
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121 rcall WaitMSSP
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122 rcall I2C_WaitforACK
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123 I2CWRITE_BLOCK2:
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124 movff ext_ee_temp1, SSPBUF ; Data Byte
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125 rcall WaitMSSP
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126 rcall I2C_WaitforACK
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127 return
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128
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129
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130 get_free_EEPROM_location: ; Searches 0xFD, 0xFD, 0xFE and sets Pointer to 0xFE
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131
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132 #ifdef TESTING
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133 ; In testing mode, find 0x100 (internal EEPROM) as the first free location...
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134 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
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135 movlw 0x1
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136 movwf eeprom_address+1
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137 return
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138 #endif
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139
0
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140 clrf ext_ee_temp1 ; low address counter
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141 clrf ext_ee_temp2 ; high address counter
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142 bcf second_FD ; clear flags
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143 bcf first_FD
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144 get_free_EEPROM_location3:
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145 bsf SSPCON2, PEN ; Stop condition
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146 rcall WaitMSSP
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147 bsf SSPCON2,SEN ; Start condition
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148 rcall WaitMSSP
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149 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
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150 btfss ext_ee_temp2,7 ; Access Block2?
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151 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
0
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152 movwf SSPBUF ; control byte
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153 rcall WaitMSSP
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154 btfsc SSPCON2,ACKSTAT
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155 bra get_free_EEPROM_location3 ; EEPROM NOT acknowledged, retry!
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156
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157 movff ext_ee_temp2,SSPBUF ; High Address byte
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158 rcall WaitMSSP
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159 rcall I2C_WaitforACK
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160 movff ext_ee_temp1,SSPBUF ; Low Address byte
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161 rcall WaitMSSP
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162 rcall I2C_WaitforACK
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163
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164 bsf SSPCON2,RSEN ; Start condition
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165 rcall WaitMSSP
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166 movlw b'10101111' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
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167 btfss ext_ee_temp2,7 ; Access Block2?
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168 movlw b'10100111' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
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169 movwf SSPBUF ; control byte
0
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170 rcall WaitMSSP
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171 rcall I2C_WaitforACK
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diff changeset
172
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
173 get_free_EEPROM_location2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
174 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
175 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
176 btfsc first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
177 bra test_2nd_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
178 bsf first_FD ; found first 0xFD?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
179 movlw 0xFD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
180 cpfseq SSPBUF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
181 bcf first_FD ; No
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
182 bra get_free_EEPROM_location2c
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
183
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
184 test_2nd_FD:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
185 btfsc second_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
186 bra test_FE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
187 bsf second_FD ; found second 0xFD?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
188 movlw 0xFD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
189 cpfseq SSPBUF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
190 bra get_free_EEPROM_location2b ;No, clear both flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
191 bra get_free_EEPROM_location2c
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
192 test_FE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
193 movlw 0xFE ; found the final 0xFE?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
194 cpfseq SSPBUF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
195 bra get_free_EEPROM_location2b ;No, clear both flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
196 movff ext_ee_temp1,eeprom_address+0 ;Yes, copy ext_ee_temp1->eeprom_address+0 and
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
197 movff ext_ee_temp2,eeprom_address+1 ;ext_ee_temp2->eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
198 bra get_free_EEPROM_location4 ; Done.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
199
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
200 get_free_EEPROM_location2b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
201 bcf second_FD ; clear both flags!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
202 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
203 get_free_EEPROM_location2c:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
204 movlw d'1' ; and increase search address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
205 addwf ext_ee_temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
206 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
207 addwfc ext_ee_temp2,F
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
208
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
209 movlw 0xFF
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
210 cpfseq ext_ee_temp2 ; =0xFFFF
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
211 bra get_free_EEPROM_location2d ; No
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
212 cpfseq ext_ee_temp1 ; =0xFFFF
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
213 bra get_free_EEPROM_location2d ; No
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
214
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
215 bra get_free_EEPROM_location3b ; yes
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
216
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
217 get_free_EEPROM_location2d:
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
218 bsf SSPCON2, ACKEN ; no, send Ack
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
219 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
220 bra get_free_EEPROM_location2 ; and continue search
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
221 get_free_EEPROM_location3b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
222 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
223 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
224 get_free_EEPROM_location4:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
225 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
226 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
227
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
228 bcf second_FD ; clear flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
229 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
230 return ; return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
231
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
232
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
233 I2CREAD:
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
234 rcall I2CREAD_COMMON
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
235 bsf SSPCON2, PEN ; Stop
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
236 rcall WaitMSSP
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
237 return
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
238
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
239 I2CREAD2: ; same as I2CREAD but with automatic address increase
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
240 rcall I2CREAD
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
241 I2CREAD2_2:
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
242 movlw d'1'
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
243 addwf eeprom_address+0,F
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
244 movlw d'0'
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
245 addwfc eeprom_address+1,F
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
246 return
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
247 ; btfss eeprom_address+1,7 ; at 0x8000?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
248 ; return ; no, return
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
249 ;
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
250 ; clrf eeprom_address+0 ; Yes, clear address
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
251 ; clrf eeprom_address+1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
252 ; return
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
253 ;
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
254 I2CREAD3: ; block read start with automatic address increase
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
255 rcall I2CREAD_COMMON
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
256 ; no Stop condition here
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
257 bra I2CREAD2_2
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
258
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
259 I2CREAD4: ; block read with automatic address increase
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
260 bsf SSPCON2,ACKEN ; Master acknowlegde
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
261 rcall WaitMSSP
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
262 bsf SSPCON2, RCEN ; Enable recieve mode
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
263 rcall WaitMSSP
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
264 movf SSPBUF,W ; copy read byte into WREG
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
265 ; no Stop condition here
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
266 bra I2CREAD2_2
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
267
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
268
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
269 I2CREAD_COMMON:
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
270 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
271 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
272 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
273 rcall WaitMSSP
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
274
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
275 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
276 btfss eeprom_address+1,7 ; Access Block2?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
277 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
278 movwf SSPBUF ; control byte
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
279 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
280 btfsc SSPCON2,ACKSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
281 bra I2CREAD ; EEPROM NOT acknowledged, retry!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
282 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
283 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
284 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
285 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
286 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
287 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
288
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
289 bsf SSPCON2,RSEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
290 rcall WaitMSSP
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
291
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
292 movlw b'10101111' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
293 btfss eeprom_address+1,7 ; Access Block2?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
294 movlw b'10100111' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
295 movwf SSPBUF ; control byte
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
296 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
297 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
298
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
299 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
300 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
301 movf SSPBUF,W ; copy read byte into WREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
302 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
303
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
304
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
305 I2CWRITE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
306 movwf ext_ee_temp1 ; Data byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
307 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
308 rcall WaitMSSP
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
309 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
310 btfss eeprom_address+1,7 ; Access Block2?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
311 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
312 movwf SSPBUF ; control byte
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
313 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
314 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
315 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
316 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
317 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
318 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
319 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
320 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
321 movff ext_ee_temp1, SSPBUF ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
322 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
323 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
324 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
325 rcall WaitMSSP
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
326 WAITMS d'5' ; Write delay
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
327 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
328
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
329 I2C_WaitforACK:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
330 btfsc SSPCON2,ACKSTAT ; checks for ACK bit from slave
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
331 rcall I2CFail
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
332 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
333
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
334 I2CFail:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
335 ostc_debug 'M' ; Sends debug-information to screen if debugmode active
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
336 bsf LED_red
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
337 rcall I2CReset ; I2C Reset
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
338 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
339 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
340 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
341
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
342 WaitMSSP:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
343 decfsz i2c_temp,F ; check for timeout during I2C action
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
344 bra WaitMSSP2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
345 bra I2CFail ; timeout occured
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
346 WaitMSSP2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
347 btfss PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
348 bra WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
349 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
350 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
351 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
352
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
353 I2CReset: ; Something went wrong (Slave holds SDA low?)
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
354 clrf SSPCON1 ; wake-up slave and reset entire module
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
355 ostc_debug 'N' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
356 clrf SSPCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
357 clrf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
358 bcf TRISC,3 ; SCL OUTPUT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
359 bsf TRISC,4 ; SDA Input
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360 bcf PORTC,3
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361 movlw d'9'
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362 movwf i2c_temp ; clock-out 9 clock cycles manually
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363 I2CReset_1:
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364 bsf PORTC,3 ; SCL=1
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365 nop
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366 btfsc PORTC,4 ; SDA=1?
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367 bra I2CReset_2 ; =1, SDA has been released from slave
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368 bcf PORTC,3 ; SCL=0
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369 bcf PORTC,3
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370 decfsz i2c_temp,F
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371 bra I2CReset_1 ; check for nine clock cycles
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372 I2CReset_2:
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373 bsf TRISC,3 ; SCL Input
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374 clrf SSPCON1 ; set I²C Mode
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375 WAITMS d'10' ; Reset-Timeout for I2C devices
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376 movlw b'00000000'
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377 movwf SSPSTAT
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378 movlw b'00101000'
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379 movwf SSPCON1
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380 movlw b'00000000'
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381 movwf SSPCON2
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382 movlw d'8' ; 400kHz I2C clock @ 16MHz Fcy
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383 movwf SSPADD
21
73014f788032 1.60 stable rc1
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384 bcf LED_red
0
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385 ostc_debug 'O' ; Sends debug-information to screen if debugmode active
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386 return
53
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387
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388 ;I2C_TX:
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389 ; movwf i2c_temp2 ; Data byte
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390 ; bsf SSPCON2,SEN ; Start condition
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391 ; rcall WaitMSSP
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392 ; movlw b'10010000' ; Bit0=0: WRITE, Bit0=1: READ
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393 ; movwf SSPBUF ; control byte
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394 ; rcall WaitMSSP
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395 ; rcall I2C_WaitforACK
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396 ; movff i2c_temp2, SSPBUF ; Data Byte
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397 ; rcall WaitMSSP
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398 ; rcall I2C_WaitforACK
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399 ; bsf SSPCON2,PEN ; Stop condition
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400 ; rcall WaitMSSP
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401 ; return
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402 ;I2C_RX:
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403 ; bcf PIR1,SSPIF
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404 ; bsf SSPCON2,SEN ; Start condition
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405 ; rcall WaitMSSP
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406 ; movlw b'10010001' ; Bit0=0: WRITE, Bit0=1: READ
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407 ; movwf SSPBUF ; control byte
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408 ; rcall WaitMSSP
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409 ; rcall I2C_WaitforACK
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410 ; bsf SSPCON2, RCEN ; Enable recieve mode
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411 ; rcall WaitMSSP
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412 ; movff SSPBUF,i2c_temp2 ; Data Byte
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413 ; bsf SSPCON2,ACKEN ; Master acknowlegde
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414 ; rcall WaitMSSP
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415 ; bsf SSPCON2,PEN ; Stop condition
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416 ; rcall WaitMSSP
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417 ; return