annotate code_part1/OSTC_code_asm_part1/start.asm @ 715:de413161f00c

256ms switch debounce timer
author heinrichsweikamp
date Tue, 21 May 2013 12:17:49 +0200
parents b7f7184d800d
children 4452837aff37
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1 ; OSTC - diving computer code
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2 ; Copyright (C) 2008 HeinrichsWeikamp GbR
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3
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4 ; This program is free software: you can redistribute it and/or modify
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5 ; it under the terms of the GNU General Public License as published by
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6 ; the Free Software Foundation, either version 3 of the License, or
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7 ; (at your option) any later version.
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8
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9 ; This program is distributed in the hope that it will be useful,
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10 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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12 ; GNU General Public License for more details.
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13
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14 ; You should have received a copy of the GNU General Public License
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15 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
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16
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17
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18 ; Start and init
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19 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
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20 ; written: 10/13/04
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21 ; last updated: 06/24/08
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22 ; known bugs:
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23 ; ToDo:
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24
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25 start:
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26 movlb b'00000001' ; ram bank 1 selected
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33abbc08f01e Minor cleanups for TESTING=1 emulator mode.
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27 movff STKPTR,temp10 ; Save stack pointer, for crash reports.
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ade0848c8b8b New runtime asserts when compiled in DEBUG more.
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28 clrf temp10+1
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29 call init
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30 btfsc divemode ; Reset from Divemode?
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6e456a6398e0 Hardware4 support
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31 call DISP_resetdebugger ; Yes! Something went wrong, show reset informations
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ab1678d98e46 some changes for cf defaults
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32 start3:
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33 clrf STKPTR ; Clear Stackpointer
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91352bb698cf Oups... time to sleep !
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34 lfsr FSR0,year+1 ; Clear rambank 1-9, do not delete RTC registers
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35 clear_rambank:
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36 clrf POSTINC0
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37 movlw 0x0A
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38 cpfseq FSR0H ; Bank 9 done?
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39 bra clear_rambank ; clear...
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40
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41 ; Defaults for RTC
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42 call disable_rs232 ; disable UART module
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43 call RTCinit ; reset RTC
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44
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45 ; Air pressure compensation after reset
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46 call get_calibration_data ; Get calibration data from pressure sensor
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b7f7184d800d banksafe sensor init
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47 banksel flag5
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8c293e76a517 no flicker when powering on
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48 bcf no_sensor_int ; Enable sensor interrupt
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49 bcf pressure_refresh
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50 wait_start_pressure:
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51 btfss pressure_refresh ; Air pressure compensation
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52 bra wait_start_pressure
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53
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54 clrf rel_pressure+0
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55 clrf rel_pressure+1
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56 clrf surface_interval+0
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57 clrf surface_interval+1
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58
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59 bsf sleepmode ; Routine only works in sleepmode...
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60 call pressuretest_sleep_fast ; Gets pressure without averaging (faster!)
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61 bcf sleepmode ; Normal mode again
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2cbaa01dac26 Hunting for NoFly (bug BB13)... not found yet...
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62
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33abbc08f01e Minor cleanups for TESTING=1 emulator mode.
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63 ; Extra power-up reset (JeanDo emulator)
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64 Ifdef TESTING
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65 call reset_gases
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66 call reset_all_cf
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67 call reset_external_eeprom
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68
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69 movlw LOW(.1000)
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70 movwf amb_pressure+0
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71 movlw HIGH(.1000)
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72 movwf amb_pressure+1
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73 Endif
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74
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75 ; Get real pressure (if not in emulator mode)
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76 Ifndef TESTING
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ed51a7a89d9a minor cleanups for TESTING mode
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77 SAFE_2BYTE_COPY amb_pressure_avg, amb_pressure ; copy for compatibility
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78 Endif
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79
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80 movff amb_pressure+0,last_surfpressure+0
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81 movff amb_pressure+1,last_surfpressure+1
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2144f19fa1eb BUGFIX protect against ISR changing pressure/temperature while reading it.
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82 movff last_surfpressure+0,last_surfpressure_15min+0
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83 movff last_surfpressure+1,last_surfpressure_15min+1
2144f19fa1eb BUGFIX protect against ISR changing pressure/temperature while reading it.
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84 movff last_surfpressure+0,last_surfpressure_30min+0
2144f19fa1eb BUGFIX protect against ISR changing pressure/temperature while reading it.
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85 movff last_surfpressure+1,last_surfpressure_30min+1 ; Rests all airpressure registers
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86
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87 ; reset deco data
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3dbeacf42e9e BUGFIX missing deko init in reboot code.
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88 ostc_debug '0' ; Sends debug-information to screen if debugmode active
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89
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90 movlw d'79' ; 79% N2
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f15e804ff67f Gas switch delay
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91 movff WREG,char_I_N2_ratio ; No He at the Surface
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3dbeacf42e9e BUGFIX missing deko init in reboot code.
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92 clrf WREG ; Use as buffer
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93 movff WREG,char_I_He_ratio ; No He at the Surface
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94 movff WREG,char_I_step_is_1min ; 2 second deco mode
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95 GETCUSTOM8 d'11' ; Saturation multiplier %
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96 movff WREG,char_I_saturation_multiplier
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97 GETCUSTOM8 d'12' ; Desaturation multiplier %
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98 movff WREG,char_I_desaturation_multiplier
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99 movff amb_pressure+0,int_I_pres_respiration+0 ; copy for deco routine
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100 movff amb_pressure+1,int_I_pres_respiration+1
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101 movff int_I_pres_respiration+0,int_I_pres_surface+0 ; copy for desat routine
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102 movff int_I_pres_respiration+1,int_I_pres_surface+1
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103
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c9f19a546e64 BUGFIX MISSING movlb for gaslist (simulator).
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104 call deco_clear_tissue
c9f19a546e64 BUGFIX MISSING movlb for gaslist (simulator).
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105 movlb b'00000001' ; select ram bank 1
c9f19a546e64 BUGFIX MISSING movlb for gaslist (simulator).
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106
508
b595569e4bcc BUGFIX char_I_(N2_ratio/He_ratio) array not inited at boot time
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107 call divemode_check_decogases ; Setup N2/He ratio array
520
acf4776eec08 BUGFIX bank1 error, deco_calc_wo_deco done twice in start routine.
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108
acf4776eec08 BUGFIX bank1 error, deco_calc_wo_deco done twice in start routine.
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109 call calc_deko_surfmode ; calculate desaturation for one minute
acf4776eec08 BUGFIX bank1 error, deco_calc_wo_deco done twice in start routine.
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110
116
14a074e1a375 Split C code, and use direct linking.
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111 call deco_calc_desaturation_time ; calculate desaturation time
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112 call deco_clear_CNS_fraction ; clear CNS
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acf4776eec08 BUGFIX bank1 error, deco_calc_wo_deco done twice in start routine.
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113 movlb b'00000001' ; select ram bank 1
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114
412
b2c9cc018671 small cleanup
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115 clrf nofly_time+0 ; Reset NoFly
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116 clrf nofly_time+1 ; Reset NoFly
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117 bcf nofly_active ; Clear flag
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118
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119 ; check firmware and reset Custom Functions after an update
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904863f96582 Work-Around for "Reset all" overwriting 0x00 to 0x04 in EEPROM Bank1
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120 movlw d'1'
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121 movwf EEADR
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122 movlw d'1'
0
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123 movwf EEADRH
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124 call read_eeprom ; read current version x
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125 movff EEDATA,temp1
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126 incf EEADR,F ; set to 0x102
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127 call read_eeprom ; read current version y
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128 movff EEDATA,temp2
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129 clrf EEADRH ; Reset EEADRH
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130
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131 movlw softwareversion_x
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132 cpfseq temp1 ; compare version x
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133 bra check_firmware_new ; is not equal -> reset CF and store new version in EEPROM
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134
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135 movlw softwareversion_y
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136 cpfseq temp2 ; compare version y
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137 bra check_firmware_new ; is not equal -> reset CF and store new version in EEPROM
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138 bra restart ; x and y are equal -> do not reset cf
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139
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140 check_firmware_new:
384
904863f96582 Work-Around for "Reset all" overwriting 0x00 to 0x04 in EEPROM Bank1
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141 movlw d'1' ; store current version in EEPROM
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142 movwf EEADR
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904863f96582 Work-Around for "Reset all" overwriting 0x00 to 0x04 in EEPROM Bank1
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143 movlw d'1'
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144 movwf EEADRH
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145 movlw softwareversion_x
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146 movwf EEDATA
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147 call write_eeprom ; write version x
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148 incf EEADR,F ; set to 0x102
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149 movlw softwareversion_y
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150 movwf EEDATA
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151 call write_eeprom ; write version y
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152 clrf EEADRH ; Reset EEADRH
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153
500
014b2b1e82dc Reset Brightness after firmware update
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154 ; After update resets
014b2b1e82dc Reset Brightness after firmware update
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155 ; Reset brightness to ECO
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156 movlw LOW 0x103
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157 movwf EEADR
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158 movlw HIGH 0x103
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159 movwf EEADRH ; DISPLAY brightness (=0: Eco, =1: High)
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014b2b1e82dc Reset Brightness after firmware update
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160 movlw .0
014b2b1e82dc Reset Brightness after firmware update
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161 movwf EEDATA
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162 call write_eeprom ; write byte
649
ea2bc3b9224e reset 5 diluents after update
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163 clrf EEADRH ; Reset EEADRH
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164
0
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165 restart:
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a847f416e67e Debugging timer1
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166 movlw b'00000011'
a847f416e67e Debugging timer1
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167 movwf T3CON ; Timer3 with 32768Hz clock running
a847f416e67e Debugging timer1
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168 clrf TMR3L
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3091628b2742 BUGFIX: Spurious logbook read issue
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169 nop
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a847f416e67e Debugging timer1
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170 clrf TMR3H
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171 bcf LED_red
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172 bcf LED_blue ; all LEDs off
43
65d5b0c8da41 New CF48, changed CF15
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173 GETCUSTOM8 d'48' ; time correction value
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174 movff WREG, time_correction_value ; store in Bank0 register
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175
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176 clrf flag1 ; clear all flags
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177 clrf flag2
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178 clrf flag3
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179 clrf flag4
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180 clrf flag5
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181 clrf flag6
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182 clrf flag7
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parents: 12
diff changeset
183 clrf flag8
6d1177291d38 1.54beta rc1
heinrichsweikamp
parents: 12
diff changeset
184 clrf flag9
6d1177291d38 1.54beta rc1
heinrichsweikamp
parents: 12
diff changeset
185 clrf flag10
6d1177291d38 1.54beta rc1
heinrichsweikamp
parents: 12
diff changeset
186 clrf flag11
6d1177291d38 1.54beta rc1
heinrichsweikamp
parents: 12
diff changeset
187 clrf flag12
6d1177291d38 1.54beta rc1
heinrichsweikamp
parents: 12
diff changeset
188 clrf flag13
6d1177291d38 1.54beta rc1
heinrichsweikamp
parents: 12
diff changeset
189 clrf flag14
6d1177291d38 1.54beta rc1
heinrichsweikamp
parents: 12
diff changeset
190 clrf flag15
153
17de42ab02b6 realtime clock defaults
heinrichsweikamp
parents: 142
diff changeset
191
169
e26f49674956 Merge decoplan display for both GF and Buhlmann models.
JeanDo
parents: 167
diff changeset
192 ; Should we set win_flip_screen ?
e26f49674956 Merge decoplan display for both GF and Buhlmann models.
JeanDo
parents: 167
diff changeset
193 bsf flag1,0 ; Precondition to yes
153
17de42ab02b6 realtime clock defaults
heinrichsweikamp
parents: 142
diff changeset
194 clrf EEADRH ; Reset EEADRH
17de42ab02b6 realtime clock defaults
heinrichsweikamp
parents: 142
diff changeset
195 read_int_eeprom d'1'
17de42ab02b6 realtime clock defaults
heinrichsweikamp
parents: 142
diff changeset
196 movlw .7
169
e26f49674956 Merge decoplan display for both GF and Buhlmann models.
JeanDo
parents: 167
diff changeset
197 cpfsgt EEDATA ; serial > 2048 (Mk2n hardware) ?
153
17de42ab02b6 realtime clock defaults
heinrichsweikamp
parents: 142
diff changeset
198 bcf flag1,0
169
e26f49674956 Merge decoplan display for both GF and Buhlmann models.
JeanDo
parents: 167
diff changeset
199 incf EEDATA,W ; serial == 65535 (emulation) ?
e26f49674956 Merge decoplan display for both GF and Buhlmann models.
JeanDo
parents: 167
diff changeset
200 btfsc STATUS,Z
e26f49674956 Merge decoplan display for both GF and Buhlmann models.
JeanDo
parents: 167
diff changeset
201 bcf flag1,0
153
17de42ab02b6 realtime clock defaults
heinrichsweikamp
parents: 142
diff changeset
202 movff flag1,win_flags ; store in Bank0 register
17de42ab02b6 realtime clock defaults
heinrichsweikamp
parents: 142
diff changeset
203 clrf flag1 ; Clear flag1 (again)
239
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
204
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
205 ; Select high altitude (Fly) mode?
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
206 movff last_surfpressure_30min+0,sub_b+0
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
207 movff last_surfpressure_30min+1,sub_b+1
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
208 movlw HIGH d'880'
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
209 movwf sub_a+1
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
210 movlw LOW d'880' ; Hard-wired 880mBar
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
211 movwf sub_a+0
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
212 call sub16 ; sub_c = sub_a - sub_b
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
213 btfss neg_flag ; Result negative (Ambient>880mBar)?
3ed240d60341 High altitude (Plane/Fly) mode added
heinrichsweikamp
parents: 236
diff changeset
214 bsf high_altitude_mode ; No, Set Flag!
169
e26f49674956 Merge decoplan display for both GF and Buhlmann models.
JeanDo
parents: 167
diff changeset
215
142
8b75ba28d641 Screen-flipping custom function.
JeanDo
parents: 137
diff changeset
216 call gassetup_sort_gaslist ; Sorts Gaslist according to change depth
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
217 WIN_TOP .0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
218 WIN_LEFT .0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
219 WIN_FONT FT_SMALL
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
220 WIN_INVERT .0 ; Init new Wordprocessor
83
3e351e25f5d1 adding anti-aliased fonts frame and merging some patches from Jeando
heinrichsweikamp
parents: 62
diff changeset
221 setf WREG
3e351e25f5d1 adding anti-aliased fonts frame and merging some patches from Jeando
heinrichsweikamp
parents: 62
diff changeset
222 movff WREG,win_color1 ; Beware: win_color1 is bank0, and we are bank1 currently
3e351e25f5d1 adding anti-aliased fonts frame and merging some patches from Jeando
heinrichsweikamp
parents: 62
diff changeset
223 movff WREG,win_color2
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
224 call I2CReset ; Just in Case any I2C device blocks the Bus
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
225 movff last_surfpressure_30min+0,last_surfpressure+0 ; Use 30min old airpressure
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
226 movff last_surfpressure_30min+1,last_surfpressure+1 ; Use 30min old airpressure
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
227
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
228 ; Check if new CF were added in the last firmware version
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
229 clrf EEADRH
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
230 read_int_eeprom d'92' ; Read number of CF used in this firmware
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
231 movlw max_custom_number ; Defined in definitions.asm
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
232 cpfseq EEDATA ; Compare with last version
605
c3336f944e53 reset CFIII properly
heinrichsweikamp
parents: 595
diff changeset
233 bra restart1 ; New CF, show warning and store new number
c3336f944e53 reset CFIII properly
heinrichsweikamp
parents: 595
diff changeset
234 bra restart2 ; No new CF, continue with boot
c3336f944e53 reset CFIII properly
heinrichsweikamp
parents: 595
diff changeset
235
c3336f944e53 reset CFIII properly
heinrichsweikamp
parents: 595
diff changeset
236 restart1:
622
f87205426add 2.50 rc1
heinrichsweikamp
parents: 605
diff changeset
237 ; Reset all CF and Gases
f87205426add 2.50 rc1
heinrichsweikamp
parents: 605
diff changeset
238 call reset_gases
677
683e7d821678 Set CF17 (ppo2_warning_low) low level to 0.16bar
heinrichsweikamp
parents: 668
diff changeset
239 ; call reset_all_cf
605
c3336f944e53 reset CFIII properly
heinrichsweikamp
parents: 595
diff changeset
240 ; Show info screen
681
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
241 call DISPLAY_boot ; DISP boot (Incl. Clear Screen!)
605
c3336f944e53 reset CFIII properly
heinrichsweikamp
parents: 595
diff changeset
242 rcall display_new_cf_installed; Show info screen
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
243 ; Save new number of current CF count
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
244 movlw max_custom_number ; Defined in definitions.asm
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
245 movwf EEDATA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
246 write_int_eeprom d'92' ; Store number of CF used in this firmware
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
247
605
c3336f944e53 reset CFIII properly
heinrichsweikamp
parents: 595
diff changeset
248 restart2:
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
249 ; Set Debug mode?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
250 read_int_eeprom d'39'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
251 bsf debug_mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
252 movlw d'1'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
253 cpfseq EEDATA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
254 bcf debug_mode ; clear flag if <> 1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
255
362
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
256 ; Check if logbook has been converted already (Internal EEPROM 0x100=0xAA)
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
257 movlw LOW 0x100
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
258 movwf EEADR
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
259 movlw HIGH 0x100
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
260 movwf EEADRH
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
261 call read_eeprom ; read byte
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
262 movlw 0xAA
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
263 cpfseq EEDATA ; is 0xAA already?
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
264 call logbook_convert_64k ; No, convert now (And write 0xAA to internal EEPROM 0x100)
64da813d4726 Logbook converter (Needs ~8Minutes and is called one time). Backup your dives before use!!
Heinrichsweikamp
parents: 359
diff changeset
265
681
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
266 ; Set DISPLAY brightness flag
578
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 576
diff changeset
267 movlw LOW 0x103
499
2ac77db9c150 Added OLED brightness setting, texts 280, 312 and 313 need update
heinrichsweikamp
parents: 493
diff changeset
268 movwf EEADR
578
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 576
diff changeset
269 movlw HIGH 0x103
681
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
270 movwf EEADRH ; DISPLAY brightness (=0: Eco, =1: High)
499
2ac77db9c150 Added OLED brightness setting, texts 280, 312 and 313 need update
heinrichsweikamp
parents: 493
diff changeset
271 call read_eeprom ; read byte
681
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
272 bcf DISPLAY_brightness_high ; Eco mode
499
2ac77db9c150 Added OLED brightness setting, texts 280, 312 and 313 need update
heinrichsweikamp
parents: 493
diff changeset
273 movlw .0
2ac77db9c150 Added OLED brightness setting, texts 280, 312 and 313 need update
heinrichsweikamp
parents: 493
diff changeset
274 cpfseq EEDATA ; High?
681
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
275 bsf DISPLAY_brightness_high ; Yes!
499
2ac77db9c150 Added OLED brightness setting, texts 280, 312 and 313 need update
heinrichsweikamp
parents: 493
diff changeset
276
2ac77db9c150 Added OLED brightness setting, texts 280, 312 and 313 need update
heinrichsweikamp
parents: 493
diff changeset
277 clrf EEADRH ; Reset EEADRH
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
278 goto surfloop ; Jump to Surfaceloop!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
279
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
280
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
281 display_new_cf_installed:
681
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
282 call DISP_new_cf_warning ; Display new CF warning screen
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
283 movlw d'20' ; timeout for warning screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
284 bra startup_screen3a ; Will RETURN after timeout or button press
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
285
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
286 ;=============================================================================
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
287 ; Setup all flags and parameters for divemode and simulator computations.
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
288 ;
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
289 restart_set_modes_and_flags: ; "Call"ed from divemode, as well!
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
290 bcf gauge_mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
291 bcf FLAG_const_ppO2_mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
292 bcf FLAG_apnoe_mode
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
293
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
294 ; Pre-load modes for OC, GF 90/90 and no Aponoe or Gauge.
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
295 bcf no_deco_customviews ; Clear no-deco-mode-flag
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
296 movlw d'0'
469
f53aa96ff2f4 SPI for sensor in 32MHz
heinrichsweikamp
parents: 466
diff changeset
297 movff WREG,char_I_deco_model ; ZH-L16
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
298 ; Load GF values into RAM
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
299 movlw d'90'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
300 movff WREG,char_I_GF_Low_percentage
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
301 movff WREG,char_I_GF_High_percentage ; Set to 90/90...
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
302 clrf EEADRH
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
303 read_int_eeprom d'34' ; Read deco data
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
304 movlw d'1' ; Gauge mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
305 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
306 bra restart_3_test_ppO2_mode ; check for ppO2 mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
307 bsf gauge_mode ; Set flag for gauge mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
308 bsf no_deco_customviews ; Set no-deco-mode-flag
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
309 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
310 restart_3_test_ppO2_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
311 movlw d'2' ; const ppO2 mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
312 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
313 bra restart_3_test_apnoe_mode; check for apnoe mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
314 bsf FLAG_const_ppO2_mode ; Set flag for ppO2 mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
315 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
316 restart_3_test_apnoe_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
317 movlw d'3' ; Apnoe mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
318 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
319 bra restart_4_test_gf_mode ; check for GF OC mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
320 bsf FLAG_apnoe_mode ; Set flag for Apnoe Mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
321 bsf no_deco_customviews ; Set no-deco-mode-flag
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
322 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
323 restart_4_test_gf_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
324 movlw d'4' ; GF OC mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
325 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
326 bra restart_5_test_gfO2_mode ; check for GF CC mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
327 movlw d'1'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
328 movff WREG,char_I_deco_model ; Set Flagbyte for GF method
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
329 ; Load GF values into RAM
667
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
330 rcall restart_load_gf
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
331 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
332 restart_5_test_gfO2_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
333 movlw d'5' ; GF CC mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
334 cpfseq EEDATA
592
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
335 bra restart_5_test_pSCR_mode ; check for pSCR-GF
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
336 bsf FLAG_const_ppO2_mode ; Set flag for ppO2 mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
337 movlw d'1'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
338 movff WREG,char_I_deco_model ; Set Flagbyte for GF method
137
e6aa4a74c3c2 Fix: Customviews for Apnoe and Gauge mode
mh <>
parents: 119
diff changeset
339 ; Load GF values into RAM
667
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
340 rcall restart_load_gf
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
341 return ; start in Surfacemode
592
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
342 restart_5_test_pSCR_mode:
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
343 movlw d'6' ; pSCR-GF
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
344 cpfseq EEDATA
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
345 return ; start in Surfacemode
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
346 bcf FLAG_const_ppO2_mode ; Clear flag for ppO2 mode
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
347 movlw d'1'
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
348 movff WREG,char_I_deco_model ; Set Flagbyte for GF method
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
349 ; Load GF values into RAM
667
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
350 rcall restart_load_gf
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
351 return ; start in Surfacemode
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
352
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
353 restart_load_gf:
668
8f8d39117ff7 always start with normal GF
heinrichsweikamp
parents: 667
diff changeset
354 btfsc use_aGF
667
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
355 bra restart_load_gf2 ; Use aGf
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
356 ; Use normal GF
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
357 ; Load GF values into RAM
592
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
358 GETCUSTOM8 d'32' ; GF low
667
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
359 movff EEDATA,char_I_GF_Low_percentage
592
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
360 GETCUSTOM8 d'33' ; GF high
667
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
361 movff EEDATA,char_I_GF_High_percentage
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
362 return ; Done.
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
363 restart_load_gf2: ; Use aGf
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
364 ; Load GF values into RAM
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
365 GETCUSTOM8 d'67' ; aGF low
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
366 movff EEDATA,char_I_GF_Low_percentage
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
367 GETCUSTOM8 d'68' ; aGF high
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
368 movff EEDATA,char_I_GF_High_percentage
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
369 return ; Done.
8a8124f6b389 aGF handling during deco init
heinrichsweikamp
parents: 649
diff changeset
370
592
cda5b45b953f NEW: Deco mode "pSCR-GF": Computes deco and CNS based on pSCR parameters (CF62/63)
heinrichsweikamp
parents: 578
diff changeset
371
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
372 ;=============================================================================
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
373
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
374 startup_screen1:
681
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
375 call DISP_ClearScreen
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
376 call DISP_startupscreen1 ; show startup sreen
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
377 startup_screen1_2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
378 movlw d'10' ; timeout for startup screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
379 movwf temp1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
380 WAITMS d'200'
576
ab2686087bce faster font display, code cleaning
heinrichsweikamp
parents: 537
diff changeset
381 call wait_switches ; Waits until switches are released, resets flag if button stays pressed!
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
382 screen1_loop:
337
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
383 btfsc uart_dump_screen ; Asked to dump screen contains ?
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
384 call dump_screen ; Yes!
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
385
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
386 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
387 call set_dive_modes ; tests if depth>threshold
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
388 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
389 decf temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
390 bcf onesecupdate ; every second tasks done
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
391
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
392 tstfsz temp1 ; timout occured?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
393 bra screen1_loop2 ; no
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
394 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
395
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
396 screen1_loop2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
397 btfsc divemode ; Divemode active?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
398 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
399 btfsc switch_left ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
400 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
401 btfsc switch_right ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
402 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
403 bra screen1_loop ; loop screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
404
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
405 startup_screen2:
681
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
406 call DISP_ClearScreen ; Page 1
6e456a6398e0 Hardware4 support
heinrichsweikamp
parents: 677
diff changeset
407 call DISP_startupscreen2 ; show startup sreen
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
408 bra startup_screen1_2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
409
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
410 startup_screen3a:; WARNING: Also used for decodescriptions and CF Warning screen!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
411 movwf temp1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
412 WAITMS d'200'
576
ab2686087bce faster font display, code cleaning
heinrichsweikamp
parents: 537
diff changeset
413 call wait_switches ; Waits until switches are released, resets flag if button stays pressed!
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
414 screen3_loop:
337
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
415 btfsc uart_dump_screen ; Asked to dump screen contains ?
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
416 call dump_screen ; Yes!
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
417
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
418 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
419 call set_dive_modes ; tests if depth>threshold
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
420
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
421 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
422 decf temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
423 bcf onesecupdate ; every second tasks done
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
424
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
425 tstfsz temp1 ; timout occured?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
426 bra screen3_loop2 ; no
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
427 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
428 screen3_loop2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
429 btfsc switch_left ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
430 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
431 btfsc switch_right ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
432 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
433 bra screen3_loop ; loop screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
434
337
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
435 ;=============================================================================
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
436
306
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
437 first_start:
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
438 movlw max_custom_number ; Defined in definitions.asm
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
439 movwf EEDATA
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
440 write_int_eeprom d'92' ; Store number of CF used in this firmware
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
441 bra start3 ; continue with normal start
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
442
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
443 init:
466
67d908f51e80 cleanup
heinrichsweikamp
parents: 465
diff changeset
444 movlw OSCCON_VALUE
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
445 movwf OSCCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
446
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
447 movlw b'00010001' ; I/O Ports
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
448 movwf TRISA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
449 clrf PORTA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
450 movlw b'00000011'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
451 movwf TRISB
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
452 clrf PORTB
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
453 movlw b'11011101' ; UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
454 movwf TRISC
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
455 clrf PORTC
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
456 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
457 movwf TRISE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
458 clrf PORTE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
459 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
460 movwf TRISD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
461 clrf PORTD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
462
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
463 movlw b'01000000' ; Bit6: PPL enable
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
464 movwf OSCTUNE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
465
466
67d908f51e80 cleanup
heinrichsweikamp
parents: 465
diff changeset
466 movlw T0CON_VALUE ; Timer0
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
467 movwf T0CON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
468
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
469 movlw b'00000111' ; Timer1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
470 movwf T1CON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
471
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
472 movlw b'11010000' ; Interrups
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
473 movwf INTCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
474 movlw b'00000101'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
475 movwf INTCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
476 movlw b'00001000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
477 movwf INTCON3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
478 movlw b'00100001'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
479 movwf PIE1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
480 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
481 movwf PIE2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
482 clrf RCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
483
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
484 movlw b'00000000' ; A/D Converter
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
485 movwf ADCON0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
486 movlw b'00001110'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
487 movwf ADCON1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
488 movlw b'10001010' ; Right justified
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
489 movwf ADCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
490
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
491 clrf SSPCON1 ; Set I²C Mode
537
3091628b2742 BUGFIX: Spurious logbook read issue
heinrichsweikamp
parents: 521
diff changeset
492 movlw SSPSTAT_VALUE
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
493 movwf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
494 movlw b'00101000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
495 movwf SSPCON1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
496 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
497 movwf SSPCON2
466
67d908f51e80 cleanup
heinrichsweikamp
parents: 465
diff changeset
498 movlw SSPADD_VALUE ; I²C Speed
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
499 movwf SSPADD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
500
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
501 clrf CCP1CON ; PWM Module off
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
502 clrf ECCP1CON ; PWM Module off
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
503
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
504 movlw b'00000111' ; Comperator Module off
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
505 movwf CMCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
506
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
507 movlw b'00100000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
508 movwf CANCON ; ECAN Module OFF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
509
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
510 movlw b'00100100' ; UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
511 movwf TXSTA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
512 movlw b'10010000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
513 movwf RCSTA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
514 movlw b'00001000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
515 movwf BAUDCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
516 clrf SPBRGH
466
67d908f51e80 cleanup
heinrichsweikamp
parents: 465
diff changeset
517 movlw SPBRG_VALUE
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
518 movwf SPBRG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
519 clrf RCREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
520 clrf PIR1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
521 return