annotate code_part1/OSTC_code_asm_part1/start.asm @ 347:ba0f30f3d560

Ignore depths>130m in PC simulation
author heinrichsweikamp
date Wed, 25 May 2011 20:44:29 +0200
parents 797e2ac42d24
children 91352bb698cf
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1 ; OSTC - diving computer code
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2 ; Copyright (C) 2008 HeinrichsWeikamp GbR
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3
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4 ; This program is free software: you can redistribute it and/or modify
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5 ; it under the terms of the GNU General Public License as published by
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6 ; the Free Software Foundation, either version 3 of the License, or
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7 ; (at your option) any later version.
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8
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9 ; This program is distributed in the hope that it will be useful,
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10 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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12 ; GNU General Public License for more details.
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13
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14 ; You should have received a copy of the GNU General Public License
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15 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
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16
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17
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18 ; Start and init
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19 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
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20 ; written: 10/13/04
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21 ; last updated: 06/24/08
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22 ; known bugs:
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23 ; ToDo:
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24
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25 start:
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26 movlb b'00000001' ; ram bank 1 selected
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f24137eb85de Background debugger now shows STKPTR
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27 movff STKPTR,temp10
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ade0848c8b8b New runtime asserts when compiled in DEBUG more.
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28 clrf temp10+1
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29
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30 call init
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31
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32 read_int_eeprom d'92' ; Read number of CF used in this firmware
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33 movlw 0xFF ; First start value
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34 cpfseq EEDATA ; Compare
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35 bra start2 ; Normal power-on/hard reset boot
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36 bra first_start ; Reset and jump to surfmode
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37 start2:
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38 btfsc divemode ; Reset from Divemode?
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39 call PLED_resetdebugger ; Yes! Something went wrong, show reset informations
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40 start3:
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41 clrf STKPTR ; Clear Stackpointer
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6f8e3a08011e 1.73beta rc1 (Added new customview for divemode)
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42 lfsr FSR0, 10Bh ; Clear rambank 1-9, do not delete RTC registers
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43 clear_rambank:
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44 clrf POSTINC0
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45 movlw 0x0A
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46 cpfseq FSR0H ; Bank 9 done?
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47 bra clear_rambank ; clear...
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48
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49 ; Defaults for RTC
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50 call disable_rs232 ; disable UART module
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51 call RTCinit ; reset RTC
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52
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53 ; Air pressure compensation after reset
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54 call get_calibration_data ; Get calibration data from pressure sensor
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55
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56 bcf pressure_refresh
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57 wait_start_pressure:
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58 btfss pressure_refresh ; Air pressure compensation
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59 bra wait_start_pressure
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60
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61 clrf rel_pressure+0
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62 clrf rel_pressure+1
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63 clrf surface_interval+0
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64 clrf surface_interval+1
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65
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66 bsf sleepmode ; Routine only works in sleepmode...
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67 call pressuretest_sleep_fast ; Gets pressure without averaging (faster!)
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68 bcf sleepmode ; Normal mode again
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2cbaa01dac26 Hunting for NoFly (bug BB13)... not found yet...
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69
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70 SAFE_2BYTE_COPY amb_pressure, last_surfpressure
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71 movff last_surfpressure+0,last_surfpressure_15min+0
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72 movff last_surfpressure+1,last_surfpressure_15min+1
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73 movff last_surfpressure+0,last_surfpressure_30min+0
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74 movff last_surfpressure+1,last_surfpressure_30min+1 ; Rests all airpressure registers
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75
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76 ; Extra power-up reset (JeanDo)
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77 ifdef TESTING
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78 call do_menu_reset_all2
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79 endif
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80
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81 ; reset deco data
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82 ostc_debug '0' ; Sends debug-information to screen if debugmode active
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83
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84 movlw d'79' ; 79% N2
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f15e804ff67f Gas switch delay
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85 movff WREG,char_I_N2_ratio ; No He at the Surface
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86 clrf WREG ; Use as buffer
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87 movff WREG,char_I_He_ratio ; No He at the Surface
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88 movff WREG,char_I_step_is_1min ; 2 second deco mode
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89 GETCUSTOM8 d'11' ; Saturation multiplier %
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90 movff WREG,char_I_saturation_multiplier
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91 GETCUSTOM8 d'12' ; Desaturation multiplier %
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92 movff WREG,char_I_desaturation_multiplier
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93 SAFE_2BYTE_COPY amb_pressure,int_I_pres_respiration ; copy for deco routine
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94 movff int_I_pres_respiration+0,int_I_pres_surface+0 ; copy for desat routine
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95 movff int_I_pres_respiration+1,int_I_pres_surface+1
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96
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14a074e1a375 Split C code, and use direct linking.
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97 call deco_clear_tissue ;
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98 call deco_calc_desaturation_time ; calculate desaturation time
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99 call deco_clear_CNS_fraction ; clear CNS
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100 call calc_deko_surfmode ; calculate desaturation every minute
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101 call deco_calc_wo_deco_step_1_min ; calculate deco in surface mode
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102 movlb b'00000001' ; select ram bank 1
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103
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104 ; check firmware and reset Custom Functions after an update
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105 movlw LOW 0x101
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106 movwf EEADR
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107 movlw HIGH 0x101
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108 movwf EEADRH
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109 call read_eeprom ; read current version x
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110 movff EEDATA,temp1
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111 incf EEADR,F ; set to 0x102
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112 call read_eeprom ; read current version y
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113 movff EEDATA,temp2
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114 clrf EEADRH ; Reset EEADRH
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115
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116 movlw softwareversion_x
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117 cpfseq temp1 ; compare version x
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118 bra check_firmware_new ; is not equal -> reset CF and store new version in EEPROM
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119
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120 movlw softwareversion_y
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121 cpfseq temp2 ; compare version y
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122 bra check_firmware_new ; is not equal -> reset CF and store new version in EEPROM
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123 bra restart ; x and y are equal -> do not reset cf
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124
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125 check_firmware_new:
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126 movlw LOW 0x101 ; store current version in EEPROM
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127 movwf EEADR
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128 movlw HIGH 0x101
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129 movwf EEADRH
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130 movlw softwareversion_x
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131 movwf EEDATA
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132 call write_eeprom ; write version x
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133 incf EEADR,F ; set to 0x102
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134 movlw softwareversion_y
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135 movwf EEDATA
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136 call write_eeprom ; write version y
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137 clrf EEADRH ; Reset EEADRH
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138 goto reset_all_cf ; resets all custom functions bank0 and bank1 and jumps to "restart"
0
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139
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140 restart:
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141 bcf LED_red
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142 bcf LED_blue ; all LEDs off
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65d5b0c8da41 New CF48, changed CF15
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143 GETCUSTOM8 d'48' ; time correction value
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144 movff WREG, time_correction_value ; store in Bank0 register
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145
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146 clrf flag1 ; clear all flags
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147 clrf flag2
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148 clrf flag3
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149 clrf flag4
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150 clrf flag5
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151 clrf flag6
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152 clrf flag7
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153 clrf flag8
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154 clrf flag9
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155 clrf flag10
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156 clrf flag11
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157 clrf flag12
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158 clrf flag13
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159 clrf flag14
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160 clrf flag15
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161
169
e26f49674956 Merge decoplan display for both GF and Buhlmann models.
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162 ; Should we set win_flip_screen ?
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163 bsf flag1,0 ; Precondition to yes
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164 clrf EEADRH ; Reset EEADRH
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165 read_int_eeprom d'1'
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166 movlw .7
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167 cpfsgt EEDATA ; serial > 2048 (Mk2n hardware) ?
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168 bcf flag1,0
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169 incf EEDATA,W ; serial == 65535 (emulation) ?
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170 btfsc STATUS,Z
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171 bcf flag1,0
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172 movff flag1,win_flags ; store in Bank0 register
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173 clrf flag1 ; Clear flag1 (again)
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3ed240d60341 High altitude (Plane/Fly) mode added
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174
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175 ; Select high altitude (Fly) mode?
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176 movff last_surfpressure_30min+0,sub_b+0
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177 movff last_surfpressure_30min+1,sub_b+1
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178 movlw HIGH d'880'
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179 movwf sub_a+1
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180 movlw LOW d'880' ; Hard-wired 880mBar
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181 movwf sub_a+0
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182 call sub16 ; sub_c = sub_a - sub_b
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183 btfss neg_flag ; Result negative (Ambient>880mBar)?
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184 bsf high_altitude_mode ; No, Set Flag!
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185
e26f49674956 Merge decoplan display for both GF and Buhlmann models.
JeanDo
parents: 167
diff changeset
186 ; Should we disable sleep (hardware emulator)
154
a52ba692ad7f charger test
heinrichsweikamp
parents: 153
diff changeset
187 movlw .0
a52ba692ad7f charger test
heinrichsweikamp
parents: 153
diff changeset
188 cpfsgt EEDATA ; >256
167
cb055a7d75f3 + Use overlay local vars.
JeanDo
parents: 163
diff changeset
189 bsf nsm ; NO-SLEEP-MODE : for hardware debugging
153
17de42ab02b6 realtime clock defaults
heinrichsweikamp
parents: 142
diff changeset
190
142
8b75ba28d641 Screen-flipping custom function.
JeanDo
parents: 137
diff changeset
191 call gassetup_sort_gaslist ; Sorts Gaslist according to change depth
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
192 WIN_TOP .0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
193 WIN_LEFT .0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
194 WIN_FONT FT_SMALL
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
195 WIN_INVERT .0 ; Init new Wordprocessor
83
3e351e25f5d1 adding anti-aliased fonts frame and merging some patches from Jeando
heinrichsweikamp
parents: 62
diff changeset
196 setf WREG
3e351e25f5d1 adding anti-aliased fonts frame and merging some patches from Jeando
heinrichsweikamp
parents: 62
diff changeset
197 movff WREG,win_color1 ; Beware: win_color1 is bank0, and we are bank1 currently
3e351e25f5d1 adding anti-aliased fonts frame and merging some patches from Jeando
heinrichsweikamp
parents: 62
diff changeset
198 movff WREG,win_color2
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
199 call I2CReset ; Just in Case any I2C device blocks the Bus
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
200 movff last_surfpressure_30min+0,last_surfpressure+0 ; Use 30min old airpressure
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
201 movff last_surfpressure_30min+1,last_surfpressure+1 ; Use 30min old airpressure
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
202
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
203 ; Check if new CF were added in the last firmware version
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
204 clrf EEADRH
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
205 read_int_eeprom d'92' ; Read number of CF used in this firmware
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
206 movlw max_custom_number ; Defined in definitions.asm
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
207 cpfseq EEDATA ; Compare with last version
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
208 bra restart_01 ; New CF, show warning and store new number
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
209 bra restart_1 ; No new CF, continue with boot
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
210 restart_01:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
211 ; Save new number of current CF count
255
1efd59d689f8 small change in the set time menu, default setpoints set to 0.8, 1.0 and 1.2Bar
heinrichsweikamp
parents: 239
diff changeset
212 call PLED_boot ; PLED boot (Incl. Clear Screen!)
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
213 rcall display_new_cf_installed; Show warning
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
214 movlw max_custom_number ; Defined in definitions.asm
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
215 movwf EEDATA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
216 write_int_eeprom d'92' ; Store number of CF used in this firmware
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
217
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
218 restart_1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
219
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
220 ; Set Debug mode?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
221 read_int_eeprom d'39'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
222 bsf debug_mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
223 movlw d'1'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
224 cpfseq EEDATA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
225 bcf debug_mode ; clear flag if <> 1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
226
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
227 goto surfloop ; Jump to Surfaceloop!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
228
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
229
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
230 display_new_cf_installed:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
231 call PLED_new_cf_warning ; Display new CF warning screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
232 movlw d'20' ; timeout for warning screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
233 bra startup_screen3a ; Will RETURN after timeout or button press
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
234
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
235 ;=============================================================================
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
236 ; Setup all flags and parameters for divemode and simulator computations.
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
237 ;
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
238 restart_set_modes_and_flags: ; "Call"ed from divemode, as well!
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
239 bcf gauge_mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
240 bcf FLAG_const_ppO2_mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
241 bcf FLAG_apnoe_mode
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
242
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
243 ; Pre-load modes for OC, GF 90/90 and no Aponoe or Gauge.
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
244 bcf no_deco_customviews ; Clear no-deco-mode-flag
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
245 movlw d'0'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
246 movff WREG,char_I_deco_model ; Clear Flagbyte
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
247 ; Load GF values into RAM
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
248 movlw d'90'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
249 movff WREG,char_I_GF_Low_percentage
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
250 movff WREG,char_I_GF_High_percentage ; Set to 90/90...
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
251 clrf EEADRH
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
252 read_int_eeprom d'34' ; Read deco data
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
253 movlw d'1' ; Gauge mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
254 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
255 bra restart_3_test_ppO2_mode ; check for ppO2 mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
256 bsf gauge_mode ; Set flag for gauge mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
257 bsf no_deco_customviews ; Set no-deco-mode-flag
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
258 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
259 restart_3_test_ppO2_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
260 movlw d'2' ; const ppO2 mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
261 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
262 bra restart_3_test_apnoe_mode; check for apnoe mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
263 bsf FLAG_const_ppO2_mode ; Set flag for ppO2 mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
264 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
265 restart_3_test_apnoe_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
266 movlw d'3' ; Apnoe mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
267 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
268 bra restart_4_test_gf_mode ; check for GF OC mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
269 bsf FLAG_apnoe_mode ; Set flag for Apnoe Mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
270 bsf no_deco_customviews ; Set no-deco-mode-flag
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
271 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
272 restart_4_test_gf_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
273 movlw d'4' ; GF OC mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
274 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
275 bra restart_5_test_gfO2_mode ; check for GF CC mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
276 movlw d'1'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
277 movff WREG,char_I_deco_model ; Set Flagbyte for GF method
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
278 ; Load GF values into RAM
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
279 GETCUSTOM8 d'32' ; GF low
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
280 movff EEDATA,char_I_GF_Low_percentage
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
281 GETCUSTOM8 d'33' ; GF high
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
282 movff EEDATA,char_I_GF_High_percentage
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
283 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
284 restart_5_test_gfO2_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
285 movlw d'5' ; GF CC mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
286 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
287 return ; Start in Surfacemode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
288 bsf FLAG_const_ppO2_mode ; Set flag for ppO2 mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
289 movlw d'1'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
290 movff WREG,char_I_deco_model ; Set Flagbyte for GF method
137
e6aa4a74c3c2 Fix: Customviews for Apnoe and Gauge mode
mh <>
parents: 119
diff changeset
291 ; Load GF values into RAM
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
292 GETCUSTOM8 d'32' ; GF low
163
144822282fa3 Fusion declaration of shared C/ASM variables.
JeanDo
parents: 160
diff changeset
293 movff EEDATA,char_I_GF_Low_percentage
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
294 GETCUSTOM8 d'33' ; GF high
163
144822282fa3 Fusion declaration of shared C/ASM variables.
JeanDo
parents: 160
diff changeset
295 movff EEDATA,char_I_GF_High_percentage
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
296 return ; start in Surfacemode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
297
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
298 ;=============================================================================
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
299
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
300 startup_screen1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
301 call PLED_ClearScreen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
302 call PLED_startupscreen1 ; show startup sreen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
303 startup_screen1_2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
304 movlw d'10' ; timeout for startup screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
305 movwf temp1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
306 WAITMS d'200'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
307 bcf switch_left
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
308 bcf switch_right
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
309 screen1_loop:
337
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
310 btfsc uart_dump_screen ; Asked to dump screen contains ?
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
311 call dump_screen ; Yes!
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
312
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
313 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
314 call set_dive_modes ; tests if depth>threshold
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
315 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
316 decf temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
317 bcf onesecupdate ; every second tasks done
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
318
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
319 tstfsz temp1 ; timout occured?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
320 bra screen1_loop2 ; no
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
321 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
322
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
323 screen1_loop2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
324 btfsc divemode ; Divemode active?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
325 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
326 btfsc switch_left ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
327 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
328 btfsc switch_right ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
329 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
330 bra screen1_loop ; loop screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
331
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
332 startup_screen2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
333 call PLED_ClearScreen ; Page 1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
334 call PLED_startupscreen2 ; show startup sreen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
335 bra startup_screen1_2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
336
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
337 startup_screen3a:; WARNING: Also used for decodescriptions and CF Warning screen!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
338 movwf temp1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
339 WAITMS d'200'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
340 bcf switch_left
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
341 bcf switch_right
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
342 screen3_loop:
337
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
343 btfsc uart_dump_screen ; Asked to dump screen contains ?
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
344 call dump_screen ; Yes!
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
345
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
346 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
347 call set_dive_modes ; tests if depth>threshold
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
348
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
349 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
350 decf temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
351 bcf onesecupdate ; every second tasks done
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
352
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
353 tstfsz temp1 ; timout occured?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
354 bra screen3_loop2 ; no
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
355 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
356 screen3_loop2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
357 btfsc switch_left ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
358 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
359 btfsc switch_right ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
360 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
361 bra screen3_loop ; loop screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
362
337
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
363 ;=============================================================================
6bdf80d7276c Added screen dumps of general menus.
JeanDo
parents: 327
diff changeset
364
306
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
365 first_start:
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
366 movlw max_custom_number ; Defined in definitions.asm
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
367 movwf EEDATA
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
368 write_int_eeprom d'92' ; Store number of CF used in this firmware
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
369 bra start3 ; continue with normal start
ab1678d98e46 some changes for cf defaults
heinrichsweikamp
parents: 255
diff changeset
370
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
371 init:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
372 movlw b'01101100' ; 4MHz (x4 PLL)
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
373 movwf OSCCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
374
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
375 movlw b'00010001' ; I/O Ports
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
376 movwf TRISA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
377 clrf PORTA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
378 movlw b'00000011'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
379 movwf TRISB
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
380 clrf PORTB
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
381 movlw b'11011101' ; UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
382 movwf TRISC
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
383 clrf PORTC
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
384 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
385 movwf TRISE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
386 clrf PORTE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
387 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
388 movwf TRISD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
389 clrf PORTD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
390
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
391 movlw b'01000000' ; Bit6: PPL enable
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
392 movwf OSCTUNE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
393
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
394 movlw b'00011111' ; Timer0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
395 movwf T0CON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
396
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
397 movlw b'00000111' ; Timer1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
398 movwf T1CON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
399
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
400 movlw b'11010000' ; Interrups
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
401 movwf INTCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
402 movlw b'00000101'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
403 movwf INTCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
404 movlw b'00001000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
405 movwf INTCON3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
406 movlw b'00100001'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
407 movwf PIE1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
408 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
409 movwf PIE2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
410 clrf RCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
411
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
412 movlw b'00000000' ; A/D Converter
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
413 movwf ADCON0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
414 movlw b'00001110'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
415 movwf ADCON1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
416 movlw b'10001010' ; Right justified
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
417 movwf ADCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
418
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
419 clrf SSPCON1 ; Set I²C Mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
420 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
421 movwf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
422 movlw b'00101000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
423 movwf SSPCON1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
424 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
425 movwf SSPCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
426 movlw d'8' ; 400kHz I2C clock @ 16MHz Fcy
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
427 movwf SSPADD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
428
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
429 clrf CCP1CON ; PWM Module off
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
430 clrf ECCP1CON ; PWM Module off
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
431
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
432 movlw b'00000111' ; Comperator Module off
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
433 movwf CMCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
434
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
435 movlw b'00100000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
436 movwf CANCON ; ECAN Module OFF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
437
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
438 movlw b'00100100' ; UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
439 movwf TXSTA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
440 movlw b'10010000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
441 movwf RCSTA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
442 movlw b'00001000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
443 movwf BAUDCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
444 clrf SPBRGH
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
445 movlw d'34'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
446 movwf SPBRG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
447 clrf RCREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
448 clrf PIR1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
449 return