annotate code_part1/OSTC_code_asm_part1/i2c_eeprom.asm @ 10:b7ace8994b29

1.52 beta
author heinrichsweikamp
date Fri, 19 Mar 2010 13:57:58 +0100
parents 96a35aeda5f2
children 73014f788032
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
2 ; OSTC - diving computer code
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
3 ; Copyright (C) 2008 HeinrichsWeikamp GbR
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
4 ; This program is free software: you can redistribute it and/or modify
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
5 ; it under the terms of the GNU General Public License as published by
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
6 ; the Free Software Foundation, either version 3 of the License, or
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
7 ; (at your option) any later version.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
8 ; This program is distributed in the hope that it will be useful,
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
9 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
10 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
11 ; GNU General Public License for more details.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
12 ; You should have received a copy of the GNU General Public License
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
13 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
14 ; provides routines for external EEPROM via I2C
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
15 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
16 ; written: 10/30/05
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
17 ; last updated: 08/21/06
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
18 ; known bugs:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
19 ; ToDo: use 2nd 32KB from external EEPROM for something
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
20
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
21 incf_eeprom_address macro ext_ee_temp1 ; Will increase eeprom_address:2 with the 8Bit value "ext_ee_temp1" and takes
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
22 movlw ext_ee_temp1 ; care of bank switching at 0x8000
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
23 call incf_eeprom_address0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
24 endm
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
25
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
26 incf_eeprom_address0:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
27 movwf ext_ee_temp1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
28 incf_eeprom_address1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
29 movlw d'1' ; increase address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
30 addwf eeprom_address+0,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
31 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
32 addwfc eeprom_address+1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
33 btfss eeprom_address+1,7 ; at address 8000?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
34 bra incf_eeprom_address2 ; No, continue
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
35
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
36 ; Yes, clear eeprom_address:2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
37 clrf eeprom_address+0 ; Clear eeprom address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
38 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
39
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
40 incf_eeprom_address2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
41 decfsz ext_ee_temp1,F ; All done?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
42 bra incf_eeprom_address1 ; No, continue
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
43 return ; Done.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
44
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
45 decf_eeprom_address macro ext_ee_temp1 ; Will decrease eeprom_address:2 with the 8Bit value "ext_ee_temp1" and takes
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
46 movlw ext_ee_temp1 ; care of bank switching at 0x8000
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
47 call decf_eeprom_address0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
48 endm
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
49
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
50 decf_eeprom_address0:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
51 movwf ext_ee_temp1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
52 decf_eeprom_address1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
53 movlw d'1' ; decrease address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
54 subwf eeprom_address+0,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
55 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
56 subwfb eeprom_address+1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
57
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
58 btfss eeprom_address+1,7 ; at address 8000?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
59 bra decf_eeprom_address2 ; No, continue
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
60
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
61 movlw b'01111111' ; yes, reset highbyte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
62 movwf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
63
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
64 decf_eeprom_address2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
65 decfsz ext_ee_temp1,F ; All done?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
66 bra decf_eeprom_address1 ; No, continue
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
67 return ; Done.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
68
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
69
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
70 write_external_eeprom: ; data in WREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
71 ; increase address eeprom_address+0:eeprom_address+1 after write
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
72 ; with banking after 7FFF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
73 rcall I2CWRITE ; writes WREG into EEPROM@eeprom_address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
74 movlw d'1' ; increase address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
75 addwf eeprom_address+0,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
76 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
77 addwfc eeprom_address+1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
78 bcf eeprom_overflow
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
79 btfss eeprom_address+1,7 ; at address 8000?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
80 return ; no, return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
81
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
82 clrf eeprom_address+0 ; Clear eeprom address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
83 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
84 bsf eeprom_overflow ; and set overflow bit
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
85 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
86 write_external_eeprom_block: ; Writes a block of 64Byte (one page in external EEPROM without stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
87 btfsc eeprom_blockwrite ; Blockwrite continue?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
88 rcall I2CWRITE_BLOCK2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
89 btfss eeprom_blockwrite ; Blockwrite start?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
90 rcall I2CWRITE_BLOCK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
91 bsf eeprom_blockwrite ; After the start, do blockwriting for the next 63Bytes!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
92
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
93 movlw d'0' ; increase address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
94 incf eeprom_address+0,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
95 addwfc eeprom_address+1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
96 bcf eeprom_overflow
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
97
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
98 btfss eeprom_address+1,7 ; at address 8000
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
99 return ; no, return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
100
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
101 clrf eeprom_address+0 ; Clear eeprom address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
102 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
103 bsf eeprom_overflow ; and set overflow bit
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
104 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
105 I2CWRITE_BLOCK:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
106 movwf ext_ee_temp1 ; Data byte in WREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
107 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
108 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
109 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
110 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
111 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
112 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
113 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
114 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
115 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
116 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
117 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
118 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
119 I2CWRITE_BLOCK2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
120 movff ext_ee_temp1, SSPBUF ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
121 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
122 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
123 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
124
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
125
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
126 get_free_EEPROM_location: ; Searches 0xFD, 0xFD, 0xFE and sets Pointer to 0xFE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
127 clrf ext_ee_temp1 ; low address counter
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
128 clrf ext_ee_temp2 ; high address counter
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
129 bcf second_FD ; clear flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
130 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
131 get_free_EEPROM_location3:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
132 bsf SSPCON2, PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
133 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
134 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
135 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
136 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
137 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
138 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
139 btfsc SSPCON2,ACKSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
140 bra get_free_EEPROM_location3 ; EEPROM NOT acknowledged, retry!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
141
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
142 movff ext_ee_temp2,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
143 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
144 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
145 movff ext_ee_temp1,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
146 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
147 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
148
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
149 bsf SSPCON2,RSEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
150 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
151 movlw b'10100111' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
152 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
153 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
154 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
155
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
156 get_free_EEPROM_location2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
157 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
158 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
159 btfsc first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
160 bra test_2nd_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
161 bsf first_FD ; found first 0xFD?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
162 movlw 0xFD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
163 cpfseq SSPBUF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
164 bcf first_FD ; No
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
165 bra get_free_EEPROM_location2c
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
166
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
167 test_2nd_FD:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
168 btfsc second_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
169 bra test_FE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
170 bsf second_FD ; found second 0xFD?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
171 movlw 0xFD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
172 cpfseq SSPBUF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
173 bra get_free_EEPROM_location2b ;No, clear both flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
174 bra get_free_EEPROM_location2c
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
175 test_FE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
176 movlw 0xFE ; found the final 0xFE?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
177 cpfseq SSPBUF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
178 bra get_free_EEPROM_location2b ;No, clear both flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
179 movff ext_ee_temp1,eeprom_address+0 ;Yes, copy ext_ee_temp1->eeprom_address+0 and
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
180 movff ext_ee_temp2,eeprom_address+1 ;ext_ee_temp2->eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
181 bra get_free_EEPROM_location4 ; Done.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
182
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
183 get_free_EEPROM_location2b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
184 bcf second_FD ; clear both flags!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
185 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
186 get_free_EEPROM_location2c:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
187 movlw d'1' ; and increase search address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
188 addwf ext_ee_temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
189 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
190 addwfc ext_ee_temp2,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
191
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
192 btfsc ext_ee_temp2,7 ; 8000 reached?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
193 bra get_free_EEPROM_location3b ; yes
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
194
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
195 bsf SSPCON2, ACKEN ; no, send Ack
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
196 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
197 bra get_free_EEPROM_location2 ; and continue search
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
198 get_free_EEPROM_location3b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
199 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
200 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
201 get_free_EEPROM_location4:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
202 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
203 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
204
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
205 bcf second_FD ; clear flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
206 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
207 return ; return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
208
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
209
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
210 I2CREAD:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
211 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
212 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
213 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
214 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
215 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
216 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
217 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
218 btfsc SSPCON2,ACKSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
219 bra I2CREAD ; EEPROM NOT acknowledged, retry!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
220 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
221 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
222 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
223 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
224 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
225 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
226
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
227 bsf SSPCON2,RSEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
228 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
229 movlw b'10100111' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
230 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
231 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
232 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
233
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
234 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
235 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
236 movf SSPBUF,W ; copy read byte into WREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
237 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
238 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
239 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
240
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
241 I2CREAD2: ; same as I2CREAD but with automatic address increase
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
242 rcall I2CREAD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
243 movlw d'1'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
244 addwf eeprom_address+0,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
245 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
246 addwfc eeprom_address+1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
247 bcf eeprom_overflow
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
248 btfss eeprom_address+1,7 ; at 0x8000?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
249 return ; no, return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
250
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
251 clrf eeprom_address+0 ; Yes, clear address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
252 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
253 bsf eeprom_overflow ; and set overflow bit
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
254 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
255
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
256 I2CWRITE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
257 movwf ext_ee_temp1 ; Data byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
258 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
259 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
260 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
261 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
262 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
263 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
264 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
265 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
266 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
267 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
268 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
269 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
270 movff ext_ee_temp1, SSPBUF ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
271 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
272 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
273 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
274 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
275 WAITMS d'6' ; Write delay
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
276 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
277
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
278 I2C_WaitforACK:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
279 btfsc SSPCON2,ACKSTAT ; checks for ACK bit from slave
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
280 rcall I2CFail
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
281 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
282
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
283 I2CFail:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
284 ostc_debug 'M' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
285 call set_LEDy
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
286 rcall I2CReset ; I2C Reset
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
287 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
288 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
289 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
290
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
291 WaitMSSP:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
292 decfsz i2c_temp,F ; check for timeout during I2C action
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
293 bra WaitMSSP2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
294 bra I2CFail ; timeout occured
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
295 WaitMSSP2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
296 btfss PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
297 bra WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
298 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
299 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
300 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
301
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
302 I2CReset: ; Something went wrong (Slave holds SDA low?)
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
303 clrf SSPCON1 ; wake-up slave and reset entire module
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
304 ostc_debug 'N' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
305 clrf SSPCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
306 clrf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
307 bcf TRISC,3 ; SCL OUTPUT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
308 bsf TRISC,4 ; SDA Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
309 bcf PORTC,3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
310 movlw d'9'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
311 movwf i2c_temp ; clock-out 9 clock cycles manually
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
312 I2CReset_1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
313 bsf PORTC,3 ; SCL=1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
314 nop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
315 btfsc PORTC,4 ; SDA=1?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
316 bra I2CReset_2 ; =1, SDA has been released from slave
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
317 bcf PORTC,3 ; SCL=0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
318 bcf PORTC,3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
319 decfsz i2c_temp,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
320 bra I2CReset_1 ; check for nine clock cycles
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
321 I2CReset_2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
322 bsf TRISC,3 ; SCL Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
323 clrf SSPCON1 ; set I²C Mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
324 WAITMS d'10' ; Reset-Timeout for I2C devices
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
325 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
326 movwf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
327 movlw b'00101000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
328 movwf SSPCON1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
329 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
330 movwf SSPCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
331 movlw d'8' ; 400kHz I2C clock @ 16MHz Fcy
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
332 movwf SSPADD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
333 call clear_LEDy
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
334 ostc_debug 'O' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
335 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
336 I2C_TX:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
337 movwf i2c_temp2 ; Data byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
338 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
339 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
340 movlw b'10010000' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
341 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
342 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
343 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
344 movff i2c_temp2, SSPBUF ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
345 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
346 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
347 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
348 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
349 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
350 I2C_RX:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
351 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
352 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
353 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
354 movlw b'10010001' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
355 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
356 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
357 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
358 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
359 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
360 movff SSPBUF,i2c_temp2 ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
361 bsf SSPCON2,ACKEN ; Master acknowlegde
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
362 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
363 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
364 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
365 return