annotate code_part1/OSTC_code_asm_part1/start.asm @ 235:ade0848c8b8b

New runtime asserts when compiled in DEBUG more. When __DEBUG is defined, the assert() calls are checked, and PLED_resetdebugger is called when the condition fails.
author JeanDo
date Sat, 19 Mar 2011 11:34:32 +0100
parents 2cbaa01dac26
children 3dbeacf42e9e
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1 ; OSTC - diving computer code
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2 ; Copyright (C) 2008 HeinrichsWeikamp GbR
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3
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4 ; This program is free software: you can redistribute it and/or modify
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5 ; it under the terms of the GNU General Public License as published by
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6 ; the Free Software Foundation, either version 3 of the License, or
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7 ; (at your option) any later version.
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8
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9 ; This program is distributed in the hope that it will be useful,
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10 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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12 ; GNU General Public License for more details.
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13
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14 ; You should have received a copy of the GNU General Public License
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15 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
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16
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17
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18 ; Start and init
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19 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
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20 ; written: 10/13/04
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21 ; last updated: 06/24/08
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22 ; known bugs:
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23 ; ToDo:
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24
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25 start:
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26 movlb b'00000001' ; ram bank 1 selected
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f24137eb85de Background debugger now shows STKPTR
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27 movff STKPTR,temp10
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ade0848c8b8b New runtime asserts when compiled in DEBUG more.
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28 clrf temp10+1
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29
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30 call init
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31 btfsc divemode ; Reset from Divemode?
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32 call PLED_resetdebugger ; Yes! Something went wrong, show reset informations
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33
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34 clrf STKPTR ; Clear Stackpointer
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35 lfsr FSR0, 10Bh ; Clear rambank 1-9, do not delete RTC registers
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36 clear_rambank:
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37 clrf POSTINC0
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38 movlw 0x0A
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39 cpfseq FSR0H ; Bank 9 done?
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40 bra clear_rambank ; clear...
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41
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42 ; Defaults for RTC
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43 call disable_rs232 ; disable UART module
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44 call RTCinit ; reset RTC
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45
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46 ; Air pressure compensation after reset
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47 call get_calibration_data ; Get calibration data from pressure sensor
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48
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49 bcf pressure_refresh
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50 wait_start_pressure:
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51 btfss pressure_refresh ; Air pressure compensation
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52 bra wait_start_pressure
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53
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54 clrf rel_pressure+0
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55 clrf rel_pressure+1
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56 clrf surface_interval+0
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57 clrf surface_interval+1
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58
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59 bsf sleepmode ; Routine only works in sleepmode...
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60 call pressuretest_sleep_fast ; Gets pressure without averaging (faster!)
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61 bcf sleepmode ; Normal mode again
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62
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63 movff amb_pressure+0,last_surfpressure+0
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64 movff amb_pressure+1,last_surfpressure+1
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65 movff amb_pressure+0,last_surfpressure_15min+0
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66 movff amb_pressure+1,last_surfpressure_15min+1
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67 movff amb_pressure+0,last_surfpressure_30min+0
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68 movff amb_pressure+1,last_surfpressure_30min+1 ; Rests all airpressure registers
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69
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70 ; Extra power-up reset (JeanDo)
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71 ifdef TESTING
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72 call do_menu_reset_all2
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73 endif
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74
0
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75 ; reset deco data
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76 clrf WREG ; Use as buffer
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77 movff WREG,char_I_He_ratio ; No He at the Surface
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78 movlw d'79' ; 79% N2
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79 movff WREG,char_I_N2_ratio ; No He at the Surface
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80 movff amb_pressure+0,int_I_pres_respiration+0 ; copy surface air pressure to deco routine
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81 movff amb_pressure+1,int_I_pres_respiration+1
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82
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83 clrf WREG
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2b52a4a7dce6 preparations for new deco code...
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84 movff WREG,char_I_step_is_1min ; 2 second deco mode
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14a074e1a375 Split C code, and use direct linking.
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85 call deco_clear_tissue ;
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86 call deco_calc_desaturation_time ; calculate desaturation time
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87 call deco_clear_CNS_fraction ; clear CNS
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88 call calc_deko_surfmode ; calculate desaturation every minute
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89 call deco_calc_wo_deco_step_1_min ; calculate deco in surface mode
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90 movlb b'00000001' ; select ram bank 1
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91
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92 ; check firmware and reset Custom Functions after an update
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93 movlw LOW 0x101
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94 movwf EEADR
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95 movlw HIGH 0x101
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96 movwf EEADRH
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97 call read_eeprom ; read current version x
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98 movff EEDATA,temp1
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99 incf EEADR,F ; set to 0x102
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100 call read_eeprom ; read current version y
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101 movff EEDATA,temp2
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102 clrf EEADRH ; Reset EEADRH
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103
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104 movlw softwareversion_x
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105 cpfseq temp1 ; compare version x
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106 bra check_firmware_new ; is not equal -> reset CF and store new version in EEPROM
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107
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108 movlw softwareversion_y
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109 cpfseq temp2 ; compare version y
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110 bra check_firmware_new ; is not equal -> reset CF and store new version in EEPROM
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111 bra restart ; x and y are equal -> do not reset cf
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112
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113 check_firmware_new:
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114 movlw LOW 0x101 ; store current version in EEPROM
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115 movwf EEADR
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116 movlw HIGH 0x101
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117 movwf EEADRH
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118 movlw softwareversion_x
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119 movwf EEDATA
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120 call write_eeprom ; write version x
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121 incf EEADR,F ; set to 0x102
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122 movlw softwareversion_y
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123 movwf EEDATA
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124 call write_eeprom ; write version y
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125 clrf EEADRH ; Reset EEADRH
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126 ; goto reset_all_cf ; resets all custom functions bank0 and bank1 and jumps to "restart"
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127 ; goto reset_all_cf_bank1 ; resets all custom functions bank1 and jumps to "restart"
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128
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129 restart:
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130 bcf LED_red
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131 bcf LED_blue ; all LEDs off
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132 GETCUSTOM8 d'48' ; time correction value
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133 movff WREG, time_correction_value ; store in Bank0 register
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134
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135 clrf flag1 ; clear all flags
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136 clrf flag2
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137 clrf flag3
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138 clrf flag4
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139 clrf flag5
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140 clrf flag6
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141 clrf flag7
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142 clrf flag8
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143 clrf flag9
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144 clrf flag10
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145 clrf flag11
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146 clrf flag12
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147 clrf flag13
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148 clrf flag14
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149 clrf flag15
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150
169
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151 ; Should we set win_flip_screen ?
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152 bsf flag1,0 ; Precondition to yes
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153 clrf EEADRH ; Reset EEADRH
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154 read_int_eeprom d'1'
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155 movlw .7
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156 cpfsgt EEDATA ; serial > 2048 (Mk2n hardware) ?
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157 bcf flag1,0
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158 incf EEDATA,W ; serial == 65535 (emulation) ?
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159 btfsc STATUS,Z
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160 bcf flag1,0
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161 movff flag1,win_flags ; store in Bank0 register
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162 clrf flag1 ; Clear flag1 (again)
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163
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164 ; Should we disable sleep (hardware emulator)
154
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165 movlw .0
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166 cpfsgt EEDATA ; >256
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167 bsf nsm ; NO-SLEEP-MODE : for hardware debugging
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168
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169 call gassetup_sort_gaslist ; Sorts Gaslist according to change depth
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170 call PLED_boot ; PLED boot (Incl. Clear Screen!)
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171 WIN_TOP .0
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172 WIN_LEFT .0
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173 WIN_FONT FT_SMALL
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174 WIN_INVERT .0 ; Init new Wordprocessor
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175 setf WREG
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176 movff WREG,win_color1 ; Beware: win_color1 is bank0, and we are bank1 currently
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177 movff WREG,win_color2
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178 call I2CReset ; Just in Case any I2C device blocks the Bus
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179 movff last_surfpressure_30min+0,last_surfpressure+0 ; Use 30min old airpressure
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180 movff last_surfpressure_30min+1,last_surfpressure+1 ; Use 30min old airpressure
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181
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182 ; Check if new CF were added in the last firmware version
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183 clrf EEADRH
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184 read_int_eeprom d'92' ; Read number of CF used in this firmware
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185 movlw max_custom_number ; Defined in definitions.asm
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186 cpfseq EEDATA ; Compare with last version
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187 bra restart_01 ; New CF, show warning and store new number
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188 bra restart_1 ; No new CF, continue with boot
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189 restart_01:
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heinrichsweikamp
parents:
diff changeset
190 ; Save new number of current CF count
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
191 rcall display_new_cf_installed; Show warning
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
192 movlw max_custom_number ; Defined in definitions.asm
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
193 movwf EEDATA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
194 write_int_eeprom d'92' ; Store number of CF used in this firmware
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
195
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
196 restart_1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
197
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
198 ; Set Debug mode?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
199 read_int_eeprom d'39'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
200 bsf debug_mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
201 movlw d'1'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
202 cpfseq EEDATA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
203 bcf debug_mode ; clear flag if <> 1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
204
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
205 goto surfloop ; Jump to Surfaceloop!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
206
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
207
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
208 display_new_cf_installed:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
209 call PLED_new_cf_warning ; Display new CF warning screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
210 movlw d'20' ; timeout for warning screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
211 bra startup_screen3a ; Will RETURN after timeout or button press
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
212
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
213 ;=============================================================================
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
214 ; Setup all flags and parameters for divemode and simulator computations.
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
215 ;
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
216 restart_set_modes_and_flags: ; "Call"ed from divemode, as well!
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
217 bcf gauge_mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
218 bcf FLAG_const_ppO2_mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
219 bcf FLAG_apnoe_mode
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
220
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
221 ; Pre-load modes for OC, GF 90/90 and no Aponoe or Gauge.
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
222 bcf no_deco_customviews ; Clear no-deco-mode-flag
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
223 movlw d'0'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
224 movff WREG,char_I_deco_model ; Clear Flagbyte
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
225 ; Load GF values into RAM
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
226 movlw d'90'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
227 movff WREG,char_I_GF_Low_percentage
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
228 movff WREG,char_I_GF_High_percentage ; Set to 90/90...
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
229 clrf EEADRH
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
230 read_int_eeprom d'34' ; Read deco data
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
231 movlw d'1' ; Gauge mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
232 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
233 bra restart_3_test_ppO2_mode ; check for ppO2 mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
234 bsf gauge_mode ; Set flag for gauge mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
235 bsf no_deco_customviews ; Set no-deco-mode-flag
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
236 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
237 restart_3_test_ppO2_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
238 movlw d'2' ; const ppO2 mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
239 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
240 bra restart_3_test_apnoe_mode; check for apnoe mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
241 bsf FLAG_const_ppO2_mode ; Set flag for ppO2 mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
242 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
243 restart_3_test_apnoe_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
244 movlw d'3' ; Apnoe mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
245 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
246 bra restart_4_test_gf_mode ; check for GF OC mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
247 bsf FLAG_apnoe_mode ; Set flag for Apnoe Mode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
248 bsf no_deco_customviews ; Set no-deco-mode-flag
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
249 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
250 restart_4_test_gf_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
251 movlw d'4' ; GF OC mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
252 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
253 bra restart_5_test_gfO2_mode ; check for GF CC mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
254 movlw d'1'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
255 movff WREG,char_I_deco_model ; Set Flagbyte for GF method
45
985607cfb813 1.65beta
heinrichsweikamp
parents: 43
diff changeset
256 ; Load GF values into RAM
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
257 GETCUSTOM8 d'32' ; GF low
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
258 movff EEDATA,char_I_GF_Low_percentage
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
259 GETCUSTOM8 d'33' ; GF high
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
260 movff EEDATA,char_I_GF_High_percentage
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
261 return ; start in Surfacemode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
262 restart_5_test_gfO2_mode:
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
263 movlw d'5' ; GF CC mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
264 cpfseq EEDATA
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
265 return ; Start in Surfacemode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
266 bsf FLAG_const_ppO2_mode ; Set flag for ppO2 mode
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
267 movlw d'1'
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
268 movff WREG,char_I_deco_model ; Set Flagbyte for GF method
137
e6aa4a74c3c2 Fix: Customviews for Apnoe and Gauge mode
mh <>
parents: 119
diff changeset
269 ; Load GF values into RAM
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
270 GETCUSTOM8 d'32' ; GF low
163
144822282fa3 Fusion declaration of shared C/ASM variables.
JeanDo
parents: 160
diff changeset
271 movff EEDATA,char_I_GF_Low_percentage
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
272 GETCUSTOM8 d'33' ; GF high
163
144822282fa3 Fusion declaration of shared C/ASM variables.
JeanDo
parents: 160
diff changeset
273 movff EEDATA,char_I_GF_High_percentage
197
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
274 return ; start in Surfacemode
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
275
f15e804ff67f Gas switch delay
JeanDo
parents: 169
diff changeset
276 ;=============================================================================
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
277
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
278 startup_screen1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
279 call PLED_ClearScreen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
280 call PLED_startupscreen1 ; show startup sreen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
281 startup_screen1_2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
282 movlw d'10' ; timeout for startup screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
283 movwf temp1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
284 WAITMS d'200'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
285 bcf switch_left
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
286 bcf switch_right
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
287 screen1_loop:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
288 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
289 call set_dive_modes ; tests if depth>threshold
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
290 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
291 decf temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
292 bcf onesecupdate ; every second tasks done
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
293
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
294 tstfsz temp1 ; timout occured?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
295 bra screen1_loop2 ; no
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
296 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
297
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
298 screen1_loop2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
299 btfsc divemode ; Divemode active?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
300 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
301 btfsc switch_left ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
302 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
303 btfsc switch_right ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
304 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
305 bra screen1_loop ; loop screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
306
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
307 startup_screen2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
308 call PLED_ClearScreen ; Page 1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
309 call PLED_startupscreen2 ; show startup sreen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
310 bra startup_screen1_2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
311
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
312 startup_screen3a:; WARNING: Also used for decodescriptions and CF Warning screen!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
313 movwf temp1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
314 WAITMS d'200'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
315 bcf switch_left
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
316 bcf switch_right
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
317 screen3_loop:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
318 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
319 call set_dive_modes ; tests if depth>threshold
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
320
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
321 btfsc onesecupdate ; do every second tasks?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
322 decf temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
323 bcf onesecupdate ; every second tasks done
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
324
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
325 tstfsz temp1 ; timout occured?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
326 bra screen3_loop2 ; no
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
327 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
328 screen3_loop2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
329 btfsc switch_left ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
330 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
331 btfsc switch_right ; Ack?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
332 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
333 bra screen3_loop ; loop screen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
334
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
335 init:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
336 movlw b'01101100' ; 4MHz (x4 PLL)
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
337 movwf OSCCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
338
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
339 movlw b'00010001' ; I/O Ports
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
340 movwf TRISA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
341 clrf PORTA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
342 movlw b'00000011'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
343 movwf TRISB
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
344 clrf PORTB
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
345 movlw b'11011101' ; UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
346 movwf TRISC
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
347 clrf PORTC
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
348 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
349 movwf TRISE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
350 clrf PORTE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
351 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
352 movwf TRISD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
353 clrf PORTD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
354
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
355 movlw b'01000000' ; Bit6: PPL enable
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
356 movwf OSCTUNE
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
357
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
358 movlw b'00011111' ; Timer0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
359 movwf T0CON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
360
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
361 movlw b'00000111' ; Timer1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
362 movwf T1CON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
363
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
364 movlw b'11010000' ; Interrups
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
365 movwf INTCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
366 movlw b'00000101'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
367 movwf INTCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
368 movlw b'00001000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
369 movwf INTCON3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
370 movlw b'00100001'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
371 movwf PIE1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
372 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
373 movwf PIE2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
374 clrf RCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
375
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
376 movlw b'00000000' ; A/D Converter
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
377 movwf ADCON0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
378 movlw b'00001110'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
379 movwf ADCON1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
380 movlw b'10001010' ; Right justified
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
381 movwf ADCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
382
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
383 clrf SSPCON1 ; Set I²C Mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
384 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
385 movwf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
386 movlw b'00101000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
387 movwf SSPCON1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
388 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
389 movwf SSPCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
390 movlw d'8' ; 400kHz I2C clock @ 16MHz Fcy
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
391 movwf SSPADD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
392
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
393 clrf CCP1CON ; PWM Module off
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
394 clrf ECCP1CON ; PWM Module off
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
395
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
396 movlw b'00000111' ; Comperator Module off
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
397 movwf CMCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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398
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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399 movlw b'00100000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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400 movwf CANCON ; ECAN Module OFF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
401
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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402 movlw b'00100100' ; UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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403 movwf TXSTA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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404 movlw b'10010000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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405 movwf RCSTA
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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406 movlw b'00001000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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407 movwf BAUDCON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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408 clrf SPBRGH
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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409 movlw d'34'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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410 movwf SPBRG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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411 clrf RCREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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412 clrf PIR1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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413 return