Mercurial > public > mk2
annotate code_part1/OSTC_code_asm_part1/eeprom_rs232.asm @ 653:994a04d7ae57
2.55beta start
author | heinrichsweikamp |
---|---|
date | Fri, 12 Oct 2012 11:05:34 +0200 |
parents | fbd5e2b75a63 |
children | 6e456a6398e0 |
rev | line source |
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0 | 1 ; OSTC - diving computer code |
2 ; Copyright (C) 2008 HeinrichsWeikamp GbR | |
3 | |
4 ; This program is free software: you can redistribute it and/or modify | |
5 ; it under the terms of the GNU General Public License as published by | |
6 ; the Free Software Foundation, either version 3 of the License, or | |
7 ; (at your option) any later version. | |
8 | |
9 ; This program is distributed in the hope that it will be useful, | |
10 ; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 ; GNU General Public License for more details. | |
13 | |
14 ; You should have received a copy of the GNU General Public License | |
15 ; along with this program. If not, see <http://www.gnu.org/licenses/>. | |
16 | |
17 | |
18 ; internal EEPROM and RS232 UART interface | |
19 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com | |
20 ; written: 02/01/06 | |
21 ; last updated: 090109 | |
22 ; known bugs: | |
23 ; ToDo: | |
24 | |
25 write_int_eeprom macro eeprom_address | |
26 movlw eeprom_address | |
27 call write_int_eeprom_1 | |
28 endm | |
29 | |
30 write_int_eeprom_1: | |
31 movwf EEADR | |
32 bra write_eeprom ; writes and "returns" after write | |
33 | |
34 read_int_eeprom macro eeprom_address | |
35 movlw eeprom_address | |
36 call read_int_eeprom_1 | |
37 endm | |
38 | |
39 read_int_eeprom_1: | |
40 movwf EEADR | |
41 bra read_eeprom ; reads and "returns" after write | |
42 | |
578 | 43 internal_eeprom_access_b2: ; accesses internal EEPROM BANK 2 via the UART |
44 bcf internal_eeprom_write3 ; clear flag! | |
45 movlw d'2' | |
46 movwf EEADRH ;BANK1 | |
47 movlw "n" | |
48 bra internal_eeprom_access1 ; Continue with common routines | |
49 | |
0 | 50 internal_eeprom_access_b1: ; accesses internal EEPROM BANK 1 via the UART |
51 bcf internal_eeprom_write2 ; clear flag! | |
52 movlw d'1' | |
53 movwf EEADRH ;BANK1 | |
54 movlw "i" | |
578 | 55 bra internal_eeprom_access1 ; Continue with common routines |
0 | 56 |
57 internal_eeprom_access_b0: ; accesses internal EEPROM BANK 0 via the UART | |
58 bcf internal_eeprom_write ; clear flag! | |
59 clrf EEADRH ; Bank0 | |
60 movlw "d" | |
578 | 61 ; bra internal_eeprom_access1 ; Continue with common routines |
0 | 62 internal_eeprom_access1: |
578 | 63 movwf TXREG ; Send command echo ("i", "d" or "n") |
0 | 64 bsf no_sensor_int ; No Sensor Interrupt |
65 movlw d'4' | |
66 movwf EEADR | |
67 bcf PIE1,RCIE ; no interrupt for UART | |
68 bcf PIR1,RCIF ; clear flag | |
21 | 69 bsf LED_blue ; LEDusb ON |
0 | 70 |
71 internal_eeprom_access2: | |
72 rcall rs232_get_byte ; Get byte to write... | |
73 movff RCREG,EEDATA ; copy to write register | |
21 | 74 bsf LED_red ; show activity |
0 | 75 |
76 btfsc rs232_recieve_overflow ; overflow recieved? | |
77 bra internal_eeprom_access3 ; Yes, abort! | |
78 | |
79 rcall write_eeprom ; No, write one byte | |
21 | 80 bcf LED_red |
0 | 81 movff EEDATA,TXREG ; Send echo! |
82 rcall rs232_wait_tx ; Wait for UART | |
83 incfsz EEADR,F ; Do until EEADR rolls to zero | |
84 bra internal_eeprom_access2 | |
85 internal_eeprom_access2a: | |
21 | 86 bcf LED_blue ; LEDusb OFF |
0 | 87 bcf PIR1,RCIF ; clear flag |
88 bsf PIE1,RCIE ; re-enable interrupt for UART | |
89 clrf EEADRH ; Point to Bank0 again | |
90 bcf rs232_recieve_overflow ; Clear Flag | |
91 bcf no_sensor_int ; Renable Sensor Interrupt | |
92 goto restart | |
93 | |
94 internal_eeprom_access3: ; Overflow! Abort writing | |
95 movlw 0xFF | |
96 movwf TXREG ; Error Byte | |
97 bra internal_eeprom_access2a ; Quit | |
98 | |
99 read_eeprom: ; reads from internal eeprom | |
100 bcf EECON1,EEPGD | |
101 bcf EECON1,CFGS | |
102 bsf EECON1,RD | |
103 return | |
104 | |
105 write_eeprom: ; writes into internal eeprom | |
106 bcf EECON1,EEPGD | |
107 bcf EECON1,CFGS | |
108 bsf EECON1,WREN | |
109 | |
110 bcf INTCON,GIE ; even the RTC will be delayed for the next 5 instructions... | |
111 movlw 0x55 | |
112 movwf EECON2 | |
113 movlw 0xAA | |
114 movwf EECON2 | |
115 bsf EECON1,WR | |
116 bsf INTCON,GIE ; ...but the flag for the ISR routines were still set, so they will interrupt now! | |
117 | |
118 write_eep2: | |
119 btfsc EECON1,WR | |
120 bra write_eep2 ; wait about 4ms... | |
121 bcf EECON1,WREN | |
122 return | |
123 | |
124 enable_rs232: ;IO Ports must be input in order to activate the module | |
125 bsf TRISC,6 ; TX Pin | |
126 bsf TRISC,7 ; RX Pin | |
127 | |
128 movlw b'00100100' ; BRGH=1 | |
129 movwf TXSTA | |
130 movlw b'10010000' | |
131 movwf RCSTA | |
132 movlw b'00001000' | |
133 movwf BAUDCON | |
134 clrf SPBRGH | |
463 | 135 movlw SPBRG_VALUE ; Take care of the baud rate when changing Fosc! |
0 | 136 movwf SPBRG |
137 clrf RCREG | |
138 clrf PIR1 | |
139 bsf PIE1,RCIE ; enable interrupt for RS232 | |
140 return | |
141 | |
142 disable_rs232: | |
143 clrf TXSTA | |
144 clrf RCSTA | |
145 bcf PIE1,RCIE ; disable interrupt for RS232 | |
146 bcf TRISC,6 ; TX Pin | |
147 bcf TRISC,7 ; RX Pin | |
148 bcf PORTC,6 ; TX Pin | |
149 bcf PORTC,7 ; RX Pin | |
150 return | |
151 | |
152 rs232_wait_tx: | |
153 btfss RCSTA,SPEN ; Transmitter active? | |
154 return ; No, return! | |
155 nop | |
156 btfss TXSTA,TRMT ; RS232 Busy? | |
157 bra rs232_wait_tx ; yes, wait... | |
158 return ; Done. | |
159 | |
160 | |
161 rs232_get_byte: | |
162 bcf PIR1,RCIF ; clear flag | |
163 bcf rs232_recieve_overflow ; clear flag | |
164 clrf uart1_temp | |
165 rs232_get_byte2: | |
166 clrf uart2_temp | |
167 rs232_get_byte3: | |
168 btfsc PIR1,RCIF ; data arrived? | |
169 return ; data received | |
170 | |
171 nop ; Wait 1us * 255 * 255 = 65ms+x Timeout/Byte | |
172 nop | |
173 nop | |
174 nop | |
175 nop | |
176 nop | |
177 nop | |
178 nop | |
179 btfsc PIR1,RCIF ; data arrived? | |
180 return | |
529 | 181 nop |
182 nop | |
183 nop | |
184 nop | |
0 | 185 nop |
186 nop | |
187 nop | |
188 nop | |
189 btfsc PIR1,RCIF ; data arrived? | |
190 return | |
191 nop | |
192 nop | |
193 nop | |
194 nop | |
529 | 195 nop |
196 nop | |
197 nop | |
198 nop | |
199 btfsc PIR1,RCIF ; data arrived? | |
200 return | |
201 nop | |
202 nop | |
203 nop | |
204 nop | |
205 nop | |
206 nop | |
207 nop | |
208 nop | |
0 | 209 btfsc PIR1,RCIF ; data arrived? |
210 return | |
211 | |
212 decfsz uart2_temp,F | |
213 bra rs232_get_byte3 | |
214 decfsz uart1_temp,F | |
215 bra rs232_get_byte2 | |
216 ; timeout occoured (about 20ms) | |
217 bcf RCSTA,CREN ; Clear receiver status | |
218 bsf RCSTA,CREN | |
219 bsf rs232_recieve_overflow ; set flag | |
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Battery sign color coded, work on new uart-started 115200Baud bootloader (Do NOT use yet!)
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220 return ; and return anyway |
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221 |
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222 uart_115k_bootloader: |
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223 bcf PIE1,RCIE ; disable interrupt for RS232 |
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224 call PLED_ClearScreen ; Clear screen |
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225 movlw color_red |
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226 call PLED_set_color ; Set to Red |
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227 DISPLAYTEXTH d'302' ; Bootloader |
537 | 228 bcf RCSTA,CREN ; Clear receiver status |
229 bsf RCSTA,CREN | |
230 bcf PIR1,RCIF ; clear flag | |
231 movlw d'200' ; one second | |
284
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232 movwf uart1_temp |
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233 uart_115k_bootloader0: |
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234 btfsc PIR1,RCIF ; New byte in UART? |
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235 bra uart_115k_bootloader1 ; Yes, Check if 0xC1 |
537 | 236 WAITMS d'5' |
284
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237 decfsz uart1_temp,F |
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238 bra uart_115k_bootloader0 |
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239 uart_115k_bootloader2: |
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240 DISPLAYTEXTH d'304' ; Aborted! |
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241 movlw d'8' ; Two seconds |
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242 movwf uart1_temp |
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243 uart_115k_bootloader3: |
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244 WAITMS d'250' |
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245 decfsz uart1_temp,F |
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246 bra uart_115k_bootloader3 |
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247 goto restart |
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248 |
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249 uart_115k_bootloader1: |
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heinrichsweikamp
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250 movlw 0xC1 |
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251 cpfseq RCREG ; 115200Baud Bootloader request? |
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252 bra uart_115k_bootloader2 ; No, Abort |
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253 DISPLAYTEXTH d'303' ; Yes, "Please wait!" |
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254 clrf INTCON ; Interrupts disabled |
4ec488f046f4
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heinrichsweikamp
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255 bcf PIR1,RCIF ; clear flag |
4ec488f046f4
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256 goto 0x17F56 ; Enter straight into bootloader. Good luck! |