annotate code_part1/OSTC_code_asm_part1/sync_clock.asm @ 7:5c4ba624165d

cf32 bug fixed
author heinrichsweikamp
date Wed, 24 Feb 2010 13:33:17 +0100
parents 96a35aeda5f2
children 73014f788032
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
2 ; OSTC - diving computer code
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
3 ; Copyright (C) 2008 HeinrichsWeikamp GbR
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
4
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
5 ; This program is free software: you can redistribute it and/or modify
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
6 ; it under the terms of the GNU General Public License as published by
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
7 ; the Free Software Foundation, either version 3 of the License, or
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
8 ; (at your option) any later version.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
9
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
10 ; This program is distributed in the hope that it will be useful,
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
11 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
12 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
13 ; GNU General Public License for more details.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
14
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
15 ; You should have received a copy of the GNU General Public License
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
16 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
17
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
18
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
19 ; Syncs RTC with PC
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
20 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
21 ; written: 13/10/07
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
22 ; last updated: 08/08/31
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
23 ; known bugs:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
24 ; ToDo:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
25
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
26 ; routine echoes the "b" command as ready signal
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
27 ; PC has to send 6 bytes
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
28 ; Byte1: hours
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
29 ; Byte2: minutes
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
30 ; Byte3: seconds
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
31 ; Byte4: month
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
32 ; Byte5: day
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
33 ; Byte6: year
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
34 ; All bytes will be checked for plausibility and the clock will be set
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
35 ; after a timeout of about 20ms, the routine ends
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
36
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
37 sync_clock:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
38 bcf uart_settime ; clear flag
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
39 bcf PIE1,RCIE ; no interrupt for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
40 call set_LEDusb ; LEDusb ON
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
41 bcf PIR1,RCIF ; clear flag
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
42
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
43 movlw "b" ; send echo
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
44 movwf TXREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
45 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
46
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
47 call rs232_get_byte ; hours
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
48 movff RCREG, hours
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
49
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
50 movlw d'24'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
51 cpfslt hours
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
52 clrf hours
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
53
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
54 call rs232_get_byte ; minutes
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
55 movff RCREG, mins
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
56
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
57 movlw d'60'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
58 cpfslt mins
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
59 clrf mins
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
60
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
61 call rs232_get_byte ; seconds
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
62 movff RCREG, secs
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
63
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
64 movlw d'60'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
65 cpfslt secs
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
66 clrf secs
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
67
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
68 call rs232_get_byte ; month
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
69 movff RCREG, month
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
70
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
71 movlw d'12'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
72 cpfsgt month
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
73 bra sync_clock0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
74 movwf month
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
75
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
76 sync_clock0:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
77 call rs232_get_byte ; day
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
78 movff RCREG, day
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
79
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
80 movff month,lo ; new month
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
81 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
82 movlw .31
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
83 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
84 movlw .28
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
85 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
86 movlw .31
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
87 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
88 movlw .30
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
89 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
90 movlw .31
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
91 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
92 movlw .30
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
93 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
94 movlw .31
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
95 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
96 movlw .31
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
97 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
98 movlw .30
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
99 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
100 movlw .31
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
101 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
102 movlw .30
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
103 dcfsnz lo,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
104 movlw .31
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
105 cpfsgt day ; day ok?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
106 bra sync_clock1 ; OK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
107 movlw .1 ; not OK, set to 1st
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
108 movwf day
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
109
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
110 sync_clock1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
111 call rs232_get_byte ; year
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
112 movff RCREG, year
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
113
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
114 movlw d'100'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
115 cpfslt year
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
116 clrf year
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
117
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
118 call clear_LEDusb ; LEDusb OFF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
119 bcf PIR1,RCIF ; clear flag
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
120 bsf oneminupdate ; set flag, so new time and date will be updated in surfacemode at once
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
121 bsf PIE1,RCIE ; enable interrupt for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
122 goto surfloop_loop ; return to surface loop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
123
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
124