annotate code_part1/OSTC_code_asm_part1/i2c_eeprom.asm @ 842:454ef5c2e6aa default tip

Bugfix: Auto-SP did not show >9m for some 2C hardware versions in German language firmware Make year settings until 2040 possible (This is likely the final release for this model)
author heinrichsweikamp
date Sat, 29 Nov 2025 14:11:07 +0100
parents 2a0e5d884fc3
children
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1
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2a0e5d884fc3 BUGFIX: Fix licence in German
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2 ; OSTC Mk.2, 2N and 2C - diving computer code
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c50296c3059e BUGFIX: Divetime had unwanted "." behind the minutes
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3 ; Copyright (C) 2015 HeinrichsWeikamp GbR
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4 ; This program is free software: you can redistribute it and/or modify
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5 ; it under the terms of the GNU General Public License as published by
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6 ; the Free Software Foundation, either version 3 of the License, or
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7 ; (at your option) any later version.
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8 ; This program is distributed in the hope that it will be useful,
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9 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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10 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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11 ; GNU General Public License for more details.
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12 ; You should have received a copy of the GNU General Public License
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13 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
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14 ; provides routines for external EEPROM via I2C
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15 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
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16 ; written: 051030
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17 ; last updated: 120421
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18 ; known bugs:
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19 ; ToDo:
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20
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21 incf_eeprom_address macro ext_ee_temp1 ; Will increase eeprom_address:2 with the 8Bit value "ext_ee_temp1"
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22 movlw ext_ee_temp1
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23 call incf_eeprom_address0
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24 endm
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25
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26 incf_eeprom_address0:
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27 addwf eeprom_address+0,F ; increase address
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28 movlw d'0'
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29 addwfc eeprom_address+1,F
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30 return
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31
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32 ;=============================================================================
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33 ; Will decrease eeprom_address:2 with the 8Bit value "ext_ee_temp1"
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35
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36 decf_eeprom_address macro ext_ee_temp1
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37 movlw ext_ee_temp1
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38 call decf_eeprom_address0
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39 endm
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40
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41 decf_eeprom_address0:
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42 subwf eeprom_address+0,F ; decrease address: do a 16-8bits substract.
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43 movlw d'0'
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44 subwfb eeprom_address+1,F
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45 return
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46
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47 ;=============================================================================
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48
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49 write_external_eeprom: ; data in WREG
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50 ; increase address eeprom_address+0:eeprom_address+1 after write
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51 ; with banking after 7FFF
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52 #ifdef TESTING
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53 ; When Simulating with MPLabSIM, there is no way to emulate external EEPROM...
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54 return
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55 #endif
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56
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57 rcall I2CWRITE ; writes WREG into EEPROM@eeprom_address
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58 movlw d'1' ; increase address
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59 addwf eeprom_address+0,F
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60 movlw d'0'
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61 addwfc eeprom_address+1,F
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62 return
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63
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64 write_external_eeprom_block: ; Writes a block of 64Byte (one page in external EEPROM without stop condition
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65 #ifdef TESTING
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66 ; When Simulating with MPLabSIM, there is no way to emulate external EEPROM...
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67 return
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68 #endif
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69
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70 btfsc eeprom_blockwrite ; Blockwrite continue?
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71 rcall I2CWRITE_BLOCK2
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72 btfss eeprom_blockwrite ; Blockwrite start?
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73 rcall I2CWRITE_BLOCK
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74 bsf eeprom_blockwrite ; After the start, do blockwriting for the next 63Bytes!
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75
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76 movlw d'0' ; increase address
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77 incf eeprom_address+0,F
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78 addwfc eeprom_address+1,F
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79 return
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80
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81 I2CWRITE_BLOCK:
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82 movwf ext_ee_temp1 ; Data byte in WREG
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83 bsf SSPCON2,SEN ; Start condition
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84 rcall WaitMSSP
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85 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
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86 btfss eeprom_address+1,7 ; Access Block2?
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87 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
0
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88 movwf SSPBUF ; control byte
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89 rcall WaitMSSP
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90 rcall I2C_WaitforACK
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91 movff eeprom_address+1,SSPBUF ; High Address byte
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92 rcall WaitMSSP
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93 rcall I2C_WaitforACK
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94 movff eeprom_address+0,SSPBUF ; Low Address byte
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95 rcall WaitMSSP
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96 rcall I2C_WaitforACK
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97 I2CWRITE_BLOCK2:
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98 movff ext_ee_temp1, SSPBUF ; Data Byte
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99 rcall WaitMSSP
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100 rcall I2C_WaitforACK
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101 return
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102
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103
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104 get_free_EEPROM_location: ; Searches 0xFD, 0xFD, 0xFE and sets Pointer to 0xFE
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105
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106 #ifdef TESTING
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107 ; In testing mode, find 0x100 (internal EEPROM) as the first free location...
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108 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
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109 movlw 0x1
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110 movwf eeprom_address+1
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111 return
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112 #endif
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113
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114 clrf ext_ee_temp1 ; low address counter
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115 clrf ext_ee_temp2 ; high address counter
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116 bcf second_FD ; clear flags
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117 bcf first_FD
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118 bcf eeprom_switched_b1
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119 get_free_EEPROM_location3:
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120 bsf SSPCON2, PEN ; Stop condition
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121 rcall WaitMSSP
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122 bsf SSPCON2,SEN ; Start condition
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123 rcall WaitMSSP
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124 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
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125 btfss ext_ee_temp2,7 ; Access Block2?
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126 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
0
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127 movwf SSPBUF ; control byte
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128 rcall WaitMSSP
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129 btfsc SSPCON2,ACKSTAT
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130 bra get_free_EEPROM_location3 ; EEPROM NOT acknowledged, retry!
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131
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132 movff ext_ee_temp2,SSPBUF ; High Address byte
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133 rcall WaitMSSP
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134 rcall I2C_WaitforACK
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135 movff ext_ee_temp1,SSPBUF ; Low Address byte
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136 rcall WaitMSSP
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137 rcall I2C_WaitforACK
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138
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139 bsf SSPCON2,RSEN ; Start condition
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140 rcall WaitMSSP
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141 movlw b'10101111' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
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142 btfss ext_ee_temp2,7 ; Access Block2?
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143 movlw b'10100111' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
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144 movwf SSPBUF ; control byte
0
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145 rcall WaitMSSP
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146 rcall I2C_WaitforACK
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147
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148 get_free_EEPROM_location2:
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149 btfsc eeprom_switched_b1 ; Switched to Block1 already?
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150 bra get_free_EEPROM_location2_x ; Yes, skip this check!
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151
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152 btfsc ext_ee_temp2,7 ; Access Block1?
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153 bsf eeprom_switched_b1 ; Yes, and set the flag so this check is skipped in the rest of this routine
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154 btfsc ext_ee_temp2,7 ; Access Block1?
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155 bra get_free_EEPROM_location3 ; Yes, initiate new read sequence in block1
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156
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157 get_free_EEPROM_location2_x:
0
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158 bsf SSPCON2, RCEN ; Enable recieve mode
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159 rcall WaitMSSP
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160 btfsc first_FD
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161 bra test_2nd_FD
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162 bsf first_FD ; found first 0xFD?
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163 movlw 0xFD
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164 cpfseq SSPBUF
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165 bcf first_FD ; No
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166 bra get_free_EEPROM_location2c
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167
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168 test_2nd_FD:
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169 btfsc second_FD
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170 bra test_FE
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171 bsf second_FD ; found second 0xFD?
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172 movlw 0xFD
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173 cpfseq SSPBUF
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174 bra get_free_EEPROM_location2b ;No, clear both flags
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175 bra get_free_EEPROM_location2c
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
176 test_FE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
177 movlw 0xFE ; found the final 0xFE?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
178 cpfseq SSPBUF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
179 bra get_free_EEPROM_location2b ;No, clear both flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
180 movff ext_ee_temp1,eeprom_address+0 ;Yes, copy ext_ee_temp1->eeprom_address+0 and
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
181 movff ext_ee_temp2,eeprom_address+1 ;ext_ee_temp2->eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
182 bra get_free_EEPROM_location4 ; Done.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
183
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
184 get_free_EEPROM_location2b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
185 bcf second_FD ; clear both flags!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
186 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
187 get_free_EEPROM_location2c:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
188 movlw d'1' ; and increase search address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
189 addwf ext_ee_temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
190 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
191 addwfc ext_ee_temp2,F
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
192
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
193 movlw 0xFF
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
194 cpfseq ext_ee_temp2 ; =0xFFFF
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
195 bra get_free_EEPROM_location2d ; No
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
196 cpfseq ext_ee_temp1 ; =0xFFFF
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
197 bra get_free_EEPROM_location2d ; No
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
198
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
199 bra get_free_EEPROM_location3b ; yes
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
200
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
201 get_free_EEPROM_location2d:
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
202 bsf SSPCON2, ACKEN ; no, send Ack
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
203 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
204 bra get_free_EEPROM_location2 ; and continue search
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
205 get_free_EEPROM_location3b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
206 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
207 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
208 get_free_EEPROM_location4:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
209 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
210 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
211
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
212 bcf second_FD ; clear flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
213 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
214 return ; return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
215
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
216
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
217 I2CREAD:
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
218 rcall I2CREAD_COMMON
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
219 bsf SSPCON2, PEN ; Stop
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
220 rcall WaitMSSP
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
221 return
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
222
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
223 I2CREAD2: ; same as I2CREAD but with automatic address increase
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
224 rcall I2CREAD
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
225 I2CREAD2_2:
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
226 movlw d'1'
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
227 addwf eeprom_address+0,F
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
228 movlw d'0'
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
229 addwfc eeprom_address+1,F
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
230 return
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
231 I2CREAD3: ; block read start with automatic address increase
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
232 rcall I2CREAD_COMMON
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
233 ; no Stop condition here
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
234 bra I2CREAD2_2
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
235
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
236 I2CREAD4: ; block read with automatic address increase
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
237 bsf SSPCON2,ACKEN ; Master acknowlegde
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
238 rcall WaitMSSP
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
239 bsf SSPCON2, RCEN ; Enable recieve mode
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
240 rcall WaitMSSP
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
241 movf SSPBUF,W ; copy read byte into WREG
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
242 ; no Stop condition here
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
243 bra I2CREAD2_2
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
244
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
246 I2CREAD_COMMON:
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
247 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
248 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
249 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
250 rcall WaitMSSP
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
251
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
252 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
253 btfss eeprom_address+1,7 ; Access Block2?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
254 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
255 movwf SSPBUF ; control byte
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
256 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
257 btfsc SSPCON2,ACKSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
258 bra I2CREAD ; EEPROM NOT acknowledged, retry!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
259 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
260 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
261 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
262 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
263 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
264 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
265
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
266 bsf SSPCON2,RSEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
267 rcall WaitMSSP
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
268
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
269 movlw b'10101111' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
270 btfss eeprom_address+1,7 ; Access Block2?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
271 movlw b'10100111' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
272 movwf SSPBUF ; control byte
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
273 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
274 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
275
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
276 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
277 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
278 movf SSPBUF,W ; copy read byte into WREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
279 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
280
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
281
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
282 I2CWRITE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
283 movwf ext_ee_temp1 ; Data byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
284 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
285 rcall WaitMSSP
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
286 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
287 btfss eeprom_address+1,7 ; Access Block2?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
288 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
289 movwf SSPBUF ; control byte
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
290 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
291 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
292 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
293 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
294 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
295 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
296 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
297 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
298 movff ext_ee_temp1, SSPBUF ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
299 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
300 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
301 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
302 rcall WaitMSSP
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
303 WAITMS d'5' ; Write delay
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
304 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
305
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
306 I2C_WaitforACK:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
307 btfsc SSPCON2,ACKSTAT ; checks for ACK bit from slave
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
308 rcall I2CFail
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
309 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
310
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
311 I2CFail:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
312 ostc_debug 'M' ; Sends debug-information to screen if debugmode active
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
313 bsf LED_red
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
314 rcall I2CReset ; I2C Reset
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
315 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
316 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
317 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
318
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
319 WaitMSSP:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
320 decfsz i2c_temp,F ; check for timeout during I2C action
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
321 bra WaitMSSP2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
322 bra I2CFail ; timeout occured
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
323 WaitMSSP2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
324 btfss PIR1,SSPIF
595
16f4eafc197e CNS for pSCR-GF fixed.
heinrichsweikamp
parents: 573
diff changeset
325 bra WaitMSSP
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
326 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
327 bcf PIR1,SSPIF
595
16f4eafc197e CNS for pSCR-GF fixed.
heinrichsweikamp
parents: 573
diff changeset
328 nop
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
329 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
330
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
331 I2CReset: ; Something went wrong (Slave holds SDA low?)
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
332 clrf SSPCON1 ; wake-up slave and reset entire module
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
333 ostc_debug 'N' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
334 clrf SSPCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
335 clrf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
336 bcf TRISC,3 ; SCL OUTPUT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
337 bsf TRISC,4 ; SDA Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
338 bcf PORTC,3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
339 movlw d'9'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
340 movwf i2c_temp ; clock-out 9 clock cycles manually
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
341 I2CReset_1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
342 bsf PORTC,3 ; SCL=1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
343 nop
539
a587f491693d clock in I2C "bus failed" routine
heinrichsweikamp
parents: 537
diff changeset
344 nop
a587f491693d clock in I2C "bus failed" routine
heinrichsweikamp
parents: 537
diff changeset
345 nop
a587f491693d clock in I2C "bus failed" routine
heinrichsweikamp
parents: 537
diff changeset
346 nop
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
347 btfsc PORTC,4 ; SDA=1?
539
a587f491693d clock in I2C "bus failed" routine
heinrichsweikamp
parents: 537
diff changeset
348 bra I2CReset_2 ; =1, SDA has been released from slave
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
349 bcf PORTC,3 ; SCL=0
539
a587f491693d clock in I2C "bus failed" routine
heinrichsweikamp
parents: 537
diff changeset
350 nop
a587f491693d clock in I2C "bus failed" routine
heinrichsweikamp
parents: 537
diff changeset
351 nop
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
352 bcf PORTC,3
539
a587f491693d clock in I2C "bus failed" routine
heinrichsweikamp
parents: 537
diff changeset
353 nop
a587f491693d clock in I2C "bus failed" routine
heinrichsweikamp
parents: 537
diff changeset
354 nop
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
355 decfsz i2c_temp,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
356 bra I2CReset_1 ; check for nine clock cycles
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
357 I2CReset_2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
358 bsf TRISC,3 ; SCL Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
359 clrf SSPCON1 ; set I²C Mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
360 WAITMS d'10' ; Reset-Timeout for I2C devices
537
3091628b2742 BUGFIX: Spurious logbook read issue
heinrichsweikamp
parents: 455
diff changeset
361 movlw SSPSTAT_VALUE
0
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362 movwf SSPSTAT
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363 movlw b'00101000'
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364 movwf SSPCON1
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365 movlw b'00000000'
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366 movwf SSPCON2
537
3091628b2742 BUGFIX: Spurious logbook read issue
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367 movlw SSPADD_VALUE
0
96a35aeda5f2 Initial setup
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368 movwf SSPADD
21
73014f788032 1.60 stable rc1
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369 bcf LED_red
0
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370 ostc_debug 'O' ; Sends debug-information to screen if debugmode active
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371 return
53
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372
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373 ;I2C_TX:
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374 ; movwf i2c_temp2 ; Data byte
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375 ; bsf SSPCON2,SEN ; Start condition
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376 ; rcall WaitMSSP
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377 ; movlw b'10010000' ; Bit0=0: WRITE, Bit0=1: READ
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378 ; movwf SSPBUF ; control byte
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379 ; rcall WaitMSSP
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380 ; rcall I2C_WaitforACK
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381 ; movff i2c_temp2, SSPBUF ; Data Byte
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382 ; rcall WaitMSSP
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383 ; rcall I2C_WaitforACK
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384 ; bsf SSPCON2,PEN ; Stop condition
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385 ; rcall WaitMSSP
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386 ; return
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387 ;I2C_RX:
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388 ; bcf PIR1,SSPIF
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389 ; bsf SSPCON2,SEN ; Start condition
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390 ; rcall WaitMSSP
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391 ; movlw b'10010001' ; Bit0=0: WRITE, Bit0=1: READ
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392 ; movwf SSPBUF ; control byte
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393 ; rcall WaitMSSP
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394 ; rcall I2C_WaitforACK
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395 ; bsf SSPCON2, RCEN ; Enable recieve mode
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396 ; rcall WaitMSSP
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397 ; movff SSPBUF,i2c_temp2 ; Data Byte
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398 ; bsf SSPCON2,ACKEN ; Master acknowlegde
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399 ; rcall WaitMSSP
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400 ; bsf SSPCON2,PEN ; Stop condition
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401 ; rcall WaitMSSP
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402 ; return