annotate code_part1/OSTC_code_asm_part1/interface.asm @ 644:420e62cd88ad

point to correct diluent location
author heinrichsweikamp
date Wed, 03 Oct 2012 13:12:02 +0200
parents fbd5e2b75a63
children 6e456a6398e0
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
2 ; OSTC - diving computer code
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
3 ; Copyright (C) 2008 HeinrichsWeikamp GbR
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
4
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
5 ; This program is free software: you can redistribute it and/or modify
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
6 ; it under the terms of the GNU General Public License as published by
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
7 ; the Free Software Foundation, either version 3 of the License, or
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
8 ; (at your option) any later version.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
9
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
10 ; This program is distributed in the hope that it will be useful,
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
11 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
12 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
13 ; GNU General Public License for more details.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
14
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
15 ; You should have received a copy of the GNU General Public License
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
16 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
17
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
18
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
19 ; Interface, Downloader, MD2 Hash send routine
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
20 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
21 ; written: 10/30/05
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
22 ; last updated: 12/27/07
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
23 ; known bugs:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
24 ; ToDo:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
25
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
26 uart_store_tissues:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
27 bcf uart_store_tissue_data ; Clear flag
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
28 bcf PIE1,RCIE ; No Interrupt for UART
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
29 bsf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
30 call simulator_save_tissue_data ; store and set flag for automatic restore
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
31 movlw 'k' ; send echo
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
32 movwf TXREG ; When done
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
33 call rs232_wait_tx ; wait for UART
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
34 bcf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
35 bsf PIE1,RCIE ; Interrupt for RS232
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
36 goto surfloop_loop ; return to surface loop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
37
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
38 ; reset Decodata
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
39 reset_decodata:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
40 bcf uart_reset_decodata ; clear flag
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
41 bcf PIE1,RCIE ; No Interrupt for UART
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
42 bsf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
43
116
14a074e1a375 Split C code, and use direct linking.
JeanDo
parents: 21
diff changeset
44 call deco_clear_tissue ; Reset Decodata
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
45 movlb b'00000001' ; select ram bank 1
116
14a074e1a375 Split C code, and use direct linking.
JeanDo
parents: 21
diff changeset
46 call deco_calc_desaturation_time ; calculate desaturation time
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
47 movlb b'00000001' ; select ram bank 1
116
14a074e1a375 Split C code, and use direct linking.
JeanDo
parents: 21
diff changeset
48 call deco_clear_CNS_fraction ; clear CNS
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
49 movlb b'00000001' ; select ram bank 1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
50
229
85ea09d3b9d8 Nofly should not be reset after dive simulation (bug BB18).
JeanDo
parents: 116
diff changeset
51 clrf nofly_time+0 ; Clear nofly time
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
52 clrf nofly_time+1 ; Clear nofly time
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
53
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
54 movlw 'h' ; send echo
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
55 movwf TXREG ; When done
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
56 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
57
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
58 bsf oneminupdate ; set flag, so display will be updated at once
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
59 bcf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
60 bsf PIE1,RCIE ; Interrupt for RS232
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
61 goto surfloop_loop ; return to surface loop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
62
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
63 ; send internal EEPROM BANK 0 via the UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
64 send_int_eeprom_b0:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
65 bcf uart_send_int_eeprom ; clear flag
578
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
66 movlw .0 ; Point to Bank0
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
67 rcall send_internal_eeprom1 ; sends complete 1st. page of internal EEPROM
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
68 goto surfloop_loop ; return to surface loop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
69
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
70 ; send internal EEPROM BANK 1 via the UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
71 send_int_eeprom_b1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
72 bcf uart_send_int_eeprom2 ; clear flag
578
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
73 movlw d'1'
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
74 movwf EEADRH ; Point to Bank1
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
75 rcall send_internal_eeprom1 ; sends complete 2nd page of internal EEPROM
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
76 goto surfloop_loop ; return to surface loop
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
77
578
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
78 ; send internal EEPROM BANK 2 via the UART
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
79 send_int_eeprom_b2:
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
80 bcf uart_send_int_eeprom3 ; clear flag
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
81 movlw d'2'
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
82 movwf EEADRH ; Point to Bank1
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
83 rcall send_internal_eeprom1 ; sends complete 2nd page of internal EEPROM
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
84 goto surfloop_loop ; return to surface loop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
85
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
86
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
87 ; Send firmware version and 16bytes MD2 hash via the UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
88 send_md2_hash:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
89 bcf uart_send_hash ; clear flag
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
90 bcf PIE1,RCIE ; No Interrupt for UART
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
91 bsf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
92
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
93 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
94 movlw softwareversion_x ; Softwareversion
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
95 movwf TXREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
96 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
97 movlw softwareversion_y ; Softwareversion
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
98 movwf TXREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
99
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
100 lfsr FSR2, char_O_hash
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
101 movlw d'16'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
102 movwf temp1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
103 send_md2_hash2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
104 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
105 movff POSTINC2,TXREG ; copy hash byte to TXREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
106 decfsz temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
107 bra send_md2_hash2 ; loop 16 times
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
108
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
109 bcf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
110 bsf PIE1,RCIE ; Interrupt for RS232
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
111 goto surfloop_loop ; return to surface loop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
112
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
113
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
114 ; Sends first 256Byte from internal and first 32KB from external EEPROM using the UART module
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
115 menu_interface:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
116 bcf dump_external_eeprom ; clear flag
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
117 bcf PIE1,RCIE ; No Interrupt for UART
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
118 bsf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
119 call PLED_ClearScreen
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
120 call PLED_topline_box
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
121 WIN_INVERT .1 ; Init new Wordprocessor
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
122 DISPLAYTEXT .15 ; "Interface"
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
123 WIN_INVERT .0 ; Init new Wordprocessor
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
124
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
125 movlw d'5'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
126 movwf uart1_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
127 menu_interface1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
128 movlw 0xAA ; Startbytes
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
129 movwf TXREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
130 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
131 decfsz uart1_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
132 bra menu_interface1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
133 movlw 0x55 ; finish preamble
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
134 movwf TXREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
135
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
136 DISPLAYTEXT .16 ; "Start"
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
137
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
138 call get_free_EEPROM_location ;
376
ed26990716fe first gas does not reset change depth, display fix with multigas dives in logbook
heinrichsweikamp
parents: 351
diff changeset
139
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
140 movlw d'1' ; increase
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
141 addwf eeprom_address+0,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
142 movlw d'0'
455
c512a868937c last work for 2.0: Fixing 32kB boundary read for logbook
heinrichsweikamp
parents: 376
diff changeset
143 addwfc eeprom_address+1,F
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
144
376
ed26990716fe first gas does not reset change depth, display fix with multigas dives in logbook
heinrichsweikamp
parents: 351
diff changeset
145 ;For debug only
ed26990716fe first gas does not reset change depth, display fix with multigas dives in logbook
heinrichsweikamp
parents: 351
diff changeset
146 ;clrf eeprom_address+0,F
ed26990716fe first gas does not reset change depth, display fix with multigas dives in logbook
heinrichsweikamp
parents: 351
diff changeset
147 ;clrf eeprom_address+1,F
ed26990716fe first gas does not reset change depth, display fix with multigas dives in logbook
heinrichsweikamp
parents: 351
diff changeset
148
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
149 DISPLAYTEXT .17 ; "Data"
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
150
578
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
151 movlw .0 ; Point to Bank0
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
152 rcall send_internal_eeprom1 ; sends complete 1st. page of internal EEPROM
578
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
153 bsf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
154
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
155 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
156 movff batt_voltage+0,TXREG ; Battery
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
157
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
158 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
159 movff batt_voltage+1,TXREG ; Battery
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
160
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
161 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
162 movlw softwareversion_x ; Softwareversion
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
163 movwf TXREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
164
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
165 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
166 movlw softwareversion_y ; Softwareversion
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
167 movwf TXREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
168
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
169 DISPLAYTEXT .18 ; "Header"
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
170
351
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
171 setf uart1_temp ; low address counter
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
172 setf uart2_temp ; high address counter
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
173
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
174 menu_interface3:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
175 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
176 call WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
177
351
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
178 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
179 btfss eeprom_address+1,7 ; Access Block2?
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
180 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
181 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
182 call WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
183 btfsc SSPCON2,ACKSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
184 bra menu_interface3 ; No Ack, try again!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
185
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
186 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
187 call WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
188 call I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
189 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
190 call WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
191 call I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
192 bsf SSPCON2,RSEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
193 call WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
194
351
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
195 movlw b'10101111' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
196 btfss eeprom_address+1,7 ; Access Block2?
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
197 movlw b'10100111' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
198
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
199 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
200 call WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
201 call I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
202
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
203 DISPLAYTEXT .19 ; "Profile"
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
204
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
205 menu_interface2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
206 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
207
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
208 movlw d'1'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
209 addwf uart1_temp,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
210 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
211 addwfc uart2_temp,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
212
351
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
213 ; Slow but safe...
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
214 call I2CREAD2 ; same as I2CREAD but with automatic address increase
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 229
diff changeset
215 movff SSPBUF, TXREG
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 229
diff changeset
216
351
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
217 movlw 0xFF
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
218 cpfseq uart2_temp ;=0xFFFF?
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
219 bra menu_interface2 ; No, continue
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
220 cpfseq uart1_temp ;=0xFFFF?
5c186a72cb5d Debugging the new logbook format, 64kB download routine
heinrichsweikamp
parents: 350
diff changeset
221 bra menu_interface2 ; No, continue
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 229
diff changeset
222
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
223 DISPLAYTEXT .20 ; Done.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
224
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
225 WAITMS d'250'
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
226 bcf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
227 bsf PIE1,RCIE ; Interrupt for RS232
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
228 goto surfloop ; back to surfacemode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
229
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
230 send_internal_eeprom1:
578
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
231 movwf EEADRH ; Point to Bank "WREG"
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
232 bcf PIE1,RCIE ; No Interrupt for UART
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
233 bsf LED_blue
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
234 clrf uart1_temp ; Send the total of 256bytes
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
235 clrf EEADR ; Send bytes 0-255 from internal EEPROM
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
236 send_internal_eeprom2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
237 call read_eeprom ; read byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
238 movff EEDATA,TXREG ; send byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
239 incf EEADR,F ; increase pointer
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
240 call rs232_wait_tx ; wait for UART
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
241 decfsz uart1_temp,F ; until limit reached
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
242 bra send_internal_eeprom2
578
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
243 clrf EEADRH ; Point to Bank0
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
244 bcf LED_blue
fbd5e2b75a63 adding access to CF64-CF95
heinrichsweikamp
parents: 455
diff changeset
245 bsf PIE1,RCIE ; Interrupt for RS232
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
246 return