annotate code_part1/OSTC_code_asm_part1/i2c_eeprom.asm @ 133:35567a646fe5

Minor merge fixes...
author JeanDo
date Wed, 05 Jan 2011 12:24:58 +0100
parents 3e351e25f5d1
children a1960295433b
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1
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2 ; OSTC - diving computer code
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3 ; Copyright (C) 2008 HeinrichsWeikamp GbR
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4 ; This program is free software: you can redistribute it and/or modify
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5 ; it under the terms of the GNU General Public License as published by
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6 ; the Free Software Foundation, either version 3 of the License, or
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7 ; (at your option) any later version.
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8 ; This program is distributed in the hope that it will be useful,
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9 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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10 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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11 ; GNU General Public License for more details.
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12 ; You should have received a copy of the GNU General Public License
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13 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
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14 ; provides routines for external EEPROM via I2C
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15 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
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16 ; written: 10/30/05
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17 ; last updated: 08/21/06
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18 ; known bugs:
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19 ; ToDo: use 2nd 32KB from external EEPROM for something
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20
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21 incf_eeprom_address macro ext_ee_temp1 ; Will increase eeprom_address:2 with the 8Bit value "ext_ee_temp1" and takes
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22 movlw ext_ee_temp1 ; care of bank switching at 0x8000
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23 call incf_eeprom_address0
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24 endm
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25
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26 incf_eeprom_address0:
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27 movwf ext_ee_temp1
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28 incf_eeprom_address1:
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29 movlw d'1' ; increase address
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30 addwf eeprom_address+0,F
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31 movlw d'0'
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32 addwfc eeprom_address+1,F
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33 btfss eeprom_address+1,7 ; at address 8000?
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34 bra incf_eeprom_address2 ; No, continue
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35
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36 ; Yes, clear eeprom_address:2
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37 clrf eeprom_address+0 ; Clear eeprom address
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38 clrf eeprom_address+1
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39
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40 incf_eeprom_address2:
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41 decfsz ext_ee_temp1,F ; All done?
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42 bra incf_eeprom_address1 ; No, continue
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43 return ; Done.
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44
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45 decf_eeprom_address macro ext_ee_temp1 ; Will decrease eeprom_address:2 with the 8Bit value "ext_ee_temp1" and takes
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46 movlw ext_ee_temp1 ; care of bank switching at 0x8000
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47 call decf_eeprom_address0
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48 endm
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49
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50 decf_eeprom_address0:
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51 movwf ext_ee_temp1
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52 decf_eeprom_address1:
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53 movlw d'1' ; decrease address
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54 subwf eeprom_address+0,F
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55 movlw d'0'
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56 subwfb eeprom_address+1,F
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57
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58 btfss eeprom_address+1,7 ; at address 8000?
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59 bra decf_eeprom_address2 ; No, continue
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60
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61 movlw b'01111111' ; yes, reset highbyte
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62 movwf eeprom_address+1
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63
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64 decf_eeprom_address2:
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65 decfsz ext_ee_temp1,F ; All done?
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66 bra decf_eeprom_address1 ; No, continue
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67 return ; Done.
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68
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69
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70 write_external_eeprom: ; data in WREG
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71 ; increase address eeprom_address+0:eeprom_address+1 after write
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72 ; with banking after 7FFF
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73 #ifdef TESTING
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74 ; When Simulating with MPLabSIM, there is no way to emulate external EEPROM...
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75 return
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76 #endif
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77
0
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78 rcall I2CWRITE ; writes WREG into EEPROM@eeprom_address
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79 movlw d'1' ; increase address
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80 addwf eeprom_address+0,F
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81 movlw d'0'
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82 addwfc eeprom_address+1,F
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83 bcf eeprom_overflow
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84 btfss eeprom_address+1,7 ; at address 8000?
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85 return ; no, return
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86
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87 clrf eeprom_address+0 ; Clear eeprom address
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88 clrf eeprom_address+1
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89 bsf eeprom_overflow ; and set overflow bit
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90 return
83
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91
0
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92 write_external_eeprom_block: ; Writes a block of 64Byte (one page in external EEPROM without stop condition
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93 #ifdef TESTING
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94 ; When Simulating with MPLabSIM, there is no way to emulate external EEPROM...
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95 return
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96 #endif
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97
0
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98 btfsc eeprom_blockwrite ; Blockwrite continue?
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99 rcall I2CWRITE_BLOCK2
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100 btfss eeprom_blockwrite ; Blockwrite start?
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101 rcall I2CWRITE_BLOCK
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102 bsf eeprom_blockwrite ; After the start, do blockwriting for the next 63Bytes!
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103
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104 movlw d'0' ; increase address
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105 incf eeprom_address+0,F
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106 addwfc eeprom_address+1,F
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107 bcf eeprom_overflow
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108
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109 btfss eeprom_address+1,7 ; at address 8000
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110 return ; no, return
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111
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112 clrf eeprom_address+0 ; Clear eeprom address
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113 clrf eeprom_address+1
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114 bsf eeprom_overflow ; and set overflow bit
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115 return
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116 I2CWRITE_BLOCK:
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117 movwf ext_ee_temp1 ; Data byte in WREG
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118 bsf SSPCON2,SEN ; Start condition
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119 rcall WaitMSSP
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120 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
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121 movwf SSPBUF ; control byte
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122 rcall WaitMSSP
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123 rcall I2C_WaitforACK
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124 movff eeprom_address+1,SSPBUF ; High Address byte
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125 rcall WaitMSSP
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126 rcall I2C_WaitforACK
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127 movff eeprom_address+0,SSPBUF ; Low Address byte
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128 rcall WaitMSSP
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129 rcall I2C_WaitforACK
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130 I2CWRITE_BLOCK2:
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131 movff ext_ee_temp1, SSPBUF ; Data Byte
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132 rcall WaitMSSP
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133 rcall I2C_WaitforACK
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134 return
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135
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136
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137 get_free_EEPROM_location: ; Searches 0xFD, 0xFD, 0xFE and sets Pointer to 0xFE
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138
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139 #ifdef TESTING
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140 ; In testing mode, find 0x100 (internal EEPROM) as the first free location...
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141 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
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142 movlw 0x1
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143 movwf eeprom_address+1
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144 return
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145 #endif
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146
0
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147 clrf ext_ee_temp1 ; low address counter
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148 clrf ext_ee_temp2 ; high address counter
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149 bcf second_FD ; clear flags
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150 bcf first_FD
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151 get_free_EEPROM_location3:
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152 bsf SSPCON2, PEN ; Stop condition
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153 rcall WaitMSSP
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154 bsf SSPCON2,SEN ; Start condition
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155 rcall WaitMSSP
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156 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
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157 movwf SSPBUF ; control byte
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158 rcall WaitMSSP
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159 btfsc SSPCON2,ACKSTAT
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160 bra get_free_EEPROM_location3 ; EEPROM NOT acknowledged, retry!
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161
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162 movff ext_ee_temp2,SSPBUF ; High Address byte
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163 rcall WaitMSSP
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164 rcall I2C_WaitforACK
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165 movff ext_ee_temp1,SSPBUF ; Low Address byte
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166 rcall WaitMSSP
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167 rcall I2C_WaitforACK
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168
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169 bsf SSPCON2,RSEN ; Start condition
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170 rcall WaitMSSP
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171 movlw b'10100111' ; Bit0=0: WRITE, Bit0=1: READ
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172 movwf SSPBUF ; control byte
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173 rcall WaitMSSP
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174 rcall I2C_WaitforACK
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175
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176 get_free_EEPROM_location2:
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177 bsf SSPCON2, RCEN ; Enable recieve mode
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178 rcall WaitMSSP
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179 btfsc first_FD
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180 bra test_2nd_FD
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181 bsf first_FD ; found first 0xFD?
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182 movlw 0xFD
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183 cpfseq SSPBUF
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184 bcf first_FD ; No
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185 bra get_free_EEPROM_location2c
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186
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187 test_2nd_FD:
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188 btfsc second_FD
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189 bra test_FE
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190 bsf second_FD ; found second 0xFD?
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191 movlw 0xFD
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diff changeset
192 cpfseq SSPBUF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
193 bra get_free_EEPROM_location2b ;No, clear both flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
194 bra get_free_EEPROM_location2c
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
195 test_FE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
196 movlw 0xFE ; found the final 0xFE?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
197 cpfseq SSPBUF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
198 bra get_free_EEPROM_location2b ;No, clear both flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
199 movff ext_ee_temp1,eeprom_address+0 ;Yes, copy ext_ee_temp1->eeprom_address+0 and
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
200 movff ext_ee_temp2,eeprom_address+1 ;ext_ee_temp2->eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
201 bra get_free_EEPROM_location4 ; Done.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
202
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
203 get_free_EEPROM_location2b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
204 bcf second_FD ; clear both flags!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
205 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
206 get_free_EEPROM_location2c:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
207 movlw d'1' ; and increase search address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
208 addwf ext_ee_temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
209 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
210 addwfc ext_ee_temp2,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
211
42
da553e5c7a90 1.63 in work
heinrichsweikamp
parents: 21
diff changeset
212 btfsc ext_ee_temp2,7 ; 0x8000 reached?
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
213 bra get_free_EEPROM_location3b ; yes
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
214
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
215 bsf SSPCON2, ACKEN ; no, send Ack
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
216 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
217 bra get_free_EEPROM_location2 ; and continue search
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
218 get_free_EEPROM_location3b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
219 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
220 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
221 get_free_EEPROM_location4:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
222 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
223 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
224
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
225 bcf second_FD ; clear flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
226 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
227 return ; return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
228
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
229
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
230 I2CREAD:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
231 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
232 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
233 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
234 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
235 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
236 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
237 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
238 btfsc SSPCON2,ACKSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
239 bra I2CREAD ; EEPROM NOT acknowledged, retry!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
240 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
241 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
242 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
243 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
244 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
245 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
246
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
247 bsf SSPCON2,RSEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
248 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
249 movlw b'10100111' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
250 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
251 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
252 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
253
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
254 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
255 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
256 movf SSPBUF,W ; copy read byte into WREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
257 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
258 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
259 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
260
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
261 I2CREAD2: ; same as I2CREAD but with automatic address increase
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
262 rcall I2CREAD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
263 movlw d'1'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
264 addwf eeprom_address+0,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
265 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
266 addwfc eeprom_address+1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
267 bcf eeprom_overflow
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
268 btfss eeprom_address+1,7 ; at 0x8000?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
269 return ; no, return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
270
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
271 clrf eeprom_address+0 ; Yes, clear address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
272 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
273 bsf eeprom_overflow ; and set overflow bit
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
274 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
275
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
276 I2CWRITE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
277 movwf ext_ee_temp1 ; Data byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
278 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
279 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
280 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
281 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
282 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
283 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
284 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
285 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
286 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
287 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
288 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
289 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
290 movff ext_ee_temp1, SSPBUF ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
291 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
292 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
293 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
294 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
295 WAITMS d'6' ; Write delay
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
296 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
297
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
298 I2C_WaitforACK:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
299 btfsc SSPCON2,ACKSTAT ; checks for ACK bit from slave
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
300 rcall I2CFail
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
301 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
302
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
303 I2CFail:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
304 ostc_debug 'M' ; Sends debug-information to screen if debugmode active
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
305 bsf LED_red
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
306 rcall I2CReset ; I2C Reset
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
307 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
308 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
309 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
310
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
311 WaitMSSP:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
312 decfsz i2c_temp,F ; check for timeout during I2C action
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
313 bra WaitMSSP2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
314 bra I2CFail ; timeout occured
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
315 WaitMSSP2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
316 btfss PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
317 bra WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
318 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
319 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
320 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
321
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
322 I2CReset: ; Something went wrong (Slave holds SDA low?)
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
323 clrf SSPCON1 ; wake-up slave and reset entire module
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
324 ostc_debug 'N' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
325 clrf SSPCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
326 clrf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
327 bcf TRISC,3 ; SCL OUTPUT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
328 bsf TRISC,4 ; SDA Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
329 bcf PORTC,3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
330 movlw d'9'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
331 movwf i2c_temp ; clock-out 9 clock cycles manually
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
332 I2CReset_1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
333 bsf PORTC,3 ; SCL=1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
334 nop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
335 btfsc PORTC,4 ; SDA=1?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
336 bra I2CReset_2 ; =1, SDA has been released from slave
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
337 bcf PORTC,3 ; SCL=0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
338 bcf PORTC,3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
339 decfsz i2c_temp,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
340 bra I2CReset_1 ; check for nine clock cycles
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
341 I2CReset_2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
342 bsf TRISC,3 ; SCL Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
343 clrf SSPCON1 ; set I²C Mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
344 WAITMS d'10' ; Reset-Timeout for I2C devices
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
345 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
346 movwf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
347 movlw b'00101000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
348 movwf SSPCON1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
349 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
350 movwf SSPCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
351 movlw d'8' ; 400kHz I2C clock @ 16MHz Fcy
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
352 movwf SSPADD
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
353 bcf LED_red
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
354 ostc_debug 'O' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
355 return
53
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
356
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
357 ;I2C_TX:
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
358 ; movwf i2c_temp2 ; Data byte
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
359 ; bsf SSPCON2,SEN ; Start condition
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
360 ; rcall WaitMSSP
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
361 ; movlw b'10010000' ; Bit0=0: WRITE, Bit0=1: READ
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
362 ; movwf SSPBUF ; control byte
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
363 ; rcall WaitMSSP
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
364 ; rcall I2C_WaitforACK
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
365 ; movff i2c_temp2, SSPBUF ; Data Byte
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
366 ; rcall WaitMSSP
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
367 ; rcall I2C_WaitforACK
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
368 ; bsf SSPCON2,PEN ; Stop condition
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
369 ; rcall WaitMSSP
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
370 ; return
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
371 ;I2C_RX:
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
372 ; bcf PIR1,SSPIF
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
373 ; bsf SSPCON2,SEN ; Start condition
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
374 ; rcall WaitMSSP
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
375 ; movlw b'10010001' ; Bit0=0: WRITE, Bit0=1: READ
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
376 ; movwf SSPBUF ; control byte
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
377 ; rcall WaitMSSP
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
378 ; rcall I2C_WaitforACK
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
379 ; bsf SSPCON2, RCEN ; Enable recieve mode
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
380 ; rcall WaitMSSP
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
381 ; movff SSPBUF,i2c_temp2 ; Data Byte
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
382 ; bsf SSPCON2,ACKEN ; Master acknowlegde
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
383 ; rcall WaitMSSP
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
384 ; bsf SSPCON2,PEN ; Stop condition
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
385 ; rcall WaitMSSP
263348f83485 1.70 cleaning the code
heinrichsweikamp
parents: 42
diff changeset
386 ; return