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annotate code_part1/OSTC_code_c_part2/18f4685_ostc.lkr @ 666:3282581fe178

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Allow gf switch
author heinrichsweikamp
date Sun, 02 Dec 2012 19:19:11 +0100
parents 14a074e1a375
children
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1 // OSTC - diving computer code
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2 // Copyright (C) 2008 HeinrichsWeikamp GbR
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3 //
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4 // This program is free software: you can redistribute it and/or modify
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5 // it under the terms of the GNU General Public License as published by
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6 // the Free Software Foundation, either version 3 of the License, or
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7 // (at your option) any later version.
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8 //
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9 // This program is distributed in the hope that it will be useful,
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10 // but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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12 // GNU General Public License for more details.
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13 //
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14 // You should have received a copy of the GNU General Public License
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15 // along with this program. If not, see <http://www.gnu.org/licenses/>.
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16 //
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17 // File: 18f4685.lkr
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18 // Sample linker script for the PIC18F4685 processor
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19 // modified by chsw for ostc, Nov. 2007
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20
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21 LIBPATH .
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22
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23 FILES "clib.lib"
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24 FILES "p18f4685.lib"
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25
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26 CODEPAGE NAME=page START=0x0 END=0x17FFF
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27 CODEPAGE NAME=idlocs START=0x200000 END=0x200007 PROTECTED
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28 CODEPAGE NAME=config START=0x300000 END=0x30000D PROTECTED
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29 CODEPAGE NAME=devid START=0x3FFFFE END=0x3FFFFF PROTECTED
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32 ACCESSBANK NAME=accessram START=0x0 END=0x5F
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33 DATABANK NAME=gpr0 START=0x60 END=0xFF
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34 DATABANK NAME=gpr1 START=0x100 END=0x1FF
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35 DATABANK NAME=gpr2 START=0x200 END=0x2FF
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44 DATABANK NAME=gpr11 START=0xB00 END=0xBFF
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45 DATABANK NAME=gpr12 START=0xC00 END=0xCFF
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51
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52 SECTION NAME=CONFIG ROM=config
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53
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54 STACK SIZE=0x100 RAM=gpr12