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annotate code_part1/OSTC_code_asm_part1/i2c_eeprom.asm @ 450:26e5bb28891d

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1.97beta release - 1.98start
author heinrichsweikamp
date Mon, 15 Aug 2011 10:23:27 +0200
parents a76c5a3e9e96
children c512a868937c
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1
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2 ; OSTC - diving computer code
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3 ; Copyright (C) 2008 HeinrichsWeikamp GbR
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4 ; This program is free software: you can redistribute it and/or modify
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5 ; it under the terms of the GNU General Public License as published by
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6 ; the Free Software Foundation, either version 3 of the License, or
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7 ; (at your option) any later version.
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8 ; This program is distributed in the hope that it will be useful,
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9 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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10 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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11 ; GNU General Public License for more details.
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12 ; You should have received a copy of the GNU General Public License
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13 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
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14 ; provides routines for external EEPROM via I2C
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15 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
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16 ; written: 10/30/05
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17 ; last updated: 08/21/06
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18 ; known bugs:
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19 ; ToDo: use 2nd 32KB from external EEPROM for something
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20
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21 incf_eeprom_address macro ext_ee_temp1 ; Will increase eeprom_address:2 with the 8Bit value "ext_ee_temp1"
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22 movlw ext_ee_temp1
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23 call incf_eeprom_address0
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24 endm
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25
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26 incf_eeprom_address0:
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27 addwf eeprom_address+0,F ; increase address
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28 movlw d'0'
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29 addwfc eeprom_address+1,F
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30 return
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31
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32 ;=============================================================================
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33 ; Will decrease eeprom_address:2 with the 8Bit value "ext_ee_temp1"
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34
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35
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36 decf_eeprom_address macro ext_ee_temp1
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37 movlw ext_ee_temp1
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38 call decf_eeprom_address0
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39 endm
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40
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41 decf_eeprom_address0:
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42 subwf eeprom_address+0,F ; decrease address: do a 16-8bits substract.
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43 movlw d'0'
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44 subwfb eeprom_address+1,F
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45 return
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46
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47 ;=============================================================================
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48
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49 write_external_eeprom: ; data in WREG
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50 ; increase address eeprom_address+0:eeprom_address+1 after write
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51 ; with banking after 7FFF
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52 #ifdef TESTING
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53 ; When Simulating with MPLabSIM, there is no way to emulate external EEPROM...
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54 return
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55 #endif
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56
0
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57 rcall I2CWRITE ; writes WREG into EEPROM@eeprom_address
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58 movlw d'1' ; increase address
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59 addwf eeprom_address+0,F
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60 movlw d'0'
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61 addwfc eeprom_address+1,F
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62 return
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63 ; btfss eeprom_address+1,7 ; at address 8000?
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64 ; return ; no, return
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65 ;
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66 ; clrf eeprom_address+0 ; Clear eeprom address
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67 ; clrf eeprom_address+1
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68 ; return
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69 ;
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70 write_external_eeprom_block: ; Writes a block of 64Byte (one page in external EEPROM without stop condition
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71 #ifdef TESTING
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72 ; When Simulating with MPLabSIM, there is no way to emulate external EEPROM...
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73 return
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74 #endif
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75
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76 btfsc eeprom_blockwrite ; Blockwrite continue?
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77 rcall I2CWRITE_BLOCK2
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78 btfss eeprom_blockwrite ; Blockwrite start?
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79 rcall I2CWRITE_BLOCK
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80 bsf eeprom_blockwrite ; After the start, do blockwriting for the next 63Bytes!
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81
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82 movlw d'0' ; increase address
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83 incf eeprom_address+0,F
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84 addwfc eeprom_address+1,F
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85 return
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86
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87 ; btfss eeprom_address+1,7 ; at address 8000
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88 ; return ; no, return
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89 ;
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90 ; clrf eeprom_address+0 ; Clear eeprom address
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91 ; clrf eeprom_address+1
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92 ; return
0
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93 I2CWRITE_BLOCK:
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94 movwf ext_ee_temp1 ; Data byte in WREG
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95 bsf SSPCON2,SEN ; Start condition
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96 rcall WaitMSSP
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97 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
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98 btfss eeprom_address+1,7 ; Access Block2?
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99 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
0
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100 movwf SSPBUF ; control byte
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101 rcall WaitMSSP
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102 rcall I2C_WaitforACK
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103 movff eeprom_address+1,SSPBUF ; High Address byte
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104 rcall WaitMSSP
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105 rcall I2C_WaitforACK
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106 movff eeprom_address+0,SSPBUF ; Low Address byte
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107 rcall WaitMSSP
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108 rcall I2C_WaitforACK
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109 I2CWRITE_BLOCK2:
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110 movff ext_ee_temp1, SSPBUF ; Data Byte
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111 rcall WaitMSSP
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112 rcall I2C_WaitforACK
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113 return
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114
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115
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116 get_free_EEPROM_location: ; Searches 0xFD, 0xFD, 0xFE and sets Pointer to 0xFE
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117
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118 #ifdef TESTING
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119 ; In testing mode, find 0x100 (internal EEPROM) as the first free location...
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120 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
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121 movlw 0x1
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122 movwf eeprom_address+1
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123 return
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124 #endif
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125
0
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126 clrf ext_ee_temp1 ; low address counter
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127 clrf ext_ee_temp2 ; high address counter
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128 bcf second_FD ; clear flags
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129 bcf first_FD
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130 get_free_EEPROM_location3:
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131 bsf SSPCON2, PEN ; Stop condition
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132 rcall WaitMSSP
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133 bsf SSPCON2,SEN ; Start condition
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134 rcall WaitMSSP
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135 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
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136 btfss ext_ee_temp2,7 ; Access Block2?
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137 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
0
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138 movwf SSPBUF ; control byte
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139 rcall WaitMSSP
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140 btfsc SSPCON2,ACKSTAT
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141 bra get_free_EEPROM_location3 ; EEPROM NOT acknowledged, retry!
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142
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143 movff ext_ee_temp2,SSPBUF ; High Address byte
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144 rcall WaitMSSP
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145 rcall I2C_WaitforACK
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146 movff ext_ee_temp1,SSPBUF ; Low Address byte
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147 rcall WaitMSSP
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148 rcall I2C_WaitforACK
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149
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150 bsf SSPCON2,RSEN ; Start condition
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151 rcall WaitMSSP
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152 movlw b'10101111' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
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153 btfss ext_ee_temp2,7 ; Access Block2?
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154 movlw b'10100111' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
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155 movwf SSPBUF ; control byte
0
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156 rcall WaitMSSP
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157 rcall I2C_WaitforACK
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158
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159 get_free_EEPROM_location2:
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160 bsf SSPCON2, RCEN ; Enable recieve mode
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161 rcall WaitMSSP
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162 btfsc first_FD
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163 bra test_2nd_FD
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164 bsf first_FD ; found first 0xFD?
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165 movlw 0xFD
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166 cpfseq SSPBUF
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167 bcf first_FD ; No
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168 bra get_free_EEPROM_location2c
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169
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170 test_2nd_FD:
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171 btfsc second_FD
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172 bra test_FE
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173 bsf second_FD ; found second 0xFD?
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174 movlw 0xFD
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175 cpfseq SSPBUF
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176 bra get_free_EEPROM_location2b ;No, clear both flags
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177 bra get_free_EEPROM_location2c
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heinrichsweikamp
parents:
diff changeset
178 test_FE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
179 movlw 0xFE ; found the final 0xFE?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
180 cpfseq SSPBUF
96a35aeda5f2 Initial setup
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parents:
diff changeset
181 bra get_free_EEPROM_location2b ;No, clear both flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
182 movff ext_ee_temp1,eeprom_address+0 ;Yes, copy ext_ee_temp1->eeprom_address+0 and
96a35aeda5f2 Initial setup
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parents:
diff changeset
183 movff ext_ee_temp2,eeprom_address+1 ;ext_ee_temp2->eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
184 bra get_free_EEPROM_location4 ; Done.
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
185
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
186 get_free_EEPROM_location2b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
187 bcf second_FD ; clear both flags!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
188 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
189 get_free_EEPROM_location2c:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
190 movlw d'1' ; and increase search address
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
191 addwf ext_ee_temp1,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
192 movlw d'0'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
193 addwfc ext_ee_temp2,F
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
194
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
195 movlw 0xFF
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diff changeset
196 cpfseq ext_ee_temp2 ; =0xFFFF
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
197 bra get_free_EEPROM_location2d ; No
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
198 cpfseq ext_ee_temp1 ; =0xFFFF
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
199 bra get_free_EEPROM_location2d ; No
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
200
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
201 bra get_free_EEPROM_location3b ; yes
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
202
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
203 get_free_EEPROM_location2d:
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
204 bsf SSPCON2, ACKEN ; no, send Ack
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
205 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
206 bra get_free_EEPROM_location2 ; and continue search
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
207 get_free_EEPROM_location3b:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
208 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
209 clrf eeprom_address+1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
210 get_free_EEPROM_location4:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
211 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
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diff changeset
212 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
213
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
214 bcf second_FD ; clear flags
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
215 bcf first_FD
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
216 return ; return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
217
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
218
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
219 I2CREAD:
245
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
220 rcall I2CREAD_COMMON
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
221 bsf SSPCON2, PEN ; Stop
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
222 rcall WaitMSSP
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
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diff changeset
223 return
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
224
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
225 I2CREAD2: ; same as I2CREAD but with automatic address increase
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
226 rcall I2CREAD
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
227 I2CREAD2_2:
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
228 movlw d'1'
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
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diff changeset
229 addwf eeprom_address+0,F
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
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diff changeset
230 movlw d'0'
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
231 addwfc eeprom_address+1,F
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
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diff changeset
232 return
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
233 ; btfss eeprom_address+1,7 ; at 0x8000?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
234 ; return ; no, return
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
235 ;
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
236 ; clrf eeprom_address+0 ; Yes, clear address
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
237 ; clrf eeprom_address+1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
238 ; return
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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239 ;
245
dee88c962653 Some clean up and minor I2C speed improvements
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240 I2CREAD3: ; block read start with automatic address increase
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
241 rcall I2CREAD_COMMON
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
242 ; no Stop condition here
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
243 bra I2CREAD2_2
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
244
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
245 I2CREAD4: ; block read with automatic address increase
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
246 bsf SSPCON2,ACKEN ; Master acknowlegde
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
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diff changeset
247 rcall WaitMSSP
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
248 bsf SSPCON2, RCEN ; Enable recieve mode
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
249 rcall WaitMSSP
dee88c962653 Some clean up and minor I2C speed improvements
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diff changeset
250 movf SSPBUF,W ; copy read byte into WREG
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
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251 ; no Stop condition here
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
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diff changeset
252 bra I2CREAD2_2
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
253
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
254
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
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diff changeset
255 I2CREAD_COMMON:
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
256 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
257 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
258 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
259 rcall WaitMSSP
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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260
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
261 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
262 btfss eeprom_address+1,7 ; Access Block2?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
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diff changeset
263 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
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diff changeset
264 movwf SSPBUF ; control byte
0
96a35aeda5f2 Initial setup
heinrichsweikamp
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diff changeset
265 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
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diff changeset
266 btfsc SSPCON2,ACKSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
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diff changeset
267 bra I2CREAD ; EEPROM NOT acknowledged, retry!
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
268 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
269 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
270 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
271 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
272 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
273 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
274
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
275 bsf SSPCON2,RSEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
276 rcall WaitMSSP
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
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diff changeset
277
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
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diff changeset
278 movlw b'10101111' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
279 btfss eeprom_address+1,7 ; Access Block2?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
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diff changeset
280 movlw b'10100111' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
281 movwf SSPBUF ; control byte
0
96a35aeda5f2 Initial setup
heinrichsweikamp
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diff changeset
282 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
283 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
284
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
285 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
286 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
287 movf SSPBUF,W ; copy read byte into WREG
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
288 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
289
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
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diff changeset
290
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
291 I2CWRITE:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
292 movwf ext_ee_temp1 ; Data byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
293 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
294 rcall WaitMSSP
350
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
295 movlw b'10101110' ; Bit0=0: WRITE, Bit0=1: READ, BLOCK2
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
296 btfss eeprom_address+1,7 ; Access Block2?
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
297 movlw b'10100110' ; No, -> Bit0=0: WRITE, Bit0=1: READ, BLOCK1
7250ca7c8d24 64kByte logbook (Still incompatible to existing PC software)
heinrichsweikamp
parents: 245
diff changeset
298 movwf SSPBUF ; control byte
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
299 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
300 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
301 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
302 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
303 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
304 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
305 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
306 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
307 movff ext_ee_temp1, SSPBUF ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
308 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
309 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
310 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
311 rcall WaitMSSP
245
dee88c962653 Some clean up and minor I2C speed improvements
heinrichsweikamp
parents: 148
diff changeset
312 WAITMS d'5' ; Write delay
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
313 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
314
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
315 I2C_WaitforACK:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
316 btfsc SSPCON2,ACKSTAT ; checks for ACK bit from slave
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
317 rcall I2CFail
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
318 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
319
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
320 I2CFail:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
321 ostc_debug 'M' ; Sends debug-information to screen if debugmode active
21
73014f788032 1.60 stable rc1
heinrichsweikamp
parents: 0
diff changeset
322 bsf LED_red
0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
323 rcall I2CReset ; I2C Reset
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
324 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
325 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
326 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
327
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
328 WaitMSSP:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
329 decfsz i2c_temp,F ; check for timeout during I2C action
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
330 bra WaitMSSP2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
331 bra I2CFail ; timeout occured
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
332 WaitMSSP2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
333 btfss PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
334 bra WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
335 clrf i2c_temp
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
336 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
337 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
338
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
339 I2CReset: ; Something went wrong (Slave holds SDA low?)
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
340 clrf SSPCON1 ; wake-up slave and reset entire module
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
341 ostc_debug 'N' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
342 clrf SSPCON2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
343 clrf SSPSTAT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
344 bcf TRISC,3 ; SCL OUTPUT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
345 bsf TRISC,4 ; SDA Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
346 bcf PORTC,3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
347 movlw d'9'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
348 movwf i2c_temp ; clock-out 9 clock cycles manually
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
349 I2CReset_1:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
350 bsf PORTC,3 ; SCL=1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
351 nop
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
352 btfsc PORTC,4 ; SDA=1?
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
353 bra I2CReset_2 ; =1, SDA has been released from slave
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
354 bcf PORTC,3 ; SCL=0
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
355 bcf PORTC,3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
356 decfsz i2c_temp,F
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
357 bra I2CReset_1 ; check for nine clock cycles
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
358 I2CReset_2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
359 bsf TRISC,3 ; SCL Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
360 clrf SSPCON1 ; set I²C Mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
361 WAITMS d'10' ; Reset-Timeout for I2C devices
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
362 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
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363 movwf SSPSTAT
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364 movlw b'00101000'
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365 movwf SSPCON1
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366 movlw b'00000000'
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367 movwf SSPCON2
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368 movlw d'8' ; 400kHz I2C clock @ 16MHz Fcy
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369 movwf SSPADD
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370 bcf LED_red
0
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371 ostc_debug 'O' ; Sends debug-information to screen if debugmode active
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372 return
53
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373
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374 ;I2C_TX:
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375 ; movwf i2c_temp2 ; Data byte
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376 ; bsf SSPCON2,SEN ; Start condition
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377 ; rcall WaitMSSP
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378 ; movlw b'10010000' ; Bit0=0: WRITE, Bit0=1: READ
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379 ; movwf SSPBUF ; control byte
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380 ; rcall WaitMSSP
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381 ; rcall I2C_WaitforACK
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382 ; movff i2c_temp2, SSPBUF ; Data Byte
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383 ; rcall WaitMSSP
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384 ; rcall I2C_WaitforACK
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385 ; bsf SSPCON2,PEN ; Stop condition
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386 ; rcall WaitMSSP
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387 ; return
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388 ;I2C_RX:
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389 ; bcf PIR1,SSPIF
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390 ; bsf SSPCON2,SEN ; Start condition
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391 ; rcall WaitMSSP
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392 ; movlw b'10010001' ; Bit0=0: WRITE, Bit0=1: READ
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393 ; movwf SSPBUF ; control byte
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394 ; rcall WaitMSSP
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395 ; rcall I2C_WaitforACK
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396 ; bsf SSPCON2, RCEN ; Enable recieve mode
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397 ; rcall WaitMSSP
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398 ; movff SSPBUF,i2c_temp2 ; Data Byte
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399 ; bsf SSPCON2,ACKEN ; Master acknowlegde
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400 ; rcall WaitMSSP
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401 ; bsf SSPCON2,PEN ; Stop condition
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402 ; rcall WaitMSSP
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403 ; return