annotate code_part1/OSTC_code_asm_part1/i2c_eeprom.asm @ 1:210410f7c1b4

clean up
author heinrichsweikamp
date Tue, 12 Jan 2010 16:07:28 +0100 (2010-01-12)
parents 96a35aeda5f2
children 73014f788032
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1
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2 ; OSTC - diving computer code
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3 ; Copyright (C) 2008 HeinrichsWeikamp GbR
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4 ; This program is free software: you can redistribute it and/or modify
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5 ; it under the terms of the GNU General Public License as published by
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6 ; the Free Software Foundation, either version 3 of the License, or
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7 ; (at your option) any later version.
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8 ; This program is distributed in the hope that it will be useful,
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9 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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10 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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11 ; GNU General Public License for more details.
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12 ; You should have received a copy of the GNU General Public License
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13 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
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14 ; provides routines for external EEPROM via I2C
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15 ; written by: Matthias Heinrichs, info@heinrichsweikamp.com
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16 ; written: 10/30/05
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17 ; last updated: 08/21/06
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18 ; known bugs:
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19 ; ToDo: use 2nd 32KB from external EEPROM for something
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20
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21 incf_eeprom_address macro ext_ee_temp1 ; Will increase eeprom_address:2 with the 8Bit value "ext_ee_temp1" and takes
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22 movlw ext_ee_temp1 ; care of bank switching at 0x8000
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23 call incf_eeprom_address0
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24 endm
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25
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26 incf_eeprom_address0:
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27 movwf ext_ee_temp1
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28 incf_eeprom_address1:
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29 movlw d'1' ; increase address
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30 addwf eeprom_address+0,F
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31 movlw d'0'
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32 addwfc eeprom_address+1,F
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33 btfss eeprom_address+1,7 ; at address 8000?
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34 bra incf_eeprom_address2 ; No, continue
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35
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36 ; Yes, clear eeprom_address:2
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37 clrf eeprom_address+0 ; Clear eeprom address
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38 clrf eeprom_address+1
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39
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40 incf_eeprom_address2:
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41 decfsz ext_ee_temp1,F ; All done?
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42 bra incf_eeprom_address1 ; No, continue
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43 return ; Done.
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44
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45 decf_eeprom_address macro ext_ee_temp1 ; Will decrease eeprom_address:2 with the 8Bit value "ext_ee_temp1" and takes
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46 movlw ext_ee_temp1 ; care of bank switching at 0x8000
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47 call decf_eeprom_address0
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48 endm
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49
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50 decf_eeprom_address0:
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51 movwf ext_ee_temp1
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52 decf_eeprom_address1:
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53 movlw d'1' ; decrease address
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54 subwf eeprom_address+0,F
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55 movlw d'0'
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56 subwfb eeprom_address+1,F
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57
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58 btfss eeprom_address+1,7 ; at address 8000?
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59 bra decf_eeprom_address2 ; No, continue
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60
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61 movlw b'01111111' ; yes, reset highbyte
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62 movwf eeprom_address+1
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63
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64 decf_eeprom_address2:
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65 decfsz ext_ee_temp1,F ; All done?
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66 bra decf_eeprom_address1 ; No, continue
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67 return ; Done.
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68
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69
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70 write_external_eeprom: ; data in WREG
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71 ; increase address eeprom_address+0:eeprom_address+1 after write
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72 ; with banking after 7FFF
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73 rcall I2CWRITE ; writes WREG into EEPROM@eeprom_address
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74 movlw d'1' ; increase address
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75 addwf eeprom_address+0,F
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76 movlw d'0'
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77 addwfc eeprom_address+1,F
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78 bcf eeprom_overflow
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79 btfss eeprom_address+1,7 ; at address 8000?
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80 return ; no, return
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81
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82 clrf eeprom_address+0 ; Clear eeprom address
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83 clrf eeprom_address+1
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84 bsf eeprom_overflow ; and set overflow bit
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85 return
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86 write_external_eeprom_block: ; Writes a block of 64Byte (one page in external EEPROM without stop condition
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87 btfsc eeprom_blockwrite ; Blockwrite continue?
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88 rcall I2CWRITE_BLOCK2
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89 btfss eeprom_blockwrite ; Blockwrite start?
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90 rcall I2CWRITE_BLOCK
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91 bsf eeprom_blockwrite ; After the start, do blockwriting for the next 63Bytes!
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92
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93 movlw d'0' ; increase address
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94 incf eeprom_address+0,F
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95 addwfc eeprom_address+1,F
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96 bcf eeprom_overflow
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97
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98 btfss eeprom_address+1,7 ; at address 8000
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99 return ; no, return
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100
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101 clrf eeprom_address+0 ; Clear eeprom address
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102 clrf eeprom_address+1
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103 bsf eeprom_overflow ; and set overflow bit
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104 return
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105 I2CWRITE_BLOCK:
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106 movwf ext_ee_temp1 ; Data byte in WREG
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107 bsf SSPCON2,SEN ; Start condition
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108 rcall WaitMSSP
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109 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
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110 movwf SSPBUF ; control byte
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111 rcall WaitMSSP
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112 rcall I2C_WaitforACK
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113 movff eeprom_address+1,SSPBUF ; High Address byte
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114 rcall WaitMSSP
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115 rcall I2C_WaitforACK
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116 movff eeprom_address+0,SSPBUF ; Low Address byte
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117 rcall WaitMSSP
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118 rcall I2C_WaitforACK
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119 I2CWRITE_BLOCK2:
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120 movff ext_ee_temp1, SSPBUF ; Data Byte
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121 rcall WaitMSSP
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122 rcall I2C_WaitforACK
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123 return
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124
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125
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126 get_free_EEPROM_location: ; Searches 0xFD, 0xFD, 0xFE and sets Pointer to 0xFE
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127 clrf ext_ee_temp1 ; low address counter
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128 clrf ext_ee_temp2 ; high address counter
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129 bcf second_FD ; clear flags
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130 bcf first_FD
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131 get_free_EEPROM_location3:
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132 bsf SSPCON2, PEN ; Stop condition
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133 rcall WaitMSSP
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134 bsf SSPCON2,SEN ; Start condition
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135 rcall WaitMSSP
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136 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
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137 movwf SSPBUF ; control byte
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138 rcall WaitMSSP
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139 btfsc SSPCON2,ACKSTAT
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140 bra get_free_EEPROM_location3 ; EEPROM NOT acknowledged, retry!
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141
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142 movff ext_ee_temp2,SSPBUF ; High Address byte
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143 rcall WaitMSSP
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144 rcall I2C_WaitforACK
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145 movff ext_ee_temp1,SSPBUF ; Low Address byte
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146 rcall WaitMSSP
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147 rcall I2C_WaitforACK
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148
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149 bsf SSPCON2,RSEN ; Start condition
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150 rcall WaitMSSP
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151 movlw b'10100111' ; Bit0=0: WRITE, Bit0=1: READ
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152 movwf SSPBUF ; control byte
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153 rcall WaitMSSP
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154 rcall I2C_WaitforACK
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155
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156 get_free_EEPROM_location2:
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157 bsf SSPCON2, RCEN ; Enable recieve mode
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158 rcall WaitMSSP
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159 btfsc first_FD
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160 bra test_2nd_FD
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161 bsf first_FD ; found first 0xFD?
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162 movlw 0xFD
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163 cpfseq SSPBUF
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164 bcf first_FD ; No
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165 bra get_free_EEPROM_location2c
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166
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167 test_2nd_FD:
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168 btfsc second_FD
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169 bra test_FE
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170 bsf second_FD ; found second 0xFD?
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171 movlw 0xFD
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172 cpfseq SSPBUF
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173 bra get_free_EEPROM_location2b ;No, clear both flags
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174 bra get_free_EEPROM_location2c
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175 test_FE:
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176 movlw 0xFE ; found the final 0xFE?
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177 cpfseq SSPBUF
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178 bra get_free_EEPROM_location2b ;No, clear both flags
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179 movff ext_ee_temp1,eeprom_address+0 ;Yes, copy ext_ee_temp1->eeprom_address+0 and
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180 movff ext_ee_temp2,eeprom_address+1 ;ext_ee_temp2->eeprom_address+1
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181 bra get_free_EEPROM_location4 ; Done.
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182
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183 get_free_EEPROM_location2b:
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184 bcf second_FD ; clear both flags!
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185 bcf first_FD
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186 get_free_EEPROM_location2c:
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187 movlw d'1' ; and increase search address
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188 addwf ext_ee_temp1,F
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189 movlw d'0'
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190 addwfc ext_ee_temp2,F
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191
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192 btfsc ext_ee_temp2,7 ; 8000 reached?
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193 bra get_free_EEPROM_location3b ; yes
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194
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195 bsf SSPCON2, ACKEN ; no, send Ack
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196 rcall WaitMSSP
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197 bra get_free_EEPROM_location2 ; and continue search
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
198 get_free_EEPROM_location3b:
96a35aeda5f2 Initial setup
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parents:
diff changeset
199 clrf eeprom_address+0 ; Not found in entire EEPROM, set to address 0
96a35aeda5f2 Initial setup
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parents:
diff changeset
200 clrf eeprom_address+1
96a35aeda5f2 Initial setup
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parents:
diff changeset
201 get_free_EEPROM_location4:
96a35aeda5f2 Initial setup
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parents:
diff changeset
202 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
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parents:
diff changeset
203 rcall WaitMSSP
96a35aeda5f2 Initial setup
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parents:
diff changeset
204
96a35aeda5f2 Initial setup
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parents:
diff changeset
205 bcf second_FD ; clear flags
96a35aeda5f2 Initial setup
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parents:
diff changeset
206 bcf first_FD
96a35aeda5f2 Initial setup
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parents:
diff changeset
207 return ; return
96a35aeda5f2 Initial setup
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parents:
diff changeset
208
96a35aeda5f2 Initial setup
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parents:
diff changeset
209
96a35aeda5f2 Initial setup
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parents:
diff changeset
210 I2CREAD:
96a35aeda5f2 Initial setup
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parents:
diff changeset
211 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
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parents:
diff changeset
212 rcall WaitMSSP
96a35aeda5f2 Initial setup
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diff changeset
213 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
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diff changeset
214 rcall WaitMSSP
96a35aeda5f2 Initial setup
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parents:
diff changeset
215 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
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parents:
diff changeset
216 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
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parents:
diff changeset
217 rcall WaitMSSP
96a35aeda5f2 Initial setup
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parents:
diff changeset
218 btfsc SSPCON2,ACKSTAT
96a35aeda5f2 Initial setup
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diff changeset
219 bra I2CREAD ; EEPROM NOT acknowledged, retry!
96a35aeda5f2 Initial setup
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parents:
diff changeset
220 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
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diff changeset
221 rcall WaitMSSP
96a35aeda5f2 Initial setup
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parents:
diff changeset
222 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
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diff changeset
223 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
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parents:
diff changeset
224 rcall WaitMSSP
96a35aeda5f2 Initial setup
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parents:
diff changeset
225 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
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diff changeset
226
96a35aeda5f2 Initial setup
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diff changeset
227 bsf SSPCON2,RSEN ; Start condition
96a35aeda5f2 Initial setup
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diff changeset
228 rcall WaitMSSP
96a35aeda5f2 Initial setup
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diff changeset
229 movlw b'10100111' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
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diff changeset
230 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
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diff changeset
231 rcall WaitMSSP
96a35aeda5f2 Initial setup
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diff changeset
232 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
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diff changeset
233
96a35aeda5f2 Initial setup
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diff changeset
234 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
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parents:
diff changeset
235 rcall WaitMSSP
96a35aeda5f2 Initial setup
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parents:
diff changeset
236 movf SSPBUF,W ; copy read byte into WREG
96a35aeda5f2 Initial setup
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diff changeset
237 bsf SSPCON2, PEN ; Stop
96a35aeda5f2 Initial setup
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diff changeset
238 rcall WaitMSSP
96a35aeda5f2 Initial setup
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diff changeset
239 return
96a35aeda5f2 Initial setup
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diff changeset
240
96a35aeda5f2 Initial setup
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parents:
diff changeset
241 I2CREAD2: ; same as I2CREAD but with automatic address increase
96a35aeda5f2 Initial setup
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parents:
diff changeset
242 rcall I2CREAD
96a35aeda5f2 Initial setup
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diff changeset
243 movlw d'1'
96a35aeda5f2 Initial setup
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diff changeset
244 addwf eeprom_address+0,F
96a35aeda5f2 Initial setup
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diff changeset
245 movlw d'0'
96a35aeda5f2 Initial setup
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diff changeset
246 addwfc eeprom_address+1,F
96a35aeda5f2 Initial setup
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diff changeset
247 bcf eeprom_overflow
96a35aeda5f2 Initial setup
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diff changeset
248 btfss eeprom_address+1,7 ; at 0x8000?
96a35aeda5f2 Initial setup
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diff changeset
249 return ; no, return
96a35aeda5f2 Initial setup
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parents:
diff changeset
250
96a35aeda5f2 Initial setup
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parents:
diff changeset
251 clrf eeprom_address+0 ; Yes, clear address
96a35aeda5f2 Initial setup
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diff changeset
252 clrf eeprom_address+1
96a35aeda5f2 Initial setup
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diff changeset
253 bsf eeprom_overflow ; and set overflow bit
96a35aeda5f2 Initial setup
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diff changeset
254 return
96a35aeda5f2 Initial setup
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diff changeset
255
96a35aeda5f2 Initial setup
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diff changeset
256 I2CWRITE:
96a35aeda5f2 Initial setup
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diff changeset
257 movwf ext_ee_temp1 ; Data byte
96a35aeda5f2 Initial setup
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diff changeset
258 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
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diff changeset
259 rcall WaitMSSP
96a35aeda5f2 Initial setup
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diff changeset
260 movlw b'10100110' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
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diff changeset
261 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
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diff changeset
262 rcall WaitMSSP
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diff changeset
263 rcall I2C_WaitforACK
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diff changeset
264 movff eeprom_address+1,SSPBUF ; High Address byte
96a35aeda5f2 Initial setup
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diff changeset
265 rcall WaitMSSP
96a35aeda5f2 Initial setup
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diff changeset
266 rcall I2C_WaitforACK
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diff changeset
267 movff eeprom_address+0,SSPBUF ; Low Address byte
96a35aeda5f2 Initial setup
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diff changeset
268 rcall WaitMSSP
96a35aeda5f2 Initial setup
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diff changeset
269 rcall I2C_WaitforACK
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diff changeset
270 movff ext_ee_temp1, SSPBUF ; Data Byte
96a35aeda5f2 Initial setup
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diff changeset
271 rcall WaitMSSP
96a35aeda5f2 Initial setup
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diff changeset
272 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
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diff changeset
273 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
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diff changeset
274 rcall WaitMSSP
96a35aeda5f2 Initial setup
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diff changeset
275 WAITMS d'6' ; Write delay
96a35aeda5f2 Initial setup
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diff changeset
276 return
96a35aeda5f2 Initial setup
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diff changeset
277
96a35aeda5f2 Initial setup
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diff changeset
278 I2C_WaitforACK:
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diff changeset
279 btfsc SSPCON2,ACKSTAT ; checks for ACK bit from slave
96a35aeda5f2 Initial setup
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diff changeset
280 rcall I2CFail
96a35aeda5f2 Initial setup
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diff changeset
281 return
96a35aeda5f2 Initial setup
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diff changeset
282
96a35aeda5f2 Initial setup
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diff changeset
283 I2CFail:
96a35aeda5f2 Initial setup
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parents:
diff changeset
284 ostc_debug 'M' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
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diff changeset
285 call set_LEDy
96a35aeda5f2 Initial setup
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diff changeset
286 rcall I2CReset ; I2C Reset
96a35aeda5f2 Initial setup
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diff changeset
287 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
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diff changeset
288 clrf i2c_temp
96a35aeda5f2 Initial setup
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diff changeset
289 return
96a35aeda5f2 Initial setup
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parents:
diff changeset
290
96a35aeda5f2 Initial setup
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parents:
diff changeset
291 WaitMSSP:
96a35aeda5f2 Initial setup
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parents:
diff changeset
292 decfsz i2c_temp,F ; check for timeout during I2C action
96a35aeda5f2 Initial setup
heinrichsweikamp
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diff changeset
293 bra WaitMSSP2
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
294 bra I2CFail ; timeout occured
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
295 WaitMSSP2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
296 btfss PIR1,SSPIF
96a35aeda5f2 Initial setup
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parents:
diff changeset
297 bra WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
298 clrf i2c_temp
96a35aeda5f2 Initial setup
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parents:
diff changeset
299 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
300 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
301
96a35aeda5f2 Initial setup
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parents:
diff changeset
302 I2CReset: ; Something went wrong (Slave holds SDA low?)
96a35aeda5f2 Initial setup
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parents:
diff changeset
303 clrf SSPCON1 ; wake-up slave and reset entire module
96a35aeda5f2 Initial setup
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diff changeset
304 ostc_debug 'N' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
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diff changeset
305 clrf SSPCON2
96a35aeda5f2 Initial setup
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diff changeset
306 clrf SSPSTAT
96a35aeda5f2 Initial setup
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parents:
diff changeset
307 bcf TRISC,3 ; SCL OUTPUT
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
308 bsf TRISC,4 ; SDA Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
309 bcf PORTC,3
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
310 movlw d'9'
96a35aeda5f2 Initial setup
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parents:
diff changeset
311 movwf i2c_temp ; clock-out 9 clock cycles manually
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
312 I2CReset_1:
96a35aeda5f2 Initial setup
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diff changeset
313 bsf PORTC,3 ; SCL=1
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
314 nop
96a35aeda5f2 Initial setup
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parents:
diff changeset
315 btfsc PORTC,4 ; SDA=1?
96a35aeda5f2 Initial setup
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parents:
diff changeset
316 bra I2CReset_2 ; =1, SDA has been released from slave
96a35aeda5f2 Initial setup
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parents:
diff changeset
317 bcf PORTC,3 ; SCL=0
96a35aeda5f2 Initial setup
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parents:
diff changeset
318 bcf PORTC,3
96a35aeda5f2 Initial setup
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parents:
diff changeset
319 decfsz i2c_temp,F
96a35aeda5f2 Initial setup
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parents:
diff changeset
320 bra I2CReset_1 ; check for nine clock cycles
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
321 I2CReset_2:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
322 bsf TRISC,3 ; SCL Input
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
323 clrf SSPCON1 ; set I²C Mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
324 WAITMS d'10' ; Reset-Timeout for I2C devices
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
325 movlw b'00000000'
96a35aeda5f2 Initial setup
heinrichsweikamp
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diff changeset
326 movwf SSPSTAT
96a35aeda5f2 Initial setup
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parents:
diff changeset
327 movlw b'00101000'
96a35aeda5f2 Initial setup
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parents:
diff changeset
328 movwf SSPCON1
96a35aeda5f2 Initial setup
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parents:
diff changeset
329 movlw b'00000000'
96a35aeda5f2 Initial setup
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diff changeset
330 movwf SSPCON2
96a35aeda5f2 Initial setup
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parents:
diff changeset
331 movlw d'8' ; 400kHz I2C clock @ 16MHz Fcy
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
332 movwf SSPADD
96a35aeda5f2 Initial setup
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parents:
diff changeset
333 call clear_LEDy
96a35aeda5f2 Initial setup
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parents:
diff changeset
334 ostc_debug 'O' ; Sends debug-information to screen if debugmode active
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
335 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
336 I2C_TX:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
337 movwf i2c_temp2 ; Data byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
338 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
339 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
340 movlw b'10010000' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
341 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
342 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
343 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
344 movff i2c_temp2, SSPBUF ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
345 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
346 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
347 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
348 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
349 return
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
350 I2C_RX:
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
351 bcf PIR1,SSPIF
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
352 bsf SSPCON2,SEN ; Start condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
353 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
354 movlw b'10010001' ; Bit0=0: WRITE, Bit0=1: READ
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
355 movwf SSPBUF ; control byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
356 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
357 rcall I2C_WaitforACK
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
358 bsf SSPCON2, RCEN ; Enable recieve mode
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
359 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
360 movff SSPBUF,i2c_temp2 ; Data Byte
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
361 bsf SSPCON2,ACKEN ; Master acknowlegde
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
362 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
363 bsf SSPCON2,PEN ; Stop condition
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
364 rcall WaitMSSP
96a35aeda5f2 Initial setup
heinrichsweikamp
parents:
diff changeset
365 return