# HG changeset patch # User heinrichsweikamp # Date 1517661362 -3600 # Node ID 9c54849b8d3b499a52982a13f05f1e7f3bc8a6e9 # Parent b7eb98dbd8002526253974384be5659e33db4874 Remove routine to fix corrupt dives made with v1.80 diff -r b7eb98dbd800 -r 9c54849b8d3b src/external_flash.asm --- a/src/external_flash.asm Wed Jan 31 19:39:37 2018 +0100 +++ b/src/external_flash.asm Sat Feb 03 13:36:02 2018 +0100 @@ -341,76 +341,4 @@ movf SSP2BUF,W return ; Returns RX data in WREG and SSP2BUF - global fix_180_dives -fix_180_dives: ; fix dives made with the 1.80 - clrf divesecs ; Here: # of dive (0-255) in TOC -fix_180_dives2: - rcall fix_load_dive_into_buffer ; Load header #divesecs into buffer:256 - rcall fix_check_buffer ; Check the buffered dive - tstfsz WREG ; Dive needs fix? - rcall fix_buffered_dive ; Yes, fix and save it - decfsz divesecs,F ; All done? - bra fix_180_dives2 ; No, continue - return ; All done. - -fix_buffered_dive: ; Yes, fix and save it - rcall ext_flash_disable_protection ; Disable write protection for external flash - banksel buffer - ; Set to 1.81 - movlw .81 - movwf buffer+.49 - ; Fix wrong profile length - movlw .3 - subwf buffer+.9,F - movlw d'0' - subwfb buffer+.10,F - subwfb buffer+.11,F - banksel common - ; save result into external flash again - rcall fix_set_to_toc_start - clrf lo - lfsr FSR0,buffer+0 -fix_buffered_dive2: - movf POSTINC0,W - rcall write_byte_ext_flash_plus_header; Write from WREG and increase address after write - decfsz lo,F ; All done? - bra fix_buffered_dive2 ; No, continue - return - -fix_check_buffer: ; Check the buffered dive - movff buffer+.48,temp1 - movlw .1 - cpfseq temp1 ; buffer+.48 = .1 ? - retlw .0 ; No, abort - movff buffer+.49,temp1 - movlw .80 - cpfseq temp1 ; buffer+.49 = .80 ? - retlw .0 ; No, abort - retlw .1 ; Yes, fix this dive - -fix_load_dive_into_buffer: ; Load header #divesecs into buffer:256 - rcall fix_set_to_toc_start - clrf lo - lfsr FSR0,buffer+0 -fix_load_dive_into_buffer2: - rcall ext_flash_byte_read_plus ; increase address after read - movff temp1,POSTINC0 ; copy into buffer - decfsz lo,F ; All done? - bra fix_load_dive_into_buffer2 ; No, continue - -fix_set_to_toc_start: - clrf ext_flash_address+0 - clrf ext_flash_address+1 - movlw 0x20 - movwf ext_flash_address+2 - movlw .16 - mulwf divesecs; divesecs*16 = offset to 0x2000 (up:hi) - movf PRODL,W - addwf ext_flash_address+1,F - movf PRODH,W - addwfc ext_flash_address+2,F - ; pointer at the first 0xFA of header - return - - END \ No newline at end of file diff -r b7eb98dbd800 -r 9c54849b8d3b src/external_flash.inc --- a/src/external_flash.inc Wed Jan 31 19:39:37 2018 +0100 +++ b/src/external_flash.inc Sat Feb 03 13:36:02 2018 +0100 @@ -12,8 +12,7 @@ extern incf_ext_flash_address_p1 ; +1 for the ext_flash_address:3 extern ext_flash_disable_protection; Disables write protection extern ext_flash_enable_protection ; Enables write protection - extern fix_180_dives ; fix dives made with the 1.80 - + ; Writes extern write_byte_ext_flash_plus ; Write from WREG and increase address after write with banking at 0x200000 extern write_byte_ext_flash_plus_nocnt ; No increase of ext_flash_dive_counter:3 diff -r b7eb98dbd800 -r 9c54849b8d3b src/hwos.inc --- a/src/hwos.inc Wed Jan 31 19:39:37 2018 +0100 +++ b/src/hwos.inc Sat Feb 03 13:36:02 2018 +0100 @@ -239,8 +239,8 @@ #DEFINE compass_averaging .10 ; numbers of extra averaging ; Hardware defines -#DEFINE battery_gauge_available hardware_flag,0 ; OSTC has rechargeable battery with battery management chip -#DEFINE ambient_sensor hardware_flag,1 ; OSTC has an ambient sensor +#DEFINE battery_gauge_available hardware_flag,0 ; OSTC has rechargeable battery with battery management chip +#DEFINE ambient_sensor hardware_flag,1 ; OSTC has an ambient light sensor #DEFINE analog_o2_input hardware_flag,2 ; OSTC has analog inputs and S8 digital #DEFINE optical_input hardware_flag,3 ; OSTC has an digital optical input #DEFINE ble_available hardware_flag,4 ; OSTC has an BLE module @@ -248,6 +248,17 @@ ;unused ;unused +; Hardware flag byte: +; BIT0 = OSTC has rechargeable battery with battery management chip +; BIT1 = OSTC has an ambient light sensor +; BIT2 = OSTC has analog inputs and S8 digital +; BIT3 = OSTC has an digital optical input +; BIT4 = OSTC has an BLE module +; BIT5 = OSTC_RX circuity present +; BIT6 = unused +; BIT7 = unused + + ;---------------------------- Macros ------------------------------------ TSTOSS macro opt_reg ; TeST Option Skip if not Zero diff -r b7eb98dbd800 -r 9c54849b8d3b src/start.asm --- a/src/start.asm Wed Jan 31 19:39:37 2018 +0100 +++ b/src/start.asm Sat Feb 03 13:36:02 2018 +0100 @@ -242,8 +242,6 @@ lfsr FSR0,oPressureAdjust call option_save ; Save in EEPROM - call fix_180_dives ; fix dives made with the 1.80 - rcall backup_flash_page ; backup the first 128bytes from flash to EEPROM movlw d'1' ; store current version in EEPROM