diff src/wait.asm @ 582:b455b31ce022

work on 2.97 stable
author heinrichsweikamp
date Mon, 26 Feb 2018 16:40:28 +0100
parents 653a3ab08062
children ca4556fb60b9
line wrap: on
line diff
--- a/src/wait.asm	Sun Feb 25 18:25:38 2018 +0100
+++ b/src/wait.asm	Mon Feb 26 16:40:28 2018 +0100
@@ -1,8 +1,8 @@
 ;=============================================================================
 ;
-;   File wait.asm
+;   File wait.asm														V2.98
 ;
-;  Wait routines
+;   Wait routines
 ;
 ;   Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
 ;=============================================================================
@@ -10,28 +10,30 @@
 ;   2004-01-31 : [chsw] Initial version.
 ;   2007-05-11 : Updated (OSTC code).
 ;   2011-10-18 : [mH] Timings tested with oscilloscope
-	
+
 #include "hwos.inc"
 
-basic       CODE
+basic	CODE
 
-; ==========================================================
-; 	WAIT 1 MILLISECOND   (Not exact: 1,008ms +/- 30,5µs + worst case ISR latency)
-; ==========================================================
+; =============================================================================
+; WAIT 1 MILLISECOND   (Not exact: 1,008ms +/- 30,5µs + worst case ISR latency)
+; =============================================================================
 
-            global  WAITMSX
-WAITMSX		movwf	waitms_temp
-			
-WAITMSX2	setf	TMR5H
-			movlw	.255-.32 			;32 x 31,5µs = 1,008ms
-			movwf	TMR5L
-			bcf		PIR5,TMR5IF			; Clear flag
-WAITMSX3	btfss	PIR5,TMR5IF
-			bra		WAITMSX3			; Wait loop
-			decfsz	waitms_temp,F
-			bra		WAITMSX2
-			return
+	global	WAITMSX
+WAITMSX:
+	movwf	wait_counter
+WAITMSX2:
+	setf	TMR5H
+	movlw	.255-.32 			;32 x 31,5µs = 1,008ms
+	movwf	TMR5L
+	bcf		PIR5,TMR5IF			; Clear flag
+WAITMSX3:
+	btfss	PIR5,TMR5IF
+	bra		WAITMSX3			; Wait loop
+	decfsz	wait_counter,F
+	bra		WAITMSX2
+	return
 
 ;=============================================================================
 
-            END
\ No newline at end of file
+	END
\ No newline at end of file