Mercurial > public > hwos_code
comparison src/hwos.asm @ 628:cd58f7fc86db
3.05 stable work
author | heinrichsweikamp |
---|---|
date | Thu, 19 Sep 2019 12:01:29 +0200 |
parents | bf5fee575701 |
children | 237931377539 |
comparison
equal
deleted
inserted
replaced
627:bf5fee575701 | 628:cd58f7fc86db |
---|---|
1 ;============================================================================= | 1 ;============================================================================= |
2 ; | 2 ; |
3 ; File hwos.asm combined next generation V3.03.4 | 3 ; File hwos.asm combined next generation V3.03.7 |
4 ; | 4 ; |
5 ; Definition of the hwOS dive computer platform. | 5 ; Definition of the hwOS dive computer platform. |
6 ; | 6 ; |
7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. | 7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. |
8 ;============================================================================= | 8 ;============================================================================= |
41 | 41 |
42 | 42 |
43 ;---- Flags - Hardware Descriptors | 43 ;---- Flags - Hardware Descriptors |
44 HW_descriptor res 1 ; OSTC - model descriptor (cleared & rebuilt in restart) | 44 HW_descriptor res 1 ; OSTC - model descriptor (cleared & rebuilt in restart) |
45 HW_variants res 1 ; OSTC - model variants (NOT cleared in restart) | 45 HW_variants res 1 ; OSTC - model variants (NOT cleared in restart) |
46 HW_variants2 res 1 ; OSTC - model variants (NOT cleared in restart) | 46 |
47 | |
48 ;---- Flags - Hardware States | 47 ;---- Flags - Hardware States |
49 HW_flags_state res 1 ; hardware - states | 48 HW_flags_state1 res 1 ; hardware - states 1 |
49 HW_flags_state2 res 1 ; hardware - states 2 | |
50 | 50 |
51 ;--- Flags - Operating System | 51 ;--- Flags - Operating System |
52 OS_flags_persist res 1 ; system - persistent settings (NOT cleared in restart) | 52 OS_flags_persist res 1 ; system - persistent settings (NOT cleared in restart) |
53 OS_flags_ISR1 res 1 ; system - ISR control 1 | 53 OS_flags_ISR1 res 1 ; system - ISR control 1 |
54 OS_flags_ISR2 res 1 ; system - ISR control 2 | 54 OS_flags_ISR2 res 1 ; system - ISR control 2 |
98 | 98 |
99 ; 28 byte user data | 99 ; 28 byte user data |
100 ; 32 byte tmp data placed by C compiler | 100 ; 32 byte tmp data placed by C compiler |
101 ; 20 byte variables placed by math library | 101 ; 20 byte variables placed by math library |
102 ; == | 102 ; == |
103 ; 81 byte used, 15 byte free (96 byte total available) | 103 ; 80 byte used, 16 byte free (96 byte total available) |
104 | 104 |
105 global HW_descriptor | 105 global HW_descriptor |
106 global HW_variants | 106 global HW_variants |
107 global HW_variants2 | 107 global HW_flags_state1 |
108 global HW_flags_state | 108 global HW_flags_state2 |
109 global OS_flags_persist | 109 global OS_flags_persist |
110 global OS_flags_ISR1 | 110 global OS_flags_ISR1 |
111 global OS_flags_ISR2 | 111 global OS_flags_ISR2 |
112 global OM_flags_mode | 112 global OM_flags_mode |
113 global DM_flags_deco | 113 global DM_flags_deco |
196 movlw b'00100000' ; 1= input, RD0 -> TFT_NCS, RD1 -> TFT_RS, RD2 -> TFT_NWR, RD3 -> TFT_RD, RD4 -> MOSI_Flash, RD5 -> MISO_Flash, RD6 -> CLK_Flash, RD7 -> TFT_NRESET | 196 movlw b'00100000' ; 1= input, RD0 -> TFT_NCS, RD1 -> TFT_RS, RD2 -> TFT_NWR, RD3 -> TFT_RD, RD4 -> MOSI_Flash, RD5 -> MISO_Flash, RD6 -> CLK_Flash, RD7 -> TFT_NRESET |
197 movwf TRISD | 197 movwf TRISD |
198 ; movlw b'00000000' ; init port | 198 ; movlw b'00000000' ; init port |
199 clrf PORTD | 199 clrf PORTD |
200 | 200 |
201 movlw b'00100000' ; 1= input, RE0 -> NPOWER_BLE, RE1 -> Power_IR, RE2 -> CS_MCP, RE3 -> LED_blue, RE4 -> power_sw1, RE5 -> leave as input | 201 movlw b'00100000' ; 1= input, RE0 -> not_Power_BLE, RE1 -> Power_IR, RE2 -> CS_MCP, RE3 -> LED_blue, RE4 -> power_sw1, RE5 -> leave as input |
202 movwf TRISE | 202 movwf TRISE |
203 movlw b'00010001' ; init port | 203 movlw b'00010001' ; init port |
204 movwf PORTE | 204 movwf PORTE |
205 | 205 |
206 movlw b'01111110' ; 1= input, (RF1, RF2, RF3, RF4, RF5) -> Analog | 206 movlw b'01111110' ; 1= input, (RF1, RF2, RF3, RF4, RF5) -> Analog |
207 movwf TRISF | 207 movwf TRISF |
208 ; movlw b'00000000' ; init port | 208 ; movlw b'00000000' ; init port |
209 clrf PORTF | 209 clrf PORTF |
210 | 210 |
211 movlw b'00001110' ; 1= input, <7:6> not implemented, RG0 -> TX3_PIEZO_CFG, RG2 -> RX2, RG3 -> AN17_RSSI, RG4 -> SOSC_OUT, RG5 -> /RESET | 211 movlw b'00001110' ; 1= input, <7:6> not implemented, RG0 -> TX3_PIEZO_CFG, , RG1 -> TX2, RG2 -> RX2, RG3 -> AN17_RSSI, RG4 -> SOSC_OUT, RG5 -> /RESET |
212 movwf TRISG | 212 movwf TRISG |
213 movlw b'00000001' ; init port | 213 movlw b'00000001' ; init port |
214 movwf PORTG | 214 movwf PORTG |
215 | 215 |
216 ; movlw b'00000000' ; 1= input -> Data TFT_low | 216 ; movlw b'00000000' ; 1= input -> Data TFT_low |
313 ; MSSP1 Module: I2C Master | 313 ; MSSP1 Module: I2C Master |
314 movlw b'00101000' ; I2C master mode | 314 movlw b'00101000' ; I2C master mode |
315 movwf SSP1CON1 | 315 movwf SSP1CON1 |
316 ; movlw b'00000000' | 316 ; movlw b'00000000' |
317 clrf SSP1CON2 | 317 clrf SSP1CON2 |
318 movlw 0x27 | 318 movlw 0x9C |
319 movwf SSP1ADD ; 100kHz @ 16MHz Fosc | 319 movwf SSP1ADD ; 100kHz @ 64MHz Fosc |
320 | 320 |
321 | 321 |
322 ; PWM Module(s) | 322 ; PWM Module(s) |
323 ; PWM 1 for LED dimming | 323 ; PWM 1 for LED dimming |
324 movlw b'00001100' | 324 movlw b'00001100' |
325 movwf CCP1CON | 325 movwf CCP1CON |
326 movlw b'00000001' | 326 movlw b'00000001' |
327 movwf PSTR1CON ; pulse steering disabled | 327 movwf PSTR1CON ; pulse steering disabled |
328 movlw d'255' | 328 movlw d'254' |
329 movwf PR2 ; period | 329 movwf PR2 ; period |
330 ; 255 is max brightness (300 mW) | 330 ; 255 is max brightness (300 mW) |
331 clrf CCPR1L ; duty cycle | 331 clrf CCPR1L ; duty cycle |
332 clrf CCPR1H ; duty cycle | 332 clrf CCPR1H ; duty cycle |
333 movlw T2CON_NORMAL | 333 movlw T2CON_NORMAL |