Mercurial > public > hwos_code
comparison src/eeprom_rs232.asm @ 604:ca4556fb60b9
bump to 2.99beta, work on 3.00 stable
author | heinrichsweikamp |
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date | Thu, 22 Nov 2018 19:47:26 +0100 |
parents | b455b31ce022 |
children | c40025d8e750 |
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603:00b24fb4324d | 604:ca4556fb60b9 |
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1 ;============================================================================= | 1 ;============================================================================= |
2 ; | 2 ; |
3 ; File eeprom_rs232.asm V2.98 | 3 ; File eeprom_rs232.asm V2.99a |
4 ; | 4 ; |
5 ; Internal EEPROM, RS232 | 5 ; Internal EEPROM, RS232 |
6 ; | 6 ; |
7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. | 7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. |
8 ;============================================================================= | 8 ;============================================================================= |
23 movlw eeprom_address | 23 movlw eeprom_address |
24 call read_int_eeprom_1 | 24 call read_int_eeprom_1 |
25 endm | 25 endm |
26 | 26 |
27 ;============================================================================= | 27 ;============================================================================= |
28 eeprom code 0xF00000+0x10 | 28 eeprom code 0xF00000+0x10 |
29 ; Skip SERIAL number. Should not be overwritten. | 29 ; skip SERIAL number - it should not be overwritten |
30 | 30 |
31 global eeprom_serial_save | 31 global eeprom_serial_save |
32 global eeprom_opt_backup | 32 global eeprom_opt_backup |
33 | 33 |
34 eeprom_serial_save res 2 | 34 eeprom_serial_save res 2 |
35 eeprom_opt_backup res 0x3E | 35 eeprom_opt_backup res 0x3E |
36 | 36 |
37 ;============================================================================= | 37 ;============================================================================= |
38 basic CODE | 38 ee_rs232 CODE |
39 | 39 |
40 global write_int_eeprom_1 | 40 global write_int_eeprom_1 |
41 write_int_eeprom_1: | 41 write_int_eeprom_1: |
42 movwf EEADR | 42 movwf EEADR |
43 ; bra write_eeprom ; writes and "returns" after write | 43 bra write_eeprom ; writes and "returns" after write |
44 | |
45 ;============================================================================= | |
46 ; writes into internal eeprom | |
47 ; Input: EEADRH:EEADR = EEPROM address. | |
48 ; EEDATA = byte to write. | |
49 ; Trashed: WREG. | |
50 global write_eeprom | |
51 write_eeprom: | |
52 bcf EECON1,EEPGD | |
53 bcf EECON1,CFGS | |
54 bsf EECON1,WREN | |
55 | |
56 bcf INTCON,GIE ; Disable interrupts for the next 5 instructions | |
57 movlw 0x55 | |
58 movwf EECON2 | |
59 movlw 0xAA | |
60 movwf EECON2 | |
61 bsf EECON1,WR | |
62 bsf INTCON,GIE ; ...but the flag for the ISR routines were still set, so they will interrupt now! | |
63 | |
64 write_eep2: | |
65 btfsc EECON1,WR | |
66 bra write_eep2 ; wait about 4ms... | |
67 bcf EECON1,WREN | |
68 return | |
69 | |
70 | 44 |
71 | 45 |
72 global read_int_eeprom_1 | 46 global read_int_eeprom_1 |
73 read_int_eeprom_1: | 47 read_int_eeprom_1: |
74 movwf EEADR | 48 movwf EEADR |
75 ; bra read_eeprom ; reads and "returns" after write | 49 bra read_eeprom ; reads and "returns" after write |
76 | 50 |
77 ;============================================================================= | 51 ;============================================================================= |
78 ; reads from internal eeprom | 52 ; reads from internal EEPROM |
79 ; Input: EEADRH:EEADR = EEPROM address. | 53 ; Input: EEADRH:EEADR = EEPROM address |
80 ; Output: EEDATA. | 54 ; Output: EEDATA |
81 ; Trashed: NONE. | 55 ; Trashed: NONE |
82 global read_eeprom | 56 global read_eeprom |
83 read_eeprom: | 57 read_eeprom: |
84 bcf EECON1,EEPGD | 58 bcf EECON1,EEPGD |
85 bcf EECON1,CFGS | 59 bcf EECON1,CFGS |
86 bsf EECON1,RD | 60 bsf EECON1,RD |
87 return | 61 return |
88 | 62 |
63 ;============================================================================= | |
64 ; writes into internal EEPROM | |
65 ; Input: EEADRH:EEADR = EEPROM address | |
66 ; EEDATA = byte to write | |
67 ; Trashed: WREG | |
68 global write_eeprom | |
69 write_eeprom: | |
70 bcf EECON1,EEPGD | |
71 bcf EECON1,CFGS | |
72 bsf EECON1,WREN | |
73 | |
74 bcf INTCON,GIE ; disable interrupts for the next 5 instructions | |
75 movlw 0x55 | |
76 movwf EECON2 | |
77 movlw 0xAA | |
78 movwf EECON2 | |
79 bsf EECON1,WR | |
80 bsf INTCON,GIE ; ...but the flag for the ISR routines were still set, so they will interrupt now! | |
81 | |
82 write_eep2: | |
83 btfsc EECON1,WR | |
84 bra write_eep2 ; wait about 4ms... | |
85 bcf EECON1,WREN | |
86 return | |
87 | |
88 | |
89 global disable_ir_s8 | 89 global disable_ir_s8 |
90 disable_ir_s8: | 90 disable_ir_s8: |
91 banksel TXSTA2 | 91 banksel TXSTA2 |
92 clrf TXSTA2 | 92 clrf TXSTA2 |
93 clrf RCSTA2 | 93 clrf RCSTA2 |
94 banksel common | 94 banksel common |
95 bcf ir_power ; IR off | 95 bcf ir_power ; IR off |
96 bcf mcp_power ; Power-down instrumentation amp | 96 bcf mcp_power ; power-down instrumentation amp |
97 bsf s8_npower ; Power-down S8 HUD | 97 bsf s8_npower ; power-down S8 HUD |
98 return | 98 return |
99 | 99 |
100 | 100 |
101 global enable_ir_s8 | 101 global enable_ir_s8 |
102 enable_ir_s8: | 102 enable_ir_s8: |
103 ;init serial port2 (TRISG2) | 103 ;init serial port2 (TRISG2) |
104 btfsc analog_o2_input | 104 btfsc analog_o2_input |
105 bra enable_s8 ; Start S8 | 105 bra enable_s8 ; start S8 |
106 | 106 |
107 banksel BAUDCON2 | 107 banksel BAUDCON2 |
108 movlw b'00100000' ; BRG16=0 ; inverted for IR | 108 movlw b'00100000' ; BRG16=0 ; inverted for IR |
109 movwf BAUDCON2 | 109 movwf BAUDCON2 |
110 movlw b'00100000' ; BRGH=0, SYNC=0 | 110 movlw b'00100000' ; BRGH=0, SYNC=0 |
111 movwf TXSTA2 | 111 movwf TXSTA2 |
112 movlw .102 ; SPBRGH:SPBRG = .102 : 2403 BAUD @ 16MHz | 112 movlw .102 ; SPBRGH:SPBRG = .102 : 2403 BAUD @ 16 MHz |
113 movwf SPBRG2 | 113 movwf SPBRG2 |
114 movlw b'10010000' | 114 movlw b'10010000' |
115 movwf RCSTA2 | 115 movwf RCSTA2 |
116 banksel common | 116 banksel common |
117 bsf ir_power ; Power-up IR | 117 bsf ir_power ; power-up IR |
118 btfss ir_power | 118 btfss ir_power |
119 bra $-6 | 119 bra $-6 |
120 return | 120 return |
121 | 121 |
122 enable_s8: | 122 enable_s8: |
123 ; Check for Digital/Analog | 123 ; Check for Digital/Analog |
124 bsf s8_npower ; Power-down S8 HUD | 124 bsf s8_npower ; power-down S8 HUD |
125 WAITMS d'1' ; Very short delay | 125 WAITMS d'1' ; very short delay |
126 bsf mcp_power ; Power-up instrumentation amp | 126 bsf mcp_power ; power-up instrumentation amp |
127 btfss mcp_power | 127 btfss mcp_power |
128 bra $-6 | 128 bra $-6 |
129 banksel TXSTA2 | 129 banksel TXSTA2 |
130 clrf TXSTA2 | 130 clrf TXSTA2 |
131 clrf RCSTA2 | 131 clrf RCSTA2 |
132 banksel common | 132 banksel common |
133 | 133 |
134 ; It may be digital, check for voltage when isolator is powered | 134 ; It may be digital, check for voltage when isolator is powered |
135 bcf s8_npower ; Power S8 HUD | 135 bcf s8_npower ; power S8 HUD |
136 WAITMS d'1' ; Very short delay | 136 WAITMS d'1' ; very short delay |
137 | 137 |
138 btfsc PORTG,2 ; RX2=1? | 138 btfsc PORTG,2 ; RX2=1? |
139 bra enable_s8_2 ; Yes, digital | 139 bra enable_s8_2 ; YES - digital |
140 WAITMS d'30' | 140 WAITMS d'30' |
141 btfsc PORTG,2 ; RX2=1? | 141 btfsc PORTG,2 ; RX2=1? |
142 bra enable_s8_2 ; Yes, digital | 142 bra enable_s8_2 ; YES - digital |
143 | 143 |
144 ; Not found, set to analog (fail-safe) | 144 ; Not found, set to analog (fail-safe) |
145 | 145 |
146 enable_s8_analog: | 146 enable_s8_analog: |
147 ; S8 Analog | 147 ; S8 Analog |
148 bsf s8_npower ; Power-down S8 HUD | 148 bsf s8_npower ; power-down S8 HUD |
149 bcf s8_digital ; Clear flag | 149 bcf s8_digital ; clear flag |
150 return | 150 return |
151 | 151 |
152 enable_s8_2: ; S8 Digital | 152 enable_s8_2: ; S8 Digital |
153 banksel BAUDCON2 | 153 banksel BAUDCON2 |
154 movlw b'00000000' ; BRG16=0 ; normal for S8 | 154 movlw b'00000000' ; BRG16=0 ; normal for S8 |
155 movwf BAUDCON2 | 155 movwf BAUDCON2 |
156 movlw b'00100000' ; BRGH=0, SYNC=0 | 156 movlw b'00100000' ; BRGH=0, SYNC=0 |
157 movwf TXSTA2 | 157 movwf TXSTA2 |
158 movlw .25 ; SPBRGH:SPBRG = .25 : 9615 BAUD @ 16MHz | 158 movlw .25 ; SPBRGH:SPBRG = .25 : 9615 BAUD @ 16 MHz |
159 movwf SPBRG2 | 159 movwf SPBRG2 |
160 movlw b'10010000' | 160 movlw b'10010000' |
161 movwf RCSTA2 | 161 movwf RCSTA2 |
162 banksel common | 162 banksel common |
163 bsf s8_digital ; Set flag | 163 bsf s8_digital ; set flag |
164 return | 164 return |
165 | 165 |
166 ;============================================================================= | 166 ;============================================================================= |
167 | 167 |
168 global enable_rs232 | 168 global enable_rs232 |
169 enable_rs232: | 169 enable_rs232: |
170 call speed_normal ; 16MHz | 170 call speed_normal ; 16 MHz |
171 enable_rs232_2: | 171 enable_rs232_2: |
172 movlw T2CON_NORMAL | 172 movlw T2CON_NORMAL |
173 cpfseq T2CON | 173 cpfseq T2CON |
174 bra enable_rs232_2 ; Wait until speed is normal | 174 bra enable_rs232_2 ; wait until speed is normal |
175 bcf PORTE,0 ; Start comms | 175 bcf PORTE,0 ; start comms |
176 ;init serial port1 (TRISC6/7) | 176 ;init serial port1 (TRISC6/7) |
177 movlw b'00100100' ; BRGH=1, SYNC=0 | 177 movlw b'00100100' ; BRGH=1, SYNC=0 |
178 movwf TXSTA1 | 178 movwf TXSTA1 |
179 movlw b'10010000' | 179 movlw b'10010000' |
180 movwf RCSTA1 | 180 movwf RCSTA1 |
184 global disable_rs232 | 184 global disable_rs232 |
185 disable_rs232: | 185 disable_rs232: |
186 clrf RCSTA1 | 186 clrf RCSTA1 |
187 clrf TXSTA1 ; UART disable | 187 clrf TXSTA1 ; UART disable |
188 bcf PORTC,6 ; TX hard to GND | 188 bcf PORTC,6 ; TX hard to GND |
189 bsf PORTE,0 ; Stop comms | 189 bsf PORTE,0 ; stop comms |
190 return | 190 return |
191 | 191 |
192 | 192 |
193 global rs232_wait_tx | 193 global rs232_wait_tx |
194 rs232_wait_tx: | 194 rs232_wait_tx: |
195 btfss TXSTA1,TRMT ; RS232 Busy? | 195 btfss TXSTA1,TRMT ; RS232 Busy? |
196 bra rs232_wait_tx ; yes, wait... | 196 bra rs232_wait_tx ; YES - wait... |
197 | 197 |
198 btfss ble_available ; ble available? | 198 btfss ble_available ; ble available? |
199 return ; No, done. | 199 return ; NO - done |
200 | 200 |
201 btfsc NRTS ; Wait for Bluetooth module | 201 btfsc NRTS ; wait for Bluetooth module |
202 bra rs232_wait_tx ; yes, wait... | 202 bra rs232_wait_tx ; YES - wait... |
203 return ; Done. | 203 return ; done |
204 | 204 |
205 | 205 |
206 global rs232_wait_tx2 | 206 global rs232_wait_tx2 |
207 rs232_wait_tx2: | 207 rs232_wait_tx2: |
208 banksel TXSTA2 | 208 banksel TXSTA2 |
209 rs232_wait_tx2_1: | 209 rs232_wait_tx2_1: |
210 btfss TXSTA2,TRMT ; RS232 Busy? | 210 btfss TXSTA2,TRMT ; RS232 busy? |
211 bra rs232_wait_tx2_1 ; yes, wait... | 211 bra rs232_wait_tx2_1 ; YES - wait... |
212 banksel common | 212 banksel common |
213 return ; Done. | 213 return ; done |
214 | 214 |
215 global rs232_get_byte | 215 global rs232_get_byte |
216 rs232_get_byte: | 216 rs232_get_byte: |
217 bcf rs232_receive_overflow ; clear flag | 217 bcf rs232_receive_overflow ; clear flag |
218 movlw .10 | 218 clrf uart1_temp ; set uart1_temp to .10 without using WREG: first clear to 0, then... |
219 movwf uart1_temp | 219 bsf uart1_temp,1 ; set bit 1 (value 2), |
220 bsf uart1_temp,3 ; and bit 3 (value 8). | |
220 clrf uart2_temp | 221 clrf uart2_temp |
221 clrf uart3_temp | 222 clrf uart3_temp |
222 rs232_get_byte2: | 223 rs232_get_byte2: |
223 btfsc PIR1,RCIF ; data arrived? | 224 btfsc PIR1,RCIF ; data arrived? |
224 return ; Yes | 225 return ; YES |
225 decfsz uart3_temp,F | 226 decfsz uart3_temp,F |
226 bra rs232_get_byte2 | 227 bra rs232_get_byte2 |
227 decfsz uart2_temp,F | 228 decfsz uart2_temp,F |
228 bra rs232_get_byte2 | 229 bra rs232_get_byte2 |
229 decfsz uart1_temp,F | 230 decfsz uart1_temp,F |
230 bra rs232_get_byte2 | 231 bra rs232_get_byte2 |
231 ; timeout occurred (about 400ms) | 232 ; timeout occurred (about 400ms) |
232 bsf rs232_receive_overflow ; set flag | 233 bsf rs232_receive_overflow ; set flag |
233 rs232_get_byte3: | 234 rs232_get_byte3: |
234 bcf RCSTA1,CREN ; Clear receiver status | 235 bcf RCSTA1,CREN ; clear receiver status |
235 bsf RCSTA1,CREN | 236 bsf RCSTA1,CREN |
236 return ; and return anyway | 237 return ; and return anyway |
237 | 238 |
238 ;============================================================================= | 239 ;============================================================================= |
239 | 240 |
240 global do_logoffset_common_write | 241 global do_logoffset_common_write |
241 do_logoffset_common_write: | 242 do_logoffset_common_write: |
242 ; TODO: limit [lo:hi] to 9999 ? may arrive here as >= 10000 because of +10 increment option | 243 movlw 0x26 |
243 ; SIMPLER WAY: return without writing to eeprom if hi == 0x27 -> 0x2700 = 9984, this is within | 244 cpfslt hi ; is offset < 0x26?? (decimal 9983 at max, hence save for another +10) ? |
244 ; the save range for a +10 increment, shall do it... | 245 return ; NO - abort |
245 ; mH | 246 movff lo,EEDATA ; YES - proceed writing offset to EEPROM |
246 | |
247 movff lo,EEDATA | |
248 write_int_eeprom 0x0D | 247 write_int_eeprom 0x0D |
249 movff hi,EEDATA | 248 movff hi,EEDATA |
250 write_int_eeprom 0x0E | 249 write_int_eeprom 0x0E |
251 return | 250 return |
252 | 251 |
254 do_logoffset_common_read: | 253 do_logoffset_common_read: |
255 clrf EEADRH | 254 clrf EEADRH |
256 read_int_eeprom 0x0D | 255 read_int_eeprom 0x0D |
257 movff EEDATA,lo | 256 movff EEDATA,lo |
258 read_int_eeprom 0x0E | 257 read_int_eeprom 0x0E |
259 movff EEDATA,hi ; Existing logbook offset into lo:hi | 258 movff EEDATA,hi ; existing logbook offset into lo:hi |
260 return | 259 return |
261 | 260 |
262 | 261 |
263 global update_battery_registers | 262 global update_battery_registers |
264 update_battery_registers: | 263 update_battery_registers: |
333 lfsr FSR1,0x700 ; pres_tissue_N2+0, 32*4Byte Float = 128Bytes | 332 lfsr FSR1,0x700 ; pres_tissue_N2+0, 32*4Byte Float = 128Bytes |
334 vault_decodata_into_eeprom2: | 333 vault_decodata_into_eeprom2: |
335 movff POSTINC1,EEDATA | 334 movff POSTINC1,EEDATA |
336 call write_eeprom ; EEDATA into EEPROM@EEADR | 335 call write_eeprom ; EEDATA into EEPROM@EEADR |
337 incf EEADR,F | 336 incf EEADR,F |
338 decfsz lo,F ; All done? | 337 decfsz lo,F ; all done? |
339 bra vault_decodata_into_eeprom2 ; No | 338 bra vault_decodata_into_eeprom2 ; NO |
340 clrf EEADRH | 339 clrf EEADRH |
341 return | 340 return |
342 | 341 |
343 global restore_decodata_from_eeprom | 342 global restore_decodata_from_eeprom |
344 restore_decodata_from_eeprom: | 343 restore_decodata_from_eeprom: |
384 ; Tissue data from 16 to 144 | 383 ; Tissue data from 16 to 144 |
385 movlw .16 | 384 movlw .16 |
386 movwf EEADR | 385 movwf EEADR |
387 movlw .128 | 386 movlw .128 |
388 movwf lo | 387 movwf lo |
389 lfsr FSR1,0x700 ; pres_tissue_N2+0, 32*4Byte Float = 128Bytes | 388 lfsr FSR1,0x700 ; pres_tissue_N2+0, 32*4Byte Float = 128 Bytes |
390 restore_decodata_from_eeprom2: | 389 restore_decodata_from_eeprom2: |
391 call read_eeprom ; EEPROM@EEADR into EEDATA | 390 call read_eeprom ; EEPROM@EEADR into EEDATA |
392 movff EEDATA,POSTINC1 | 391 movff EEDATA,POSTINC1 |
393 incf EEADR,F | 392 incf EEADR,F |
394 decfsz lo,F ; All done? | 393 decfsz lo,F ; all done? |
395 bra restore_decodata_from_eeprom2 ; No | 394 bra restore_decodata_from_eeprom2 ; NO |
396 clrf EEADRH | 395 clrf EEADRH |
397 return | 396 return |
398 | 397 |
399 | 398 |
400 global reset_battery_internal_only | 399 global reset_battery_internal_only |
401 reset_battery_internal_only: | 400 reset_battery_internal_only: |
402 clrf EEADRH | 401 clrf EEADRH |
403 clrf EEDATA ; Delete to zero | 402 clrf EEDATA ; delete to zero |
404 write_int_eeprom 0x07 | 403 write_int_eeprom 0x07 |
405 write_int_eeprom 0x08 | 404 write_int_eeprom 0x08 |
406 write_int_eeprom 0x09 | 405 write_int_eeprom 0x09 |
407 write_int_eeprom 0x0A | 406 write_int_eeprom 0x0A |
408 write_int_eeprom 0x0B | 407 write_int_eeprom 0x0B |
420 return | 419 return |
421 | 420 |
422 | 421 |
423 global eeprom_reset_logbook_pointers | 422 global eeprom_reset_logbook_pointers |
424 eeprom_reset_logbook_pointers: | 423 eeprom_reset_logbook_pointers: |
425 clrf EEADRH ; Make sure to select EEPROM bank 0 | 424 clrf EEADRH ; make sure to select EEPROM bank 0 |
426 clrf EEDATA | 425 clrf EEDATA |
427 write_int_eeprom .4 | 426 write_int_eeprom .4 |
428 write_int_eeprom .5 | 427 write_int_eeprom .5 |
429 write_int_eeprom .6 | 428 write_int_eeprom .6 |
430 write_int_eeprom .2 ; Also, delete total dive counter | 429 write_int_eeprom .2 ; also delete total dive counter |
431 write_int_eeprom .3 | 430 write_int_eeprom .3 |
432 write_int_eeprom .16 | 431 write_int_eeprom .16 |
433 write_int_eeprom .17 ; And the backup counter, too | 432 write_int_eeprom .17 ; ...and the backup counter, too |
434 return | 433 return |
435 | 434 |
436 END | 435 END |