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comparison src/hwos.asm @ 383:c64ffeeb86e5

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language updates
author heinrichsweikamp
date Wed, 30 Sep 2015 15:38:28 +0200
parents cf929551d31c
children aadfe9f2edaf
comparison
equal deleted inserted replaced
382:6f3530eb48f9 383:c64ffeeb86e5
113 movwf PORTJ 113 movwf PORTJ
114 114
115 115
116 ; Timer 0 116 ; Timer 0
117 movlw b'00000001' ; Timer0 with 1:4 prescaler 117 movlw b'00000001' ; Timer0 with 1:4 prescaler
118 ; movlw b'00001000' ; Timer0 with 1:1 prescaler
119 movwf T0CON 118 movwf T0CON
120 119
121 ; Timer 1 - Button hold-down timer 120 ; Timer 1 - Button hold-down timer
122 movlw b'10001100' ; 32768Hz clock source, 1:1 Prescaler -> ; 30,51757813µs/bit in TMR1L:TMR1H 121 movlw b'10001100' ; 32768Hz clock source, 1:1 Prescaler -> ; 30,51757813µs/bit in TMR1L:TMR1H
123 movwf T1CON 122 movwf T1CON
157 156
158 157
159 ;init serial port1 (TRISC6/7) 158 ;init serial port1 (TRISC6/7)
160 movlw b'00001000' ; BRG16=1 159 movlw b'00001000' ; BRG16=1
161 movwf BAUDCON1 160 movwf BAUDCON1
162 ; movlw b'00100100' ; BRGH=1, SYNC=0
163 ; movwf TXSTA1
164 movlw .34 ; SPBRGH:SPBRG = .34 : 114285 BAUD @ 16MHz (+0,79% Error to 115200 BAUD) 161 movlw .34 ; SPBRGH:SPBRG = .34 : 114285 BAUD @ 16MHz (+0,79% Error to 115200 BAUD)
165 movwf SPBRG1 ; SPBRGH:SPBRG = .207 : 19230 BAUD @ 16MHz (-0,16% Error to 19200 BAUD) 162 movwf SPBRG1 ; SPBRGH:SPBRG = .207 : 19230 BAUD @ 16MHz (-0,16% Error to 19200 BAUD)
166 clrf SPBRGH1 ; 163 clrf SPBRGH1 ;
167 ; movlw b'10010000'
168 ; movwf RCSTA1
169 164
170 clrf RCSTA1 165 clrf RCSTA1
171 clrf TXSTA1 ; UART disable 166 clrf TXSTA1 ; UART disable
172 bcf PORTC,6 ; TX hard to GND 167 bcf PORTC,6 ; TX hard to GND
173 168
184 movwf RCSTA2 179 movwf RCSTA2
185 banksel common 180 banksel common
186 181
187 ; Timer3 for IR-RX Timeout 182 ; Timer3 for IR-RX Timeout
188 clrf T3GCON ; Reset Timer3 Gate Control register 183 clrf T3GCON ; Reset Timer3 Gate Control register
189 ; movlw b'10001101' ; 1:1 Prescaler -> 2seconds@32768Hz, not synced
190 movlw b'10001001' ; 1:1 Prescaler -> 2seconds@32768Hz, synced 184 movlw b'10001001' ; 1:1 Prescaler -> 2seconds@32768Hz, synced
191 ; 30,51757813µs/bit in TMR3L:TMR3H 185 ; 30,51757813µs/bit in TMR3L:TMR3H
192 movwf T3CON 186 movwf T3CON
193 187
194 ; SPI Module(s) 188 ; SPI Module(s)
223 movlw T2CON_NORMAL 217 movlw T2CON_NORMAL
224 movwf T2CON 218 movwf T2CON
225 219
226 ; Timer5 for ISR-independent wait routines 220 ; Timer5 for ISR-independent wait routines
227 clrf T5GCON ; Reset Timer5 Gate Control register 221 clrf T5GCON ; Reset Timer5 Gate Control register
228 ; movlw b'10001101' ; 1:1 Prescaler -> 2seconds@32768Hz, not synced
229 movlw b'10001001' ; 1:1 Prescaler -> 2seconds@32768Hz, synced 222 movlw b'10001001' ; 1:1 Prescaler -> 2seconds@32768Hz, synced
230 ; 30,51757813µs/bit in TMR5L:TMR5H 223 ; 30,51757813µs/bit in TMR5L:TMR5H
231 movwf T5CON 224 movwf T5CON
232 225
233 ; Timer7 for 62,5ms Interrupt (Sensor states) 226 ; Timer7 for 62,5ms Interrupt (Sensor states)
234 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM. 227 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM.
235 clrf T7GCON ; Reset Timer7 Gate Control register 228 clrf T7GCON ; Reset Timer7 Gate Control register
236 ; movlw b'10001101' ; 1:1 Prescaler -> 2seconds@32768Hz, not synced
237 movlw b'10001001' ; 1:1 Prescaler -> 2seconds@32768Hz, synced 229 movlw b'10001001' ; 1:1 Prescaler -> 2seconds@32768Hz, synced
238 movwf T7CON 230 movwf T7CON
239 clrf TMR7L 231 clrf TMR7L
240 movlw .248 232 movlw .248
241 movwf TMR7H ; -> Rollover after 2048 cycles -> 62,5ms 233 movwf TMR7H ; -> Rollover after 2048 cycles -> 62,5ms