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comparison src/rtc.asm @ 582:b455b31ce022

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work on 2.97 stable
author heinrichsweikamp
date Mon, 26 Feb 2018 16:40:28 +0100
parents b7eb98dbd800
children e1f0f5e3d4e4
comparison
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581:f5de1ff88814 582:b455b31ce022
1 ;============================================================================= 1 ;=============================================================================
2 ; 2 ;
3 ; File rtc.asm 3 ; File rtc.asm ## V2.98
4 ; 4 ;
5 ; 5 ;
6 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. 6 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
7 ;============================================================================= 7 ;=============================================================================
8 ; HISTORY 8 ; HISTORY
9 ; 2011-08-08 : [mH] moving from OSTC code 9 ; 2011-08-08 : [mH] moving from OSTC code
10 10
11 #include "hwos.inc" 11 #include "hwos.inc"
12 #include "math.inc" 12 #include "math.inc"
13 13
14 sensors CODE 14 sensors CODE
15
16 ;=============================================================================
15 17
16 global rtc_init 18 global rtc_init
17 rtc_init: 19 rtc_init:
18 movlw .1 20 movlw .1
19 movwf secs 21 movwf secs
20 movlw .59 22 movlw .59
21 movwf mins 23 movwf mins
22 movlw .12 24 movlw .12
23 movwf hours 25 movwf hours
24 movlw .2 26 movlw .1
25 movwf day 27 movwf day
26 movlw .12 28 movlw .3
27 movwf month 29 movwf month
28 movlw .17 30 movlw .18
29 movwf year 31 movwf year
30 ; rcall rtc_set_rtc ; writes mins,sec,hours,day,month and year to rtc module 32 ; rcall rtc_set_rtc ; writes mins,sec,hours,day,month and year to rtc module
31 ; return 33 ; return
32 34
33 global rtc_set_rtc 35 global rtc_set_rtc
34 rtc_set_rtc: 36 rtc_set_rtc:
35 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM. 37 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM
36 movlw 0x55 38 movlw 0x55
37 movwf EECON2 39 movwf EECON2
38 movlw 0xAA 40 movlw 0xAA
39 movwf EECON2 41 movwf EECON2
40 bsf RTCCFG,RTCWREN ; Unlock sequence for RTCWREN 42 bsf RTCCFG,RTCWREN ; Unlock sequence for RTCWREN
41 bsf RTCCFG,RTCPTR1 43 bsf RTCCFG,RTCPTR1
42 bsf RTCCFG,RTCPTR0 ; year 44 bsf RTCCFG,RTCPTR0 ; year
43 movff year,WREG 45 movff year,WREG
44 rcall rtc_dec2bcd ; IN: temp1 in WREG, OUT: WREG in BCD, also sets to bank16h! 46 rcall rtc_dec2bcd ; IN: WREG in decimal, OUT: WREG in BCD, also sets to bank16h!
45 movwf RTCVALL ; year 47 movwf RTCVALL ; year
46 movwf RTCVALH ; dummy write 48 movwf RTCVALH ; dummy write
47 movff day,WREG 49 movff day,WREG
48 rcall rtc_dec2bcd ; IN: temp1 in WREG, OUT: WREG in BCD, also sets to bank16h! 50 rcall rtc_dec2bcd ; IN: WREG in decimal, OUT: WREG in BCD, also sets to bank16h!
49 movwf RTCVALL ;day 51 movwf RTCVALL ; day
50 movff month,WREG 52 movff month,WREG
51 rcall rtc_dec2bcd ; IN: temp1 in WREG, OUT: WREG in BCD, also sets to bank16h! 53 rcall rtc_dec2bcd ; IN: WREG in decimal, OUT: WREG in BCD, also sets to bank16h!
52 movwf RTCVALH ;month 54 movwf RTCVALH ; month
53 movff hours,WREG 55 movff hours,WREG
54 rcall rtc_dec2bcd ; IN: temp1 in WREG, OUT: WREG in BCD, also sets to bank16h! 56 rcall rtc_dec2bcd ; IN: WREG in decimal, OUT: WREG in BCD, also sets to bank16h!
55 movwf RTCVALL ;hours 57 movwf RTCVALL ; hours
56 movlw d'0' 58 movlw d'0'
57 rcall rtc_dec2bcd ; IN: temp1 in WREG, OUT: WREG in BCD, also sets to bank16h! 59 rcall rtc_dec2bcd ; IN: WREG in decimal, OUT: WREG in BCD, also sets to bank16h!
58 movwf RTCVALH ;weekday 60 movwf RTCVALH ; weekday
59 movff secs,WREG 61 movff secs,WREG
60 rcall rtc_dec2bcd ; IN: temp1 in WREG, OUT: WREG in BCD, also sets to bank16h! 62 rcall rtc_dec2bcd ; IN: WREG in decimal, OUT: WREG in BCD, also sets to bank16h!
61 movwf RTCVALL ;secs 63 movwf RTCVALL ; secs
62 movff mins,WREG 64 movff mins,WREG
63 rcall rtc_dec2bcd ; IN: temp1 in WREG, OUT: WREG in BCD, also sets to bank16h! 65 rcall rtc_dec2bcd ; IN: WREG in decimal, OUT: WREG in BCD, also sets to bank16h!
64 movwf RTCVALH ;minutes 66 movwf RTCVALH ; minutes
65 movlw 0x55 67 movlw 0x55
66 movwf EECON2 68 movwf EECON2
67 movlw 0xAA 69 movlw 0xAA
68 movwf EECON2 70 movwf EECON2
69 bcf RTCCFG,RTCWREN ; Lock sequence for RTCWREN 71 bcf RTCCFG,RTCWREN ; Lock sequence for RTCWREN
70 banksel common 72 banksel common
71 return 73 return
72 74
73 rtc_dec2bcd: 75 rtc_dec2bcd:
74 banksel temp1 76 banksel lo
75 movwf temp1 ; Input in dec 77 movwf lo ; Input in decimal
76 setf temp2 ; 10s 78 setf hi ; 10s
77
78 rtc_dec2bcd2: 79 rtc_dec2bcd2:
79 incf temp2,F ; Count 10's 80 incf hi,F ; Count 10's
80 movlw d'10' 81 movlw d'10'
81 subwf temp1,F 82 subwf lo,F
82 btfss STATUS,N 83 btfss STATUS,N
83 bra rtc_dec2bcd2 84 bra rtc_dec2bcd2
84 movlw d'10' 85 movlw d'10'
85 addwf temp1,F ; 1s 86 addwf lo,F ; 1s
86 swapf temp2,W ; swap to bit 7-4 -> WREG 87 swapf hi,W ; swap to bit 7-4 -> WREG
87 addwf temp1,W ; Result in BCD 88 addwf lo,W ; Result in BCD
88 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM. 89 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM
89 return 90 return
90 91
91 END 92 END