comparison src/hwos.asm @ 656:8af5aefbcdaf default tip

Update to 3.31 beta
author heinrichsweikamp
date Thu, 27 Nov 2025 18:32:58 +0100
parents 75e90cd0c2c3
children
comparison
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655:c7b7b8a358cd 656:8af5aefbcdaf
16 16
17 #include "hwos.inc" 17 #include "hwos.inc"
18 #include "eeprom_rs232.inc" 18 #include "eeprom_rs232.inc"
19 19
20 ;----------------------------- PIC Configuration ----------------------------- 20 ;----------------------------- PIC Configuration -----------------------------
21 ; 21
22 CONFIG RETEN = OFF ; regulator power while in sleep mode controlled by SRETEN bit 22 CONFIG RETEN = OFF ; regulator power while in sleep mode controlled by SRETEN bit
23 CONFIG SOSCSEL = HIGH ; high power SOSC circuit selected 23 CONFIG SOSCSEL = HIGH ; high power SOSC circuit selected
24 CONFIG XINST = OFF ; extended instruction set disabled 24 CONFIG XINST = OFF ; extended instruction set disabled
25 CONFIG FOSC = INTIO2 ; internal RC oscillator, no clock-out 25 CONFIG FOSC = INTIO2 ; internal RC oscillator, no clock-out
26 CONFIG PLLCFG = OFF ; oscillator used directly 26 CONFIG PLLCFG = OFF ; oscillator used directly
44 44
45 ;---- Flags - Hardware Descriptors 45 ;---- Flags - Hardware Descriptors
46 HW_descriptor res 1 ; OSTC - model descriptor (cleared & rebuilt in restart) 46 HW_descriptor res 1 ; OSTC - model descriptor (cleared & rebuilt in restart)
47 HW_variants res 1 ; OSTC - model variants (NOT cleared in restart) 47 HW_variants res 1 ; OSTC - model variants (NOT cleared in restart)
48 HW_variants2 res 1 ; OSTC - more model variants (NOT cleared in restart) 48 HW_variants2 res 1 ; OSTC - more model variants (NOT cleared in restart)
49 HW_variants3 res 1 ; OSTC - more model variants (NOT cleared in restart)
49 50
50 ;---- Flags - Hardware States 51 ;---- Flags - Hardware States
51 HW_flags_state1 res 1 ; hardware - states 1 52 HW_flags_state1 res 1 ; hardware - states 1
52 HW_flags_state2 res 1 ; hardware - states 2 53 HW_flags_state2 res 1 ; hardware - states 2
53 HW_flags_state3 res 1 ; hardware - states 3 54 HW_flags_state3 res 1 ; hardware - states 3
103 battery_capacity res 2 ; for battery gauge IC 104 battery_capacity res 2 ; for battery gauge IC
104 battery_offset res 2 ; for battery gauge IC 105 battery_offset res 2 ; for battery gauge IC
105 battery_type res 1 ; =0:1.5V, =1:3.6V Saft, =2:LiIon 3.7V/0.8Ah, =3:LiIon 3.7V/3.1Ah, =4: LiIon 3.7V/2.3Ah 106 battery_type res 1 ; =0:1.5V, =1:3.6V Saft, =2:LiIon 3.7V/0.8Ah, =3:LiIon 3.7V/3.1Ah, =4: LiIon 3.7V/2.3Ah
106 battery_accumulated_charge res 2 ; raw values in battery gauge IC 107 battery_accumulated_charge res 2 ; raw values in battery gauge IC
107 battery_temperature res 2 ; battery temperature in 0.1 Kelvin 108 battery_temperature res 2 ; battery temperature in 0.1 Kelvin
108 gauge_status_byte res 1 ; gauge IC status byte 109
109 110
110 111
111 112
112 ; 44 byte user data 113 ; 44 byte user data
113 ; 32 byte tmp data placed by C compiler 114 ; 32 byte tmp data placed by C compiler
117 118
118 119
119 global HW_descriptor 120 global HW_descriptor
120 global HW_variants 121 global HW_variants
121 global HW_variants2 122 global HW_variants2
123 global HW_variants3
122 global HW_flags_state1 124 global HW_flags_state1
123 global HW_flags_state2 125 global HW_flags_state2
124 global HW_flags_state3 126 global HW_flags_state3
125 global OS_flags_persist 127 global OS_flags_persist
126 global OS_flags_ISR1 128 global OS_flags_ISR1
149 global battery_capacity 151 global battery_capacity
150 global battery_offset 152 global battery_offset
151 global battery_type 153 global battery_type
152 global battery_accumulated_charge 154 global battery_accumulated_charge
153 global battery_temperature 155 global battery_temperature
154 global gauge_status_byte 156
155 157
156 158
157 ;============================================================================= 159 ;=============================================================================
158 hwos1 CODE 160 hwos1 CODE
159 ;============================================================================= 161 ;=============================================================================
340 ; 342 ;
341 ; - will be initialized by enable_ir_s8 (eeprom_rs232.asm) in case IR/S8 shall be available 343 ; - will be initialized by enable_ir_s8 (eeprom_rs232.asm) in case IR/S8 shall be available
342 344
343 345
344 ; Timer 3 for IR-RX Timeout 346 ; Timer 3 for IR-RX Timeout
345 IFDEF _external_sensor 347 IFDEF _external_sensor_eccr
346 clrf T3GCON ; clear Timer3 gate control register 348 clrf T3GCON ; clear Timer3 gate control register
347 ; movlw b'10001101' ; old value 349 ; movlw b'10001101' ; old value
348 movlw b'10001011' ; bit 7-6: 10 = clock source SOSC/SCLKI (with bit 3 = 1) 350 movlw b'10001011' ; bit 7-6: 10 = clock source SOSC/SCLKI (with bit 3 = 1)
349 ; bit 5-4: 00 = 1:1 prescaler 351 ; bit 5-4: 00 = 1:1 prescaler
350 ; bit 3: 1 = clock source SOSC/SCLKI (with bit 7-6 = 10) 352 ; bit 3: 1 = clock source SOSC/SCLKI (with bit 7-6 = 10)
365 ; 4.00 MHz @ 16 MHz CPU clock (Normal) 367 ; 4.00 MHz @ 16 MHz CPU clock (Normal)
366 ; 16.00 MHz @ 64 MHz CPU clock (Fastest) 368 ; 16.00 MHz @ 64 MHz CPU clock (Fastest)
367 369
368 370
369 ; MSSP1 Module: I2C Master 371 ; MSSP1 Module: I2C Master
372 movlw b'00000000' ; enable slew rate control
373 movwf SSP1STAT ; ...
370 movlw b'00101000' ; set up I2C to master mode 374 movlw b'00101000' ; set up I2C to master mode
371 movwf SSP1CON1 ; ... 375 movwf SSP1CON1 ; ...
372 clrf SSP1CON2 ; ... 376 clrf SSP1CON2 ; ...
373 movlw i2c_speed_value 377 movlw i2c_speed_value
374 movwf SSP1ADD ; ... 378 movwf SSP1ADD ; ...
408 412
409 ; turn off unused Timers 413 ; turn off unused Timers
410 banksel 0xF16 ; addresses F16h...F5Fh are not part of the access RAM 414 banksel 0xF16 ; addresses F16h...F5Fh are not part of the access RAM
411 movlw b'11000000' ; disable ECCP3 and ECCP2 415 movlw b'11000000' ; disable ECCP3 and ECCP2
412 movwf PMD0 ; ... 416 movwf PMD0 ; ...
413 IFDEF _external_sensor 417 IFDEF _external_sensor_eccr
414 movlw b'11000001' ; disable PSP, CTMU and EMB 418 movlw b'11000001' ; disable PSP, CTMU and EMB
415 ELSE 419 ELSE
416 movlw b'11001001' ; disable PSP, CTMU, Timer 3 and EMB 420 movlw b'11001001' ; disable PSP, CTMU, Timer 3 and EMB
417 ENDIF 421 ENDIF
418 movwf PMD1 ; ... 422 movwf PMD1 ; ...
534 ;set start address in internal program FLASH 538 ;set start address in internal program FLASH
535 movlw 0x00 ; set 0x000000 539 movlw 0x00 ; set 0x000000
536 movwf TBLPTRL ; ... 540 movwf TBLPTRL ; ...
537 movwf TBLPTRH ; ... 541 movwf TBLPTRH ; ...
538 movwf TBLPTRU ; ... 542 movwf TBLPTRU ; ...
539 TBLRD*- ; dummy read to be in 128 byte block
540 543
541 movlw b'10010100' ; setup block erase 544 movlw b'10010100' ; setup block erase
542 rcall restore_write ; execute block erase 545 rcall restore_write ; execute block erase
546
547 TBLRD*- ; dummy read to be in 128 byte block
543 548
544 ; set start address in EEPROM 549 ; set start address in EEPROM
545 EEPROM_SET_ADDRESS eeprom_prog_page0_backup 550 EEPROM_SET_ADDRESS eeprom_prog_page0_backup
546 551
547 movlw .128 ; copy 1 block = 128 byte 552 movlw .128 ; copy 1 block = 128 byte