Mercurial > public > hwos_code
annotate src/isr.asm @ 531:e6d730e771e6
2.21 start
author | heinrichsweikamp |
---|---|
date | Fri, 18 Aug 2017 15:19:35 +0200 |
parents | 8dfb93e80338 |
children | b7eb98dbd800 |
rev | line source |
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0 | 1 ;============================================================================= |
2 ; | |
3 ; File isr.asm | |
4 ; | |
5 ; INTERUPT subroutines | |
6 ; | |
7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. | |
8 ;============================================================================= | |
9 ; HISTORY | |
10 ; 2011-05-24 : [jDG] Cleanups from initial Matthias code. | |
11 | |
275 | 12 #include "hwos.inc" |
0 | 13 #include "shared_definitions.h" ; Mailbox from/to p2_deco.c |
14 #include "ms5541.inc" | |
15 #include "adc_lightsensor.inc" | |
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16 #include "eeprom_rs232.inc" |
0 | 17 |
18 ;============================================================================= | |
19 | |
20 extern start | |
21 | |
22 isr_high CODE 0x0008 ;High Priority Interrups | |
23 bra HighInt | |
24 nop | |
25 nop | |
26 nop | |
27 nop | |
28 nop | |
29 nop | |
30 bra HighInt | |
31 | |
32 isr_low CODE 0x00018 ;Low Priority Interrups | |
33 ; *** low priority interrupts not used | |
34 retfie FAST ; Restores BSR, STATUS and WREG | |
35 | |
36 HighInt: | |
37 movff PRODL,isr_prod+0 | |
38 movff PRODH,isr_prod+1 | |
39 | |
40 ; Buttons | |
41 btfsc PIR1,TMR1IF ; Timer1 INT (Button hold-down Timer) | |
42 rcall timer1int | |
43 btfsc INTCON,INT0IF ; Buttons | |
44 rcall isr_switch_right | |
45 btfsc INTCON3,INT1IF ; Buttons | |
46 rcall isr_switch_left | |
47 | |
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48 ; IR/S8-Link |
113 | 49 btfsc PIR3,RC2IF ; UART2 |
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50 rcall isr_uart2 ; IR/S8-Link |
0 | 51 btfsc PIR2,TMR3IF ; Timer 3 |
52 rcall isr_timer3 ; IR-Link Timeout | |
113 | 53 |
54 ; Pressure sensor and others | |
55 btfsc PIR5,TMR7IF ; Timer 7 | |
56 rcall isr_tmr7 ; Every 62,5ms | |
57 | |
0 | 58 ; RTCC |
59 btfsc PIR3,RTCCIF ; Real-time-clock interrupt | |
60 rcall isr_rtcc ; May return in bank common! | |
61 | |
62 movff isr_prod+1,PRODH | |
63 movff isr_prod+0,PRODL | |
64 retfie FAST ; Restores BSR, STATUS and WREG | |
65 | |
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66 isr_set_speed_to_normal: |
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67 ; Set Speed to normal |
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68 movlw b'01110010' |
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69 movwf OSCCON ; 16MHz INTOSC |
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70 movlw b'00000000' |
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71 movwf OSCTUNE ; 4x PLL Disable (Bit6) - only works with 8 or 16MHz (=32 or 64MHz) |
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72 movlw b'00001101' ; 1:2 Postscaler, 1:4 Prescaler, Timer 2 start -> 1960Hz (no-flicker) |
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73 movwf T2CON |
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74 btfss OSCCON,HFIOFS |
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75 bra $-2 ; Wait until clock is stable |
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76 return |
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77 |
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78 isr_dimm_tft: ; Adjust until max_CCPR1L=CCPR1L ! |
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79 banksel common |
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80 btfsc tft_is_dimming ; Ignore while dimming |
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81 return |
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82 banksel isr_backup |
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83 movf max_CCPR1L,W |
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84 cpfsgt CCPR1L ; CCPR1L>max_CCPR1L? |
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85 bra isr_dimm_tft2 ; No, dimm up |
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86 ; dimm down |
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87 decf CCPR1L,F ; -1 |
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88 return |
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89 isr_dimm_tft2: |
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90 movf max_CCPR1L,W |
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91 sublw ambient_light_min_eco |
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92 cpfsgt CCPR1L ; CCPR1L>max_CCPR1L-ambient_light_min_eco? |
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93 bra isr_dimm_tft3 ; No, dimm up slow |
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94 ; dimm up faster |
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95 movlw .10 |
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96 addwf CCPR1L,F |
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97 isr_dimm_tft3: |
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98 incf CCPR1L,F ; +1 |
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99 return |
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100 nop |
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101 nop ; block flash here |
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102 |
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103 isr_restore CODE 0x00080 ; Restore first flash page from EEPROM |
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104 restore_flash_0x00080: |
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105 goto restore_flash |
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106 |
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107 |
0 | 108 ;============================================================================= |
109 | |
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110 isr_uart2: ; IR/S8-Link |
0 | 111 banksel RCREG2 |
112 movf RCREG2,W | |
113 bcf RCSTA2,CREN ; Clear receiver status | |
114 bsf RCSTA2,CREN | |
115 banksel isr_backup | |
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116 incf ir_s8_counter,F ; Increase counter |
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117 movff ir_s8_counter,isr1_temp ; Copy |
0 | 118 dcfsnz isr1_temp,F |
204 | 119 movwf ir_s8_buffer+.0 |
0 | 120 dcfsnz isr1_temp,F |
204 | 121 movwf ir_s8_buffer+.1 |
0 | 122 dcfsnz isr1_temp,F |
204 | 123 movwf ir_s8_buffer+.2 |
0 | 124 dcfsnz isr1_temp,F |
204 | 125 movwf ir_s8_buffer+.3 |
0 | 126 dcfsnz isr1_temp,F |
204 | 127 movwf ir_s8_buffer+.4 |
0 | 128 dcfsnz isr1_temp,F |
204 | 129 movwf ir_s8_buffer+.5 |
0 | 130 dcfsnz isr1_temp,F |
204 | 131 movwf ir_s8_buffer+.6 |
0 | 132 dcfsnz isr1_temp,F |
204 | 133 movwf ir_s8_buffer+.7 |
0 | 134 dcfsnz isr1_temp,F |
204 | 135 movwf ir_s8_buffer+.8 |
0 | 136 dcfsnz isr1_temp,F |
204 | 137 movwf ir_s8_buffer+.9 |
0 | 138 dcfsnz isr1_temp,F |
204 | 139 movwf ir_s8_buffer+.10 |
0 | 140 dcfsnz isr1_temp,F |
204 | 141 movwf ir_s8_buffer+.11 |
0 | 142 dcfsnz isr1_temp,F |
204 | 143 movwf ir_s8_buffer+.12 |
0 | 144 dcfsnz isr1_temp,F |
204 | 145 movwf ir_s8_buffer+.13 |
0 | 146 dcfsnz isr1_temp,F |
204 | 147 movwf ir_s8_buffer+.14 |
0 | 148 dcfsnz isr1_temp,F |
204 | 149 movwf ir_s8_buffer+.15 |
113 | 150 dcfsnz isr1_temp,F |
204 | 151 movwf ir_s8_buffer+.16 |
113 | 152 dcfsnz isr1_temp,F |
204 | 153 movwf ir_s8_buffer+.17 |
113 | 154 |
0 | 155 clrf TMR3L ; Preload timer |
156 movlw .253 | |
157 movwf TMR3H | |
158 bsf T3CON,TMR3ON ; (Re)Start Timeout counter | |
159 return | |
160 | |
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161 isr_timer3: ; IR/S8-Link Timeout |
0 | 162 bcf T3CON,TMR3ON ; Stop Timer3 |
163 banksel isr_backup ; Select Bank0 for ISR data. | |
164 movlw .15 | |
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165 cpfseq ir_s8_counter ; Got exact 15bytes? |
0 | 166 bra isr_timer3_1 ; No, test for 16bytes |
113 | 167 bra isr_timer3_ir ; Got 15 bytes, compute local checksum |
0 | 168 isr_timer3_1: |
169 movlw .16 | |
187
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170 cpfseq ir_s8_counter ; Got exact 16bytes? |
113 | 171 bra isr_timer3_2 ; No, test for 17bytes |
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172 tstfsz ir_s8_buffer+.15 ; Last byte=0x00 |
0 | 173 bra isr_timer3_exit ; No, exit |
113 | 174 bra isr_timer3_ir ; Got 16 bytes, compute local checksum |
175 isr_timer3_2: | |
176 movlw .17 | |
187
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177 cpfseq ir_s8_counter ; Got exact 17bytes? |
113 | 178 bra isr_timer3_exit ; No, exit |
179 bra isr_timer3_s8 ; S8 data | |
0 | 180 |
113 | 181 isr_timer3_ir: ; IR input |
187
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182 movff ir_s8_buffer+.0,PRODL |
0 | 183 clrf PRODH |
187
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184 movf ir_s8_buffer+.1,W |
0 | 185 rcall isr_timer3_checksum |
187
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186 movf ir_s8_buffer+.2,W |
0 | 187 rcall isr_timer3_checksum |
187
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188 movf ir_s8_buffer+.3,W |
0 | 189 rcall isr_timer3_checksum |
187
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190 movf ir_s8_buffer+.4,W |
0 | 191 rcall isr_timer3_checksum |
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192 movf ir_s8_buffer+.5,W |
0 | 193 rcall isr_timer3_checksum |
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194 movf ir_s8_buffer+.6,W |
0 | 195 rcall isr_timer3_checksum |
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196 movf ir_s8_buffer+.7,W |
0 | 197 rcall isr_timer3_checksum |
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198 movf ir_s8_buffer+.8,W |
0 | 199 rcall isr_timer3_checksum |
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200 movf ir_s8_buffer+.9,W |
0 | 201 rcall isr_timer3_checksum |
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202 movf ir_s8_buffer+.10,W |
0 | 203 rcall isr_timer3_checksum |
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204 movf ir_s8_buffer+.11,W |
0 | 205 rcall isr_timer3_checksum |
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206 movf ir_s8_buffer+.12,W |
0 | 207 rcall isr_timer3_checksum |
208 | |
209 ; Compare checksum | |
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210 movf ir_s8_buffer+.13,W |
0 | 211 cpfseq PRODL ; Checksum ok? |
212 bra isr_timer3_exit ; No, exit | |
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213 movf ir_s8_buffer+.14,W |
0 | 214 cpfseq PRODH ; Checksum ok? |
215 bra isr_timer3_exit ; No, exit | |
216 | |
217 ; Checksum OK, copy results | |
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218 movff ir_s8_buffer+.1,hud_status_byte |
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219 movff ir_s8_buffer+.2,o2_mv_sensor1+0 |
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220 movff ir_s8_buffer+.3,o2_mv_sensor1+1 |
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221 movff ir_s8_buffer+.4,o2_mv_sensor2+0 |
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222 movff ir_s8_buffer+.5,o2_mv_sensor2+1 |
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223 movff ir_s8_buffer+.6,o2_mv_sensor3+0 |
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224 movff ir_s8_buffer+.7,o2_mv_sensor3+1 |
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225 movff ir_s8_buffer+.8,o2_ppo2_sensor1 |
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226 movff ir_s8_buffer+.9,o2_ppo2_sensor2 |
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227 movff ir_s8_buffer+.10,o2_ppo2_sensor3 |
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228 movff ir_s8_buffer+.11,hud_battery_mv+0 |
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229 movff ir_s8_buffer+.12,hud_battery_mv+1 |
0 | 230 |
231 movlw ir_timeout_value ; multiples of 62,5ms | |
187
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232 movwf ir_S8_timeout ; Reload timeout |
227
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233 |
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234 banksel hud_status_byte |
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235 bsf hud_connection_ok ; Set manually for hwHUD w/o the HUD module... |
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236 banksel isr_backup ; Select Bank0 for ISR data. |
0 | 237 |
238 isr_timer3_exit: | |
187
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239 clrf ir_s8_counter ; Clear pointer |
0 | 240 bcf PIR2,TMR3IF ; Clear flag |
241 return | |
242 | |
243 isr_timer3_checksum: | |
244 addwf PRODL,F | |
245 movlw .0 | |
246 addwfc PRODH,F | |
247 return | |
248 | |
187
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249 isr_timer3_s8: ; S8 input |
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250 movff ir_s8_buffer+.0,PRODL |
113 | 251 clrf PRODH |
187
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252 movf ir_s8_buffer+.1,W |
113 | 253 rcall isr_timer3_checksum |
187
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254 movf ir_s8_buffer+.2,W |
113 | 255 rcall isr_timer3_checksum |
187
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256 movf ir_s8_buffer+.3,W |
113 | 257 rcall isr_timer3_checksum |
187
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258 movf ir_s8_buffer+.4,W |
113 | 259 rcall isr_timer3_checksum |
187
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260 movf ir_s8_buffer+.5,W |
113 | 261 rcall isr_timer3_checksum |
187
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262 movf ir_s8_buffer+.6,W |
113 | 263 rcall isr_timer3_checksum |
187
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264 movf ir_s8_buffer+.7,W |
113 | 265 rcall isr_timer3_checksum |
187
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266 movf ir_s8_buffer+.8,W |
113 | 267 rcall isr_timer3_checksum |
187
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268 movf ir_s8_buffer+.9,W |
113 | 269 rcall isr_timer3_checksum |
187
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270 movf ir_s8_buffer+.10,W |
113 | 271 rcall isr_timer3_checksum |
187
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272 movf ir_s8_buffer+.11,W |
113 | 273 rcall isr_timer3_checksum |
187
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274 movf ir_s8_buffer+.12,W |
113 | 275 rcall isr_timer3_checksum |
187
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276 movf ir_s8_buffer+.13,W |
113 | 277 rcall isr_timer3_checksum |
187
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278 movf ir_s8_buffer+.14,W |
113 | 279 rcall isr_timer3_checksum |
280 | |
281 ; Compare checksum | |
187
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282 movf ir_s8_buffer+.15,W |
113 | 283 cpfseq PRODL ; Checksum ok? |
284 bra isr_timer3_exit ; No, exit | |
187
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285 movf ir_s8_buffer+.16,W |
113 | 286 cpfseq PRODH ; Checksum ok? |
287 bra isr_timer3_exit ; No, exit | |
288 | |
289 ; Checksum OK, copy results | |
187
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290 movff ir_s8_buffer+.3,hud_status_byte |
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291 movff ir_s8_buffer+.13,hud_battery_mv+0 |
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292 movff ir_s8_buffer+.14,hud_battery_mv+1 |
113 | 293 |
294 banksel common | |
271 | 295 btfsc new_s8_data_available ; =1: Old data already processed? |
268
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296 bra isr_timer3_skip ; No, skip copying new results |
113 | 297 |
268
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298 movff ir_s8_buffer+.6,s8_rawdata_sensor1+2 |
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299 movff ir_s8_buffer+.5,s8_rawdata_sensor1+1 |
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300 movff ir_s8_buffer+.4,s8_rawdata_sensor1+0 |
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301 movff ir_s8_buffer+.9,s8_rawdata_sensor2+2 |
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302 movff ir_s8_buffer+.8,s8_rawdata_sensor2+1 |
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303 movff ir_s8_buffer+.7,s8_rawdata_sensor2+0 |
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304 movff ir_s8_buffer+.12,s8_rawdata_sensor3+2 |
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305 movff ir_s8_buffer+.11,s8_rawdata_sensor3+1 |
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306 movff ir_s8_buffer+.10,s8_rawdata_sensor3+0 |
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307 banksel common |
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308 bsf new_s8_data_available ; set flag |
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309 |
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310 isr_timer3_skip: |
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311 banksel ir_S8_timeout |
113 | 312 movlw ir_timeout_value ; multiples of 62,5ms |
268
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313 movwf ir_S8_timeout ; Reload timeout |
113 | 314 bra isr_timer3_exit ; Exit |
315 | |
316 | |
0 | 317 ;============================================================================= |
318 | |
490
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319 isr_tmr7: ; each 62,5ms |
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320 bcf PIR5,TMR7IF ; clear flag |
469 | 321 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM. |
322 movlw .248 | |
0 | 323 movwf TMR7H ; -> Rollover after 2048 cycles -> 62,5ms |
324 | |
490
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325 banksel common |
448 | 326 call get_analog_switches ; Get analog readings |
327 btfss INTCON3,INT1IE | |
328 bra isr_tmr7_a | |
329 btfsc analog_sw2_pressed | |
330 rcall isr_switch_left | |
331 isr_tmr7_a: | |
332 banksel common | |
333 btfss INTCON,INT0IE | |
334 bra isr_tmr7_b | |
335 btfsc analog_sw1_pressed | |
336 rcall isr_switch_right | |
337 isr_tmr7_b: | |
490
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338 banksel common |
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339 btfss no_sensor_int ; No sensor interrupt (because it's addressed during sleep) |
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340 bra isr_tmr7_c ; No, continue |
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341 banksel isr_backup ; Back to Bank0 ISR data |
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342 return |
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343 isr_tmr7_c: |
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344 banksel isr_backup |
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345 movf max_CCPR1L,W ; Dimm value |
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346 cpfseq CCPR1L ; = current PWM value? |
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347 rcall isr_dimm_tft ; No, adjust until max_CCPR1L=CCPR1L ! |
448 | 348 |
0 | 349 banksel isr_backup |
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350 decfsz ir_S8_timeout,F ; IR Data still valid? |
0 | 351 bra isr_tmr7_2 ; Yes, continue |
352 ; timeout, clear IR-Data | |
353 | |
354 movlw ir_timeout_value ; multiples of 62,5ms | |
187
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355 movwf ir_S8_timeout ; Reload timeout |
0 | 356 |
357 banksel common | |
236 | 358 btfss analog_o2_input |
113 | 359 bra isr_tmr7_1a ; Always with normal ostc3 hardware |
360 btfss s8_digital | |
361 bra isr_tmr7_2 ; only when digital | |
362 isr_tmr7_1a: | |
0 | 363 clrf o2_mv_sensor1+0 |
364 clrf o2_mv_sensor1+1 | |
365 clrf o2_mv_sensor2+0 | |
366 clrf o2_mv_sensor2+1 | |
367 clrf o2_mv_sensor3+0 | |
368 clrf o2_mv_sensor3+1 | |
378 | 369 banksel hud_battery_mv |
0 | 370 clrf hud_battery_mv+0 |
371 clrf hud_battery_mv+1 | |
378 | 372 banksel hud_status_byte |
0 | 373 clrf hud_status_byte |
374 clrf o2_ppo2_sensor1 | |
375 clrf o2_ppo2_sensor2 | |
376 clrf o2_ppo2_sensor3 | |
377 | |
378 isr_tmr7_2: | |
379 banksel common | |
380 btfss no_sensor_int ; No sensor interrupt (because it's addressed during sleep) | |
381 bra isr_sensor_state2 ; No, continue | |
382 banksel isr_backup ; Back to Bank0 ISR data | |
383 return | |
384 | |
385 isr_sensor_state2: | |
386 banksel common | |
387 movff sensor_state_counter,WREG | |
388 btfss WREG,0 ; every 1/4 second | |
389 bsf quarter_second_update ; Set flag | |
319 | 390 banksel isr_backup ; Back to Bank0 ISR data |
0 | 391 movlw d'2' |
392 cpfseq speed_setting ; Set to normal in case it's not already in normal speed mode | |
393 rcall isr_set_speed_to_normal | |
319 | 394 |
0 | 395 incf sensor_state_counter,F ; counts to eight for state maschine |
396 | |
397 ; State 1: Clear flags and average registers, get temperature (51us) and start pressure integration (73,5us) | |
398 ; State 2: Get pressure (51us), start temperature integration (73,5us) and calculate temperature compensated pressure (233us) | |
399 ; State 3: Get temperature (51us) and start pressure integration (73,5us) | |
400 ; State 4: Get pressure (51us), start temperature integration (73,5us) and calculate temperature compensated pressure (233us) | |
401 ; State 5: Get temperature (51us) and start pressure integration (73,5us) | |
402 ; State 6: Get pressure (51us), start temperature integration (73,5us) and calculate temperature compensated pressure (233us) | |
403 ; State 7: Get temperature (51us) and start pressure integration (73,5us) | |
404 ; State 8: Get pressure (51us), start temperature integration (73,5us), calculate temperature compensated pressure (233us) and build average for half-second update of tempperature and pressure | |
405 | |
406 movff sensor_state_counter,WREG ; WREG used as temp here... | |
407 dcfsnz WREG,F | |
408 bra sensor_int_state1_plus_restart ; Do State 1 | |
409 dcfsnz WREG,F | |
410 bra sensor_int_state2 ; Do State 2 | |
411 dcfsnz WREG,F | |
412 bra sensor_int_state1 ; Do State 3 | |
413 dcfsnz WREG,F | |
414 bra sensor_int_state2 ; Do State 4 | |
415 dcfsnz WREG,F | |
416 bra sensor_int_state1 ; Do State 5 | |
417 dcfsnz WREG,F | |
418 bra sensor_int_state2 ; Do State 6 | |
419 dcfsnz WREG,F | |
420 bra sensor_int_state1 ; Do State 7 | |
421 ; bra sensor_int2_plus_average ; Do State 8 | |
422 ;sensor_int2_plus_average: | |
423 ; First, do state2: | |
424 call get_pressure_value ; State2: Get pressure (51us) | |
425 call get_temperature_start ; and start temperature integration (73,5us) | |
426 call calculate_compensation ; calculate temperature compensated pressure (27us) | |
427 ; Build average | |
428 bcf STATUS,C ; clear carry bit. | |
429 rrcf amb_pressure_avg+1 ; amb_pressure sum / 2 | |
430 rrcf amb_pressure_avg+0 | |
431 bcf STATUS,C ; clear carry bit, twice. | |
432 rrcf amb_pressure_avg+1 ; amb_pressure sum / 4 | |
433 rrcf amb_pressure_avg+0 | |
434 | |
435 movff amb_pressure_avg+1,amb_pressure+1 ; copy into actual register | |
436 movff amb_pressure_avg+0,amb_pressure+0 | |
437 | |
438 bcf STATUS,C | |
439 btfsc temperature_avg+1,7 ; Copy sign bit to carry | |
440 bsf STATUS,C | |
441 rrcf temperature_avg+1 ; Signed temperature /2 | |
442 rrcf temperature_avg+0 | |
443 bcf STATUS,C | |
444 btfsc temperature_avg+1,7 ; Copy sign bit to carry | |
445 bsf STATUS,C | |
446 rrcf temperature_avg+1 ; Signed temperature /4 | |
447 rrcf temperature_avg+0 | |
448 | |
449 movff temperature_avg+1,temperature+1 ; copy into actual register | |
450 movff temperature_avg+0,temperature+0 | |
451 | |
452 banksel common ; flag1 is in Bank1 | |
453 bcf temp_changed ; Clear flag for temperature update | |
454 bcf pressure_refresh ; Clear flag for pressure update | |
455 banksel isr_backup ; Back to Bank0 ISR data | |
456 | |
457 ; Temp changed? | |
458 movf temperature+0,W | |
459 cpfseq last_temperature+0 | |
460 bra isr_sensor_state2_2 ; Yes | |
461 movf temperature+1,W | |
462 cpfseq last_temperature+1 | |
463 bra isr_sensor_state2_2 ; Yes | |
464 | |
465 bra isr_sensor_state2_3 ; no change | |
466 | |
467 isr_sensor_state2_2: | |
468 banksel common ; flag1 is in Bank1 | |
469 bsf temp_changed ; Yes | |
470 banksel isr_backup ; Back to Bank0 ISR data | |
471 isr_sensor_state2_3: | |
472 movff temperature+0,last_temperature+0 ; Copy for compare | |
473 movff temperature+1,last_temperature+1 | |
474 | |
475 movf amb_pressure+0,W | |
476 cpfseq last_pressure+0 | |
477 bra isr_sensor_state2_4 ; Yes | |
478 movf amb_pressure+1,W | |
479 cpfseq last_pressure+1 | |
480 bra isr_sensor_state2_4 ; Yes | |
481 | |
482 bra isr_sensor_state2_5 ; No change | |
483 isr_sensor_state2_4: | |
484 banksel common ; flag1 is in Bank1 | |
485 bsf pressure_refresh ; Yes | |
486 banksel isr_backup ; Back to Bank0 ISR data | |
487 isr_sensor_state2_5: | |
488 movff amb_pressure+0,last_pressure+0 ; Copy for compare | |
489 movff amb_pressure+1,last_pressure+1 | |
490 | |
491 clrf sensor_state_counter ; Then reset State counter | |
176 | 492 banksel common ; flag2 is in Bank1 |
0 | 493 btfss simulatormode_active ; are we in simulator mode? |
494 bra comp_air_pressure ; no | |
176 | 495 ; Always set pressure_refresh flag in simulator mode |
496 bsf pressure_refresh ; Yes | |
497 banksel isr_backup ; Back to Bank0 ISR data | |
0 | 498 movlw LOW d'1000' ; yes, so simulate 1000mbar surface pressure |
499 movwf last_surfpressure+0 | |
500 movlw HIGH d'1000' | |
501 movwf last_surfpressure+1 | |
502 | |
503 comp_air_pressure: | |
176 | 504 banksel isr_backup ; Back to Bank0 ISR data |
0 | 505 movf last_surfpressure+0,W ; compensate airpressure |
506 subwf amb_pressure+0,W | |
507 movwf rel_pressure+0 ; rel_pressure stores depth! | |
508 | |
509 movf last_surfpressure+1,W | |
510 subwfb amb_pressure+1,W | |
511 movwf rel_pressure+1 | |
512 btfss STATUS,N ; result is below zero? | |
513 bra sensor_int_state_exit | |
514 clrf rel_pressure+0 ; Yes, do not display negative depths | |
515 clrf rel_pressure+1 ; e.g. when surface air pressure dropped during the dive | |
516 bra sensor_int_state_exit | |
517 | |
518 sensor_int_state1_plus_restart: | |
519 clrf amb_pressure_avg+0 ; pressure average registers | |
520 clrf amb_pressure_avg+1 | |
521 clrf temperature_avg+0 | |
522 clrf temperature_avg+1 | |
523 | |
524 sensor_int_state1: | |
525 call get_temperature_value ; State 1: Get temperature | |
526 call get_pressure_start ; and start pressure integration. | |
527 bra sensor_int_state_exit | |
528 | |
529 sensor_int_state2: | |
530 call get_pressure_value ; State2: Get pressure (51us) | |
531 call get_temperature_start ; and start temperature integration (73,5us) | |
532 call calculate_compensation ; calculate temperature compensated pressure (233us) | |
533 ; bra sensor_int_state_exit | |
534 sensor_int_state_exit: | |
535 rcall isr_restore_clock ; Restore clock | |
536 return | |
537 ;============================================================================= | |
538 | |
539 | |
540 | |
541 isr_rtcc: ; each second | |
542 bcf PIR3,RTCCIF ; clear flag | |
543 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM. | |
544 bsf RTCCFG,RTCPTR1 | |
545 bsf RTCCFG,RTCPTR0 ; year | |
546 movff RTCVALL,year ; format is BCD! | |
547 movff RTCVALH,day ; dummy read | |
548 movff RTCVALL,day ; format is BCD! | |
549 movff RTCVALH,month ; format is BCD! | |
550 movff RTCVALL,hours ; format is BCD! | |
551 movff RTCVALH,secs ; format is BCD! | |
552 movff RTCVALL,secs ; format is BCD! | |
553 movff RTCVALH,mins ; format is BCD! | |
554 banksel isr_backup ; Back to Bank0 ISR data | |
555 | |
556 ; Convert BCD to DEC and set registers | |
557 movff mins, isr1_temp | |
558 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
559 movff WREG,mins | |
560 movff secs, isr1_temp | |
561 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
562 movff WREG,secs | |
563 movff hours, isr1_temp | |
564 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
565 movff WREG,hours | |
566 movff month, isr1_temp | |
567 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
568 movff WREG,month | |
569 movff day, isr1_temp | |
570 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
571 movff WREG,day | |
572 movff year, isr1_temp | |
573 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
574 movff WREG,year | |
575 | |
576 ; Place once/second tasks for ISR here (Be sure of the right bank!) | |
577 banksel common ; flag1 is in Bank1 | |
578 btfss sleepmode ; in Sleepmode? | |
579 call get_ambient_level ; No, get ambient light level and set max_CCPR1L | |
580 | |
581 rcall isr_battery_gauge ; Add amount of battery consumption to battery_gauge:6 | |
582 | |
453
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parents:
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diff
changeset
|
583 ; update uptime |
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diff
changeset
|
584 banksel uptime+0 |
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diff
changeset
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585 incf uptime+0,F |
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heinrichsweikamp
parents:
451
diff
changeset
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586 movlw .0 |
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diff
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587 addwfc uptime+1,F |
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NEW: Show Uptime (Time since last firmware boot) in information menu
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diff
changeset
|
588 addwfc uptime+2,F |
b4f28ab23b87
NEW: Show Uptime (Time since last firmware boot) in information menu
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diff
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589 addwfc uptime+3,F |
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NEW: Show Uptime (Time since last firmware boot) in information menu
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diff
changeset
|
590 |
0 | 591 banksel common ; flag1 is in Bank1 |
453
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NEW: Show Uptime (Time since last firmware boot) in information menu
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parents:
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diff
changeset
|
592 bsf onesecupdate ; A new second has begun |
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diff
changeset
|
593 btfsc divemode ; in divemode? |
0 | 594 rcall isr_divemode_1sec ; Yes, do some divemode stuff in bank common |
595 | |
453
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NEW: Show Uptime (Time since last firmware boot) in information menu
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parents:
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diff
changeset
|
596 btfss divemode ; in divemode? |
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NEW: Show Uptime (Time since last firmware boot) in information menu
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diff
changeset
|
597 rcall isr_update_lastdive_time ; No, update the lastdive timer |
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diff
changeset
|
598 |
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599 tstfsz secs ; Secs == 0 ? |
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changeset
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600 return ; No, Done. |
0 | 601 |
602 bsf oneminupdate ; A new minute has begun | |
603 | |
604 btfss divemode ; In Divemode? | |
605 rcall check_nofly_desat_time ; No, so reduce NoFly and Desat and increase interval | |
606 | |
607 ; Check if a new hour has just begun | |
608 tstfsz mins ; mins=0? | |
609 bra isr_rtcc2 ; No | |
610 bsf onehourupdate ; Yes, set flag | |
611 | |
612 isr_rtcc2: | |
613 banksel isr_backup ; Back to Bank0 ISR data | |
614 return ; Done. | |
615 | |
453
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changeset
|
616 isr_update_lastdive_time: |
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diff
changeset
|
617 ; update uptime |
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changeset
|
618 banksel lastdive_time+0 |
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diff
changeset
|
619 incf lastdive_time+0,F |
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diff
changeset
|
620 movlw .0 |
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diff
changeset
|
621 addwfc lastdive_time+1,F |
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diff
changeset
|
622 addwfc lastdive_time+2,F |
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NEW: Show Uptime (Time since last firmware boot) in information menu
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|
623 addwfc lastdive_time+3,F |
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NEW: Show Uptime (Time since last firmware boot) in information menu
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|
624 banksel common |
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changeset
|
625 return |
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626 |
0 | 627 isr_battery_gauge: |
628 banksel isr_backup ; Bank0 ISR data | |
629 movlw current_sleepmode ; 100µA/3600 -> nAs (Sleepmode current) | |
630 movwf isr1_temp ; Store value (low byte) | |
631 clrf isr2_temp ; High byte | |
632 | |
633 banksel common ; flag1 is in Bank1 | |
634 btfss sleepmode ; in Sleepmode? | |
635 rcall isr_battery_gauge2 ; No, compute current consumtion value into isr1_temp and isr2_temp | |
636 | |
637 banksel isr_backup ; Bank0 ISR data | |
638 movf isr1_temp,W ; 48Bit add of isr1_temp and isr2_temp into battery_gauge:6 | |
639 addwf battery_gauge+0,F | |
640 movf isr2_temp,W | |
641 addwfc battery_gauge+1,F | |
642 movlw .0 | |
643 addwfc battery_gauge+2,F | |
644 addwfc battery_gauge+3,F | |
645 addwfc battery_gauge+4,F | |
646 addwfc battery_gauge+5,F | |
647 return | |
648 | |
649 isr_battery_gauge2: | |
650 ; set consumtion rate in nAs for an one second interval | |
651 ; Example: | |
652 ; movlw LOW .55556 ; 0,2A/3600*1e9s = nAs | |
653 ; movwf isr1_temp ; Low byte | |
654 ; movlw HIGH .55556 ; 0,2A/3600*1e9s = nAs | |
655 ; movwf isr2_temp ; High byte | |
656 | |
657 ; Current consumption for LED backlight is 47*CCPR1L+272 | |
658 movf CCPR1L,W | |
659 mullw current_backlight_multi | |
660 movlw LOW current_backlight_offset | |
661 addwf PRODL,F | |
662 movlw HIGH current_backlight_offset | |
663 addwfc PRODH,F | |
664 movff PRODL,isr1_temp | |
665 movff PRODH,isr2_temp ; isr1_temp and isr2_temp hold value for backlight | |
666 | |
667 ; Add current for CPU and GPU | |
668 ; speed_setting=1: ECO (3,1mA -> 861nAs), =2: NORMAL (5,50mA -> 1528nAs) or =3: FASTEST (8,04mA -> 2233nAs) | |
319 | 669 banksel isr_backup ; Bank0 ISR data |
0 | 670 movlw .1 |
671 cpfseq speed_setting | |
672 bra isr_battery_gauge3 | |
673 movlw LOW current_speed_eco | |
674 addwf isr1_temp,F | |
675 movlw HIGH current_speed_eco | |
676 addwfc isr2_temp,F | |
677 bra isr_battery_gauge5 | |
678 isr_battery_gauge3: | |
679 movlw .2 | |
680 cpfseq speed_setting | |
681 bra isr_battery_gauge4 | |
682 movlw LOW current_speed_normal | |
683 addwf isr1_temp,F | |
684 movlw HIGH current_speed_normal | |
685 addwfc isr2_temp,F | |
686 bra isr_battery_gauge5 | |
687 isr_battery_gauge4: | |
688 movlw LOW current_speed_fastest | |
689 addwf isr1_temp,F | |
690 movlw HIGH current_speed_fastest | |
691 addwfc isr2_temp,F | |
692 isr_battery_gauge5: | |
693 ; Add current if IR reciever is on | |
694 btfss ir_power ; IR enabled? | |
695 bra isr_battery_gauge6 ; no | |
696 movlw LOW current_ir_reciever | |
697 addwf isr1_temp,F | |
698 movlw HIGH current_ir_reciever | |
699 addwfc isr2_temp,F | |
700 isr_battery_gauge6: | |
701 ; Add current for compass/accelerometer | |
702 btfss compass_enabled ; compass active? | |
703 bra isr_battery_gauge7 ; no | |
704 movlw LOW current_compass | |
705 addwf isr1_temp,F | |
706 movlw HIGH current_compass | |
707 addwfc isr2_temp,F | |
708 isr_battery_gauge7: | |
709 return | |
710 | |
711 isr_divemode_1sec: | |
712 incf samplesecs,F ; "samplingrate" diving seconds done | |
713 decf samplesecs_value,W ; holds "samplingrate" value (minus 1 into WREG) | |
714 cpfsgt samplesecs ; Done? | |
715 bra isr_divemode_1sec2 ; no | |
716 | |
717 clrf samplesecs ; clear counter... | |
718 bsf store_sample ; ...and set bit for profile storage | |
719 isr_divemode_1sec2: | |
720 ; Increase re-setable average depth divetime counter | |
176 | 721 infsnz average_divesecs+0,F ; increase stopwatch registers |
0 | 722 incf average_divesecs+1,F ; increase stopwatch registers |
723 ; Increase total divetime (Regardless of start_dive_threshold) | |
148 | 724 infsnz total_divetime_seconds+0,F |
725 incf total_divetime_seconds+1,F ; Total dive time (Regardless of start_dive_threshold) | |
0 | 726 |
727 btfss divemode2 ; displayed divetime is running? | |
728 return ; No (e.g. too shallow) | |
729 | |
730 ; increase divetime registers (Displayed dive time) | |
731 incf divesecs,F | |
732 movlw d'59' | |
733 cpfsgt divesecs | |
734 bra isr_divemode_1sec2a | |
735 | |
736 clrf divesecs | |
737 bsf realdive ; this bit is always set (again) if the dive is longer then one minute | |
148 | 738 infsnz divemins+0,F |
739 incf divemins+1,F ; increase divemins | |
0 | 740 |
741 isr_divemode_1sec2a: | |
742 btfss FLAG_apnoe_mode ; Are we in Apnoe mode? | |
743 return ; No | |
744 | |
745 incf apnoe_secs,F ; increase descent registers | |
746 movlw d'59' | |
747 cpfsgt apnoe_secs ; full minute? | |
748 return ; No | |
749 clrf apnoe_secs | |
750 incf apnoe_mins,F ; increase descent mins | |
751 return | |
752 | |
753 ;============================================================================= | |
754 ; BCD to Binary convertion. | |
755 ; Input: isr1_temp = Value in BCD | |
756 ; Output WREG = value in binary. | |
757 isr_rtcc_convert: | |
758 swapf isr1_temp, W | |
759 andlw 0x0F ; W= tens | |
760 rlncf WREG, W ; W= 2*tens | |
761 subwf isr1_temp, F ; 16*tens + ones - 2*tens | |
762 subwf isr1_temp, F ; 14*tens + ones - 2*tens | |
763 subwf isr1_temp, W ; 12*tens + ones - 2*tens | |
764 return | |
765 | |
766 ;============================================================================= | |
767 | |
768 isr_switch_right: ; | |
769 bcf INTCON,INT0IE ; Disable INT0 | |
770 banksel common ; flag1 is in Bank1 | |
152
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771 btfss flip_screen ; 180° flipped? |
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BUGFIX: Clear Setpoint-Fallback warning when in bailout
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|
772 bsf switch_right ; Set flag |
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BUGFIX: Clear Setpoint-Fallback warning when in bailout
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diff
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|
773 btfsc flip_screen ; 180° flipped? |
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BUGFIX: Clear Setpoint-Fallback warning when in bailout
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changeset
|
774 bsf switch_left ; Set flag |
0 | 775 bra isr_switch_common ; Continue... |
776 | |
777 isr_switch_left: ; | |
778 bcf INTCON3,INT1IE ; Disable INT1 | |
779 banksel common ; flag1 is in Bank1 | |
152
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BUGFIX: Clear Setpoint-Fallback warning when in bailout
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148
diff
changeset
|
780 btfss flip_screen ; 180° flipped? |
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148
diff
changeset
|
781 bsf switch_left ; Set flag |
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148
diff
changeset
|
782 btfsc flip_screen ; 180° flipped? |
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BUGFIX: Clear Setpoint-Fallback warning when in bailout
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148
diff
changeset
|
783 bsf switch_right ; Set flag |
0 | 784 isr_switch_common: |
785 ; load timer1 for first press | |
786 clrf TMR1L | |
787 movlw TMR1H_VALUE_FIRST ; in steps of 7,8125ms | |
788 movwf TMR1H | |
789 bsf T1CON,TMR1ON ; Start Timer 1 | |
790 banksel isr_backup ; Select Bank0 for ISR data. | |
791 bcf INTCON3,INT1IF ; Clear flag | |
792 bcf INTCON,INT0IF ; Clear flag | |
793 return | |
794 | |
795 timer1int: | |
451 | 796 bcf PIR1,TMR1IF ; Clear flag |
0 | 797 banksel common ; flag1 is in Bank1 |
451 | 798 bcf INTCON,INT0IF ; Clear flag |
799 bcf INTCON3,INT1IF ; Clear flag | |
800 ; digital | |
0 | 801 btfss switch_left1 ; Left button hold-down? |
802 bra timer1int_left ; Yes | |
803 btfss switch_right2 ; Right button hold-down? | |
804 bra timer1int_right ; Yes | |
451 | 805 |
806 ; Analog | |
807 btfsc analog_sw2_pressed ; Left button hold-down? | |
808 bra timer1int_left ; Yes | |
809 btfsc analog_sw1_pressed ; Right button hold-down? | |
810 bra timer1int_right ; Yes | |
811 | |
0 | 812 ; No button hold-down, stop Timer 1 |
813 bcf T1CON,TMR1ON ; Stop Timer 1 | |
814 bsf INTCON,INT0IE ; Enable INT0 | |
815 bsf INTCON3,INT1IE ; Enable INT1 | |
451 | 816 return |
0 | 817 |
818 timer1int_left: | |
152
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diff
changeset
|
819 btfss flip_screen ; 180° flipped? |
0 | 820 bsf switch_left ; (Re-)Set flag |
152
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diff
changeset
|
821 btfsc flip_screen ; 180° flipped? |
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BUGFIX: Clear Setpoint-Fallback warning when in bailout
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diff
changeset
|
822 bsf switch_right ; (Re-)Set flag |
0 | 823 bra timer1int_common ; Continue |
824 timer1int_right: | |
152
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diff
changeset
|
825 btfss flip_screen ; 180° flipped? |
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diff
changeset
|
826 bsf switch_right ; Set flag |
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BUGFIX: Clear Setpoint-Fallback warning when in bailout
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diff
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|
827 btfsc flip_screen ; 180° flipped? |
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diff
changeset
|
828 bsf switch_left ; Set flag |
0 | 829 timer1int_common: |
830 ; load timer1 for next press | |
831 clrf TMR1L | |
832 movlw TMR1H_VALUE_CONT ; Surface mode | |
833 btfsc divemode | |
834 movlw TMR1H_VALUE_CONT_DIVE ; Dive mode | |
835 movwf TMR1H | |
836 return ; Return from timer1int with timer1 kept running | |
837 | |
838 ;============================================================================= | |
839 | |
840 check_nofly_desat_time: | |
841 movf nofly_time+0,W ; Is nofly null ? | |
842 iorwf nofly_time+1,W | |
843 bz check_nofly_desat_time2 ; yes... | |
844 | |
845 movlw d'1' | |
846 subwf nofly_time+0,F | |
847 movlw d'0' | |
848 subwfb nofly_time+1,F ; reduce by one | |
849 | |
850 check_nofly_desat_time2: | |
851 movf desaturation_time+0,W ; Is Desat null ? | |
852 iorwf desaturation_time+1,W | |
853 bz check_nofly_desat_time3 ; yes... | |
854 | |
855 movlw d'1' | |
856 subwf desaturation_time+0,F | |
857 movlw d'0' | |
858 subwfb desaturation_time+1,F ; reduce by one... | |
859 | |
147 | 860 ; Increase surface interval timer |
861 infsnz surface_interval+0,F | |
862 incf surface_interval+1,F | |
0 | 863 return ; Done |
864 | |
865 check_nofly_desat_time3: | |
866 clrf surface_interval+0 | |
867 clrf surface_interval+1 ; Clear surface interval timer | |
868 return ; Done. | |
869 | |
870 ;============================================================================= | |
871 | |
872 isr_restore_clock: | |
873 banksel isr_backup | |
874 movlw d'1' | |
319 | 875 cpfseq speed_setting |
0 | 876 bra isr_restore_speed2 |
877 ; Reset to eco | |
878 movlw b'00000000' | |
879 movwf OSCTUNE ; 4x PLL Disable (Bit6) - only works with 8 or 16MHz (=32 or 64MHz) | |
880 movlw b'00110010' | |
881 movwf OSCCON ; 1MHz INTOSC | |
882 movlw T2CON_ECO | |
883 movwf T2CON | |
884 bra isr_restore_exit | |
885 isr_restore_speed2: | |
886 movlw d'2' | |
319 | 887 cpfseq speed_setting |
0 | 888 bra isr_restore_speed3 |
889 ; Reset to normal | |
890 movlw b'01110010' | |
891 movwf OSCCON ; 16MHz INTOSC | |
892 movlw b'00000000' | |
893 movwf OSCTUNE ; 4x PLL Disable (Bit6) - only works with 8 or 16MHz (=32 or 64MHz) | |
894 movlw T2CON_NORMAL | |
895 movwf T2CON | |
896 bra isr_restore_exit | |
897 | |
898 isr_restore_speed3: | |
899 ; Reset to fastest | |
900 movlw b'01110010' ; 16MHz INTOSC | |
901 movwf OSCCON | |
902 movlw b'01000000' | |
903 movwf OSCTUNE ; 4x PLL Enable (Bit6) - only works with 8 or 16MHz (=32 or 64MHz) | |
904 movlw T2CON_FASTEST | |
905 movwf T2CON | |
906 ; bra isr_restore_exit | |
907 isr_restore_exit: | |
908 btfss OSCCON,HFIOFS | |
909 bra isr_restore_exit ; loop until PLL is stable | |
910 return | |
911 | |
410
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diff
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|
912 |
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changeset
|
913 restore_flash: ; Restore first flash page from eeprom |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
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diff
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|
914 banksel common |
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BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
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|
915 ; Start address in internal flash |
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BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
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diff
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|
916 movlw 0x00 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
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changeset
|
917 movwf TBLPTRL |
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BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
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diff
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|
918 movwf TBLPTRH |
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diff
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919 movwf TBLPTRU |
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diff
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920 |
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921 movlw b'10010100' ; Setup erase |
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BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
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|
922 rcall Write ; Write! |
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BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
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|
923 |
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BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
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|
924 movlw .128 |
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diff
changeset
|
925 movwf lo ; Byte counter |
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diff
changeset
|
926 clrf EEADR |
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|
927 movlw .3 |
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|
928 movwf EEADRH ; Setup backup address |
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BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
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|
929 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
930 TBLRD*- ; Dummy read to be in 128 byte block |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
931 restore_flash_loop: |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
932 call read_eeprom |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
933 incf EEADR,F |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
934 movff EEDATA,TABLAT ; put 1 byte |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
935 tblwt+* ; Table Write with Pre-Increment |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
936 decfsz lo,F ; 128byte done? |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
937 bra restore_flash_loop ; No |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
938 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
939 movlw b'10000100' ; Setup writes |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
940 rcall Write ; Write! |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
941 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
942 reset ; Done, reset CPU |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
943 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
944 Write: |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
945 movwf EECON1 ; Type of memory to write in |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
946 movlw 0x55 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
947 movwf EECON2 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
948 movlw 0xAA |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
949 movwf EECON2 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
950 bsf EECON1,WR ; Write |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
951 nop |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
952 nop |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
953 return |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
954 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
955 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
956 END |