annotate src/external_flash.asm @ 588:bf0c76e9b01b

Sync safety stop countdown output
author heinrichsweikamp
date Sat, 10 Mar 2018 15:39:33 +0100
parents b455b31ce022
children ca4556fb60b9
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1 ;=============================================================================
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2 ;
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3 ; File external_flash.asm ## V2.98
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4 ;
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5 ; External flash
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6 ;
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7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
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8 ;=============================================================================
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9 ; HISTORY
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10 ; 2011-08-12 : [mH] creation
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11
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653a3ab08062 rename into hwOS
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12 #include "hwos.inc"
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13 #include "wait.inc"
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14
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15 basic CODE
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16 ;=============================================================================
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17
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18 global incf_ext_flash_address_p1
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19 incf_ext_flash_address_p1: ; Increase by one
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20 movlw .1
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21
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22 global incf_ext_flash_address0
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23 incf_ext_flash_address0:
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24 addwf ext_flash_address+0,F ; increase address
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25 movlw d'0'
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26 addwfc ext_flash_address+1,F
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27 addwfc ext_flash_address+2,F
0
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28
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29 movlw 0x40
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30 cpfseq ext_flash_address+2 ; at address 40FFFF?
0
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31 return ; No, return
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32 ; clrf ext_flash_address+0
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33 ; clrf ext_flash_address+1
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34 clrf ext_flash_address+2 ; Yes, rollover to 0x000000
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35 return
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36
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37
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38 global incf_ext_flash_address0_p1_0x20
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39 incf_ext_flash_address0_p1_0x20: ; Increase by one
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40 movlw .1
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41
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42 global incf_ext_flash_address0_0x20
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43 incf_ext_flash_address0_0x20: ; with roll-over at 0x200000 to 0x000000
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44 addwf ext_flash_address+0,F ; increase address
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45 movlw d'0'
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46 addwfc ext_flash_address+1,F
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47 addwfc ext_flash_address+2,F
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48 movlw 0x20
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49 cpfseq ext_flash_address+2 ; at address 0x200000?
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50 return ; No, return
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51 ; clrf ext_flash_address+0
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52 ; clrf ext_flash_address+1
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53 clrf ext_flash_address+2 ; Yes, rollover to 0x000000
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54 return
0
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55
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56
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57 global decf_ext_flash_address0
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58 decf_ext_flash_address0:
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59 subwf ext_flash_address+0,F ; decrease address: do a 16-8bits subtract
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60 movlw d'0'
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61 subwfb ext_flash_address+1,F
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62 movlw d'0'
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63 subwfb ext_flash_address+2,F
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64 btfss ext_flash_address+2,7 ; Rollover to 0xFFFFFF?
0
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65 return ; No, return
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66 clrf ext_flash_address+2 ; Set to 0x00FFFFF
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67 setf ext_flash_address+1
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68 setf ext_flash_address+0
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69 return
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70
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71
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72 global ext_flash_byte_read_plus ; Return data read in WREG and SSP2BUF and
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73 ext_flash_byte_read_plus: ; increase address after read
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74 rcall ext_flash_byte_read
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75 movwf ext_flash_rw ; store received data
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76 bra incf_ext_flash_address_p1 ; +1 and return
0
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77
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78
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79 global ext_flash_byte_read_plus_0x20 ; Return data read in WREG and SSP2BUF and
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80 ext_flash_byte_read_plus_0x20: ; increase address after read with banking at 0x200000
0
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81 rcall ext_flash_byte_read
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82 movwf ext_flash_rw ; store received data
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83 bra incf_ext_flash_address0_p1_0x20 ;+1 and return
0
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84
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85
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86 global ext_flash_byte_read ; Return data read in WREG
0
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87 ext_flash_byte_read:
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88 movlw 0x03 ; Read command
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89 rcall write_spi
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90 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
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91 rcall write_spi ; Dummy write to read data into WREG
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92 bsf flash_ncs ; CS=1
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93 movwf ext_flash_rw
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94 return ; Return data read in WREG and ext_flash_rw
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95
0
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96
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97 ext_flash_write_address: ; Write 24bit address ext_flash_address:3 via SPI
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98 movf ext_flash_address+2,W ; 24Bit Address
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99 rcall write_spi
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100 movf ext_flash_address+1,W
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101 rcall write_spi
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102 movf ext_flash_address+0,W
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103 bra write_spi ; And return....
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104
0
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105
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106 global ext_flash_read_block_start ; Return data read in WREG
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107 ext_flash_read_block_start:
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108 movlw 0x03 ; Read command
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109 rcall write_spi
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110 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
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111 rcall write_spi ; Dummy write to read data into WREG
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112 return ; Return data read in WREG
0
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113
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114
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115 global ext_flash_read_block ; Return data read in WREG
0
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116 ext_flash_read_block:
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117 rcall incf_ext_flash_address_p1 ; Increase address +1
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118 bra write_spi1 ; Dummy write to read data into WREG and return
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119
0
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120
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121 global ext_flash_read_block_stop ; Return data read in WREG
0
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122 ext_flash_read_block_stop:
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123 bsf flash_ncs ; CS=1
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124 return ; NO data in WREG
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125
0
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126
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127 global write_byte_ext_flash_plus_header
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128 write_byte_ext_flash_plus_header: ; Write from WREG and increase address after write
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129 movwf ext_flash_rw ; store data
0
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130 ; test if write is done at first byte of 4kB block
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131 ; if yes -> delete 4kB block first
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132 tstfsz ext_flash_address+0 ; at 0x00?
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133 bra write_byte_ext_flash_plus_h1 ; No, normal Write
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134 movf ext_flash_address+1,W
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135 andlw 0x0F ; Mask lower nibble
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136 tstfsz WREG ; at 0x.0?
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137 bra write_byte_ext_flash_plus_h1 ; No, normal Write
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138 ; At beginning of 4kB block -> erase first!
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139 rcall ext_flash_erase4kB ; Erases 4kB sector @ext_flash_address:3
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140 write_byte_ext_flash_plus_h1:
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141 movf ext_flash_rw,W
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142 rcall ext_flash_byte_write ; Write the byte
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143 bra incf_ext_flash_address_p1 ; +1 and return
0
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144
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145
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146 global write_byte_ext_flash_plus_nocnt ; No increase of ext_flash_dive_counter:3
279
62c7af4795b0 bugfix wrong profile length in header
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147 write_byte_ext_flash_plus_nocnt:
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148 movwf ext_flash_rw ; store data
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149 bra write_byte_ext_flash_plus2
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150
279
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151
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152 global write_byte_ext_flash_plus_nodel ; Does NOT delete 4kB Page when required
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153 write_byte_ext_flash_plus_nodel: ; Write from WREG and increase address after write with banking at 0x200000
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154 movwf ext_flash_rw ; store data
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155 bra write_byte_ext_flash_plus1 ; Ignore possible begin of 4kB page, there have been written 0xFF already
6
13cda523891f bugfix: dive length in normal header
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156
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157 global write_byte_ext_flash_plus ; Write from WREG and increase address after write with banking at 0x200000
0
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158 write_byte_ext_flash_plus:
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159 movwf ext_flash_rw ; store data
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160 ; First, increase dive length counter
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161 incf ext_flash_dive_counter+0,F
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162 movlw .0
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163 addwfc ext_flash_dive_counter+1,F
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164 addwfc ext_flash_dive_counter+2,F ; 24bit++
0
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165
6
13cda523891f bugfix: dive length in normal header
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166 write_byte_ext_flash_plus2:
0
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167 ; Now test if write is done at first byte of 4kB block
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168 ; if yes -> delete 4kB block first
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169 tstfsz ext_flash_address+0 ; at 0x00?
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170 bra write_byte_ext_flash_plus1 ; No, normal Write
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171 movf ext_flash_address+1,W
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172 andlw 0x0F ; Mask lower nibble
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173 tstfsz WREG ; at 0x.0?
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174 bra write_byte_ext_flash_plus1 ; No, normal Write
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175 ; At beginning of 4kB block -> erase first!
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176 rcall ext_flash_erase4kB ; Erases 4kB sector @ext_flash_address:3
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177 write_byte_ext_flash_plus1:
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178 movf ext_flash_rw,W
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179 rcall ext_flash_byte_write ; Write the byte
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180 bra incf_ext_flash_address0_p1_0x20 ; +1 and roll over at 0x200000 to 0x000000 and return
0
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181
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182
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183 global ext_flash_byte_write ; Write from WREG
0
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184 ext_flash_byte_write:
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185 movwf ext_flash_rw ; store data byte
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186 bsf flash_ncs ; CS=1
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187 movlw 0x06 ; WREN command
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188 rcall write_spi
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189 bsf flash_ncs ; CS=1
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190 movlw 0x02 ; Write (PP, Page-Program) command
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191 rcall write_spi
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192 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
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parents: 561
diff changeset
193 movf ext_flash_rw,W ; load data byte
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
194 rcall write_spi ; write one byte of data!
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
195 bra ext_flash_wait_write ; And return...
423
ccaaac45b61a _another_ timing fix for firmware updates (2.07 was not published yet anyway)
heinrichsweikamp
parents: 421
diff changeset
196
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
197
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
198 global ext_flash_byte_write_comms ; without wait, ~86us fixed delay due to 115200 Bauds
423
ccaaac45b61a _another_ timing fix for firmware updates (2.07 was not published yet anyway)
heinrichsweikamp
parents: 421
diff changeset
199 ext_flash_byte_write_comms:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
200 movwf ext_flash_rw ; store data byte
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
201 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
202 movlw 0x06 ; WREN command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
203 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
204 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
205 movlw 0x02 ; Write (PP, Page-Program) command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
206 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
207 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
208 movf ext_flash_rw,W ; load data byte
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
209 rcall write_spi ; write one byte of data!
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
210 bsf flash_ncs ; CS=1
423
ccaaac45b61a _another_ timing fix for firmware updates (2.07 was not published yet anyway)
heinrichsweikamp
parents: 421
diff changeset
211 return
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
212
0
heinrichsweikamp
parents:
diff changeset
213
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
214 global ext_flash_disable_protection ; Disable write protection
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
215 ext_flash_disable_protection:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
216 ; unlock old memory
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
217 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
218 movlw 0x50 ; EWSR command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
219 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
220 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
221 movlw 0x01 ; WRSR command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
222 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
223 movlw b'00000000' ; New status
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
224 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
225 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
226 ; unlock new memory
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
227 movlw 0x06 ; WREN command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
228 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
229 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
230 movlw 0x98 ; ULBPR command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
231 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
232 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
233 movlw 0x06 ; WREN command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
234 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
235 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
236 movlw 0x42 ; WBPR command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
237 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
238 movlw .18
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
239 movwf lo
420
789230298511 fix handling for new flash memory chip
heinrichsweikamp
parents: 416
diff changeset
240 ext_flash_disable_protection2:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
241 movlw 0x00
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
242 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
243 decfsz lo,F ; 18 bytes with 0x00
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
244 bra ext_flash_disable_protection2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
245 bsf flash_ncs ; CS=1
0
heinrichsweikamp
parents:
diff changeset
246 return
heinrichsweikamp
parents:
diff changeset
247
heinrichsweikamp
parents:
diff changeset
248 global ext_flash_enable_protection
heinrichsweikamp
parents:
diff changeset
249 ext_flash_enable_protection:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
250 ; lock old memory
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
251 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
252 movlw 0x50 ; EWSR command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
253 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
254 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
255 movlw 0x01 ; WRSR command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
256 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
257 movlw b'00011100' ; New status (Write protect on)
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
258 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
259 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
260 ; lock new memory
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
261 ; movlw 0x06 ; WREN command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
262 ; rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
263 ; bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
264 ; movlw 0x8D ; LBPR command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
265 ; rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
266 ; bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
267 movlw 0x06 ; WREN command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
268 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
269 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
270 movlw 0x42 ; WBPR command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
271 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
272 movlw .18
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
273 movwf lo
414
35bdfd89323c support for new flash memory
heinrichsweikamp
parents: 281
diff changeset
274 ext_flash_enable_protection2:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
275 movlw 0xFF
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
276 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
277 decfsz lo,F ; 18 bytes with 0xFF
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
278 bra ext_flash_enable_protection2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
279 bsf flash_ncs ; CS=1
0
heinrichsweikamp
parents:
diff changeset
280 return
heinrichsweikamp
parents:
diff changeset
281
heinrichsweikamp
parents:
diff changeset
282
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
283 global ext_flash_erase4kB ; Erases 4kB sector
0
heinrichsweikamp
parents:
diff changeset
284 ext_flash_erase4kB:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
285 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
286 movlw 0x06 ; WREN command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
287 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
288 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
289 movlw 0x20 ; Sector erase command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
290 rcall write_spi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
291 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
292 ; bra ext_flash_wait_write ; Wait for write... and return
0
heinrichsweikamp
parents:
diff changeset
293 ext_flash_wait_write:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
294 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
295 ; WAITMS d'1' ; TBE/TSE=25ms...
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
296 movlw 0x05 ; RDSR command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
297 rcall write_spi ; Read status
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
298 rcall write_spi ; Read status into WREG
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
299 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
300 btfsc SSP2BUF,0 ; Write operation in process?
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
301 bra ext_flash_wait_write ; Yes, wait more..
0
heinrichsweikamp
parents:
diff changeset
302 return
heinrichsweikamp
parents:
diff changeset
303
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
304
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
305 global ext_flash_erase_logbook ; erases logbook memory (000000h -> 2FFFFFh -> 3MByte -> 3145728 Bytes)
0
heinrichsweikamp
parents:
diff changeset
306 ext_flash_erase_logbook:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
307 bsf flash_ncs ; CS=1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
308 clrf ext_flash_address+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
309 clrf ext_flash_address+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
310 clrf ext_flash_address+2
0
heinrichsweikamp
parents:
diff changeset
311
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
312 setf ext_flash_rw ; 256*12kB=3145728 Bytes
0
heinrichsweikamp
parents:
diff changeset
313 ext_flash_erase_logbook_loop:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
314 rcall ext_flash_erase4kB ; 4kB
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
315 rcall ext_flash_add_4kB ; Increase ext_flash_address:3 by 4kB
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
316 rcall ext_flash_erase4kB ; 4kB
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
317 rcall ext_flash_add_4kB ; Increase ext_flash_address:3 by 4kB
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
318 rcall ext_flash_erase4kB ; 4kB
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
319 rcall ext_flash_add_4kB ; Increase ext_flash_address:3 by 4kB
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
320 decfsz ext_flash_rw,F
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
321 bra ext_flash_erase_logbook_loop
0
heinrichsweikamp
parents:
diff changeset
322 return
heinrichsweikamp
parents:
diff changeset
323
414
35bdfd89323c support for new flash memory
heinrichsweikamp
parents: 281
diff changeset
324 ext_flash_add_4kB:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
325 movlw 0x10
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
326 addwf ext_flash_address+1,F
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
327 movlw d'0'
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
328 addwfc ext_flash_address+2,F
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
329 return
414
35bdfd89323c support for new flash memory
heinrichsweikamp
parents: 281
diff changeset
330
0
heinrichsweikamp
parents:
diff changeset
331
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
332 write_spi: ; With data in WREG...
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
333 bcf flash_ncs ; CS
0
heinrichsweikamp
parents:
diff changeset
334 global write_spi1
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
335 write_spi1: ; With data in WREG...
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
336 bcf SSP2STAT,WCOL ; Clear flag
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
337 movwf SSP2BUF ; Write to buffer
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
338 btfsc SSP2STAT,WCOL ; Was buffer full?
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
339 bra write_spi1 ; Yes, try again
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
340 write_spi2: ; Wait for write command
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
341 btfss SSP2STAT, BF ; Buffer full?
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
342 bra write_spi2 ; No, wait.
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
343 movf SSP2BUF,W
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
344 return ; Returns RX data in WREG and SSP2BUF
0
heinrichsweikamp
parents:
diff changeset
345
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 561
diff changeset
346 END