annotate src/external_flash.asm @ 12:9db9a1deefd1

logo update
author heinrichsweikamp
date Sun, 26 May 2013 12:06:51 +0200
parents 13cda523891f
children 05f2100d2eb8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
heinrichsweikamp
parents:
diff changeset
1 ;=============================================================================
heinrichsweikamp
parents:
diff changeset
2 ;
heinrichsweikamp
parents:
diff changeset
3 ; File external_flash.asm
heinrichsweikamp
parents:
diff changeset
4 ;
heinrichsweikamp
parents:
diff changeset
5 ; External flash
heinrichsweikamp
parents:
diff changeset
6 ;
heinrichsweikamp
parents:
diff changeset
7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
heinrichsweikamp
parents:
diff changeset
8 ;=============================================================================
heinrichsweikamp
parents:
diff changeset
9 ; HISTORY
heinrichsweikamp
parents:
diff changeset
10 ; 2011-08-12 : [mH] creation
heinrichsweikamp
parents:
diff changeset
11
heinrichsweikamp
parents:
diff changeset
12 #include "ostc3.inc"
heinrichsweikamp
parents:
diff changeset
13 #include "wait.inc"
heinrichsweikamp
parents:
diff changeset
14
heinrichsweikamp
parents:
diff changeset
15 basic CODE
heinrichsweikamp
parents:
diff changeset
16 ;=============================================================================
heinrichsweikamp
parents:
diff changeset
17
heinrichsweikamp
parents:
diff changeset
18 global incf_ext_flash_address_p1
heinrichsweikamp
parents:
diff changeset
19 incf_ext_flash_address_p1: ; Increase by one
heinrichsweikamp
parents:
diff changeset
20 movlw .1
heinrichsweikamp
parents:
diff changeset
21
heinrichsweikamp
parents:
diff changeset
22 global incf_ext_flash_address0
heinrichsweikamp
parents:
diff changeset
23 incf_ext_flash_address0:
heinrichsweikamp
parents:
diff changeset
24 addwf ext_flash_address+0,F ; increase address
heinrichsweikamp
parents:
diff changeset
25 movlw d'0'
heinrichsweikamp
parents:
diff changeset
26 addwfc ext_flash_address+1,F
heinrichsweikamp
parents:
diff changeset
27 addwfc ext_flash_address+2,F
heinrichsweikamp
parents:
diff changeset
28
heinrichsweikamp
parents:
diff changeset
29 movlw 0x40
heinrichsweikamp
parents:
diff changeset
30 cpfseq ext_flash_address+2 ; at address 40FFFF?
heinrichsweikamp
parents:
diff changeset
31 return ; No, return
heinrichsweikamp
parents:
diff changeset
32 clrf ext_flash_address+0 ; Yes, rollover to 0x000000
heinrichsweikamp
parents:
diff changeset
33 clrf ext_flash_address+1
heinrichsweikamp
parents:
diff changeset
34 clrf ext_flash_address+2
heinrichsweikamp
parents:
diff changeset
35 return
heinrichsweikamp
parents:
diff changeset
36
heinrichsweikamp
parents:
diff changeset
37 global incf_ext_flash_address0_p1_0x20
heinrichsweikamp
parents:
diff changeset
38 incf_ext_flash_address0_p1_0x20: ; Increase by one
heinrichsweikamp
parents:
diff changeset
39 movlw .1
heinrichsweikamp
parents:
diff changeset
40
heinrichsweikamp
parents:
diff changeset
41 global incf_ext_flash_address0_0x20
heinrichsweikamp
parents:
diff changeset
42 incf_ext_flash_address0_0x20: ; with roll-over at 0x200000 to 0x000000
heinrichsweikamp
parents:
diff changeset
43 addwf ext_flash_address+0,F ; increase address
heinrichsweikamp
parents:
diff changeset
44 movlw d'0'
heinrichsweikamp
parents:
diff changeset
45 addwfc ext_flash_address+1,F
heinrichsweikamp
parents:
diff changeset
46 addwfc ext_flash_address+2,F
heinrichsweikamp
parents:
diff changeset
47
heinrichsweikamp
parents:
diff changeset
48 movlw 0x20
heinrichsweikamp
parents:
diff changeset
49 cpfseq ext_flash_address+2 ; at address 0x200000?
heinrichsweikamp
parents:
diff changeset
50 return ; No, return
heinrichsweikamp
parents:
diff changeset
51 clrf ext_flash_address+0 ; Yes, rollover to 0x000000
heinrichsweikamp
parents:
diff changeset
52 clrf ext_flash_address+1
heinrichsweikamp
parents:
diff changeset
53 clrf ext_flash_address+2
heinrichsweikamp
parents:
diff changeset
54 return
heinrichsweikamp
parents:
diff changeset
55
heinrichsweikamp
parents:
diff changeset
56 global decf_ext_flash_address0
heinrichsweikamp
parents:
diff changeset
57 decf_ext_flash_address0:
heinrichsweikamp
parents:
diff changeset
58 subwf ext_flash_address+0,F ; decrease address: do a 16-8bits substract.
heinrichsweikamp
parents:
diff changeset
59 movlw d'0'
heinrichsweikamp
parents:
diff changeset
60 subwfb ext_flash_address+1,F
heinrichsweikamp
parents:
diff changeset
61 movlw d'0'
heinrichsweikamp
parents:
diff changeset
62 subwfb ext_flash_address+2,F
heinrichsweikamp
parents:
diff changeset
63
heinrichsweikamp
parents:
diff changeset
64 btfss ext_flash_address+2,7 ; Rollover to 0xFFFFFF?
heinrichsweikamp
parents:
diff changeset
65 return ; No, return
heinrichsweikamp
parents:
diff changeset
66 clrf ext_flash_address+2 ; Set to 0x00FFFFF
heinrichsweikamp
parents:
diff changeset
67 setf ext_flash_address+1
heinrichsweikamp
parents:
diff changeset
68 setf ext_flash_address+0
heinrichsweikamp
parents:
diff changeset
69 return
heinrichsweikamp
parents:
diff changeset
70
heinrichsweikamp
parents:
diff changeset
71 global ext_flash_power_down
heinrichsweikamp
parents:
diff changeset
72 ext_flash_power_down:
heinrichsweikamp
parents:
diff changeset
73 movlw 0x04 ; Write disable
heinrichsweikamp
parents:
diff changeset
74 rcall write_spi
heinrichsweikamp
parents:
diff changeset
75 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
76 return
heinrichsweikamp
parents:
diff changeset
77
heinrichsweikamp
parents:
diff changeset
78 global ext_flash_byte_read_plus ; Return data read in WREG and SSP2BUF and
heinrichsweikamp
parents:
diff changeset
79 ext_flash_byte_read_plus: ; increase address after read
heinrichsweikamp
parents:
diff changeset
80 rcall ext_flash_byte_read
heinrichsweikamp
parents:
diff changeset
81 movwf temp1 ; store received data
heinrichsweikamp
parents:
diff changeset
82 bra incf_ext_flash_address_p1 ; +1 and return
heinrichsweikamp
parents:
diff changeset
83
heinrichsweikamp
parents:
diff changeset
84 global ext_flash_byte_read_plus_0x20; Return data read in WREG and SSP2BUF and
heinrichsweikamp
parents:
diff changeset
85 ext_flash_byte_read_plus_0x20: ; increase address after read with banking at 0x200000
heinrichsweikamp
parents:
diff changeset
86 rcall ext_flash_byte_read
heinrichsweikamp
parents:
diff changeset
87 movwf temp1 ; store received data
heinrichsweikamp
parents:
diff changeset
88 bra incf_ext_flash_address0_p1_0x20 ;+1 and return
heinrichsweikamp
parents:
diff changeset
89
heinrichsweikamp
parents:
diff changeset
90
heinrichsweikamp
parents:
diff changeset
91 global ext_flash_byte_read ; Return data read in WREG
heinrichsweikamp
parents:
diff changeset
92 ext_flash_byte_read:
heinrichsweikamp
parents:
diff changeset
93 movlw 0x03 ; Read command
heinrichsweikamp
parents:
diff changeset
94 rcall write_spi
heinrichsweikamp
parents:
diff changeset
95 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
heinrichsweikamp
parents:
diff changeset
96 rcall write_spi ; Dummy write to read data into WREG
heinrichsweikamp
parents:
diff changeset
97 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
98 movwf temp1
heinrichsweikamp
parents:
diff changeset
99 return ; Return data read in WREG and temp1
heinrichsweikamp
parents:
diff changeset
100
heinrichsweikamp
parents:
diff changeset
101 ext_flash_write_address: ; Write 24bit address ext_flash_address:3 via SPI
heinrichsweikamp
parents:
diff changeset
102 movf ext_flash_address+2,W ; 24Bit Address
heinrichsweikamp
parents:
diff changeset
103 rcall write_spi
heinrichsweikamp
parents:
diff changeset
104 movf ext_flash_address+1,W
heinrichsweikamp
parents:
diff changeset
105 rcall write_spi
heinrichsweikamp
parents:
diff changeset
106 movf ext_flash_address+0,W
heinrichsweikamp
parents:
diff changeset
107 bra write_spi ; And return....
heinrichsweikamp
parents:
diff changeset
108
heinrichsweikamp
parents:
diff changeset
109 global ext_flash_read_block_start ; Return data read in WREG
heinrichsweikamp
parents:
diff changeset
110 ext_flash_read_block_start:
heinrichsweikamp
parents:
diff changeset
111 movlw 0x03 ; Read command
heinrichsweikamp
parents:
diff changeset
112 rcall write_spi
heinrichsweikamp
parents:
diff changeset
113 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
heinrichsweikamp
parents:
diff changeset
114 rcall write_spi ; Dummy write to read data into WREG
heinrichsweikamp
parents:
diff changeset
115 return ; Return data read in WREG
heinrichsweikamp
parents:
diff changeset
116
heinrichsweikamp
parents:
diff changeset
117 global ext_flash_read_block ; Return data read in WREG
heinrichsweikamp
parents:
diff changeset
118 ext_flash_read_block:
heinrichsweikamp
parents:
diff changeset
119 rcall incf_ext_flash_address_p1 ; Increase address +1
heinrichsweikamp
parents:
diff changeset
120 bra write_spi1 ; Dummy write to read data into WREG and return
heinrichsweikamp
parents:
diff changeset
121
heinrichsweikamp
parents:
diff changeset
122 global ext_flash_read_block_stop ; Return data read in WREG
heinrichsweikamp
parents:
diff changeset
123 ext_flash_read_block_stop:
heinrichsweikamp
parents:
diff changeset
124 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
125 return ; NO data in WREG
heinrichsweikamp
parents:
diff changeset
126
heinrichsweikamp
parents:
diff changeset
127 global write_byte_ext_flash_plus_header
heinrichsweikamp
parents:
diff changeset
128 write_byte_ext_flash_plus_header: ; Write from WREG and increase address after write
heinrichsweikamp
parents:
diff changeset
129 movwf temp1 ; store data
heinrichsweikamp
parents:
diff changeset
130 ; test if write is done at first byte of 4kB block
heinrichsweikamp
parents:
diff changeset
131 ; if yes -> delete 4kB block first
heinrichsweikamp
parents:
diff changeset
132 tstfsz ext_flash_address+0 ; at 0x00?
heinrichsweikamp
parents:
diff changeset
133 bra write_byte_ext_flash_plus_h1 ; No, normal Write
heinrichsweikamp
parents:
diff changeset
134
heinrichsweikamp
parents:
diff changeset
135 movf ext_flash_address+1,W
heinrichsweikamp
parents:
diff changeset
136 andlw 0x0F ; Mask lower nibble
heinrichsweikamp
parents:
diff changeset
137 tstfsz WREG ; at 0x.0?
heinrichsweikamp
parents:
diff changeset
138 bra write_byte_ext_flash_plus_h1; No, normal Write
heinrichsweikamp
parents:
diff changeset
139
heinrichsweikamp
parents:
diff changeset
140 ; At beginning of 4kB block -> rease first!
heinrichsweikamp
parents:
diff changeset
141 rcall ext_flash_erase4kB ; Erases 4kB sector @ext_flash_address:3
heinrichsweikamp
parents:
diff changeset
142 write_byte_ext_flash_plus_h1:
heinrichsweikamp
parents:
diff changeset
143 movf temp1,W
heinrichsweikamp
parents:
diff changeset
144 rcall ext_flash_byte_write ; Write the byte
heinrichsweikamp
parents:
diff changeset
145 bra incf_ext_flash_address_p1 ; +1 and return
heinrichsweikamp
parents:
diff changeset
146
6
13cda523891f bugfix: dive length in normal header
heinrichsweikamp
parents: 0
diff changeset
147 global write_byte_ext_flash_plus_nocnt
13cda523891f bugfix: dive length in normal header
heinrichsweikamp
parents: 0
diff changeset
148 write_byte_ext_flash_plus_nocnt: ; Write from WREG and increase address after write with banking at 0x200000
13cda523891f bugfix: dive length in normal header
heinrichsweikamp
parents: 0
diff changeset
149 movwf temp1 ; store data
13cda523891f bugfix: dive length in normal header
heinrichsweikamp
parents: 0
diff changeset
150 bra write_byte_ext_flash_plus2
13cda523891f bugfix: dive length in normal header
heinrichsweikamp
parents: 0
diff changeset
151
0
heinrichsweikamp
parents:
diff changeset
152 global write_byte_ext_flash_plus ; Write from WREG and increase address after write with banking at 0x200000
heinrichsweikamp
parents:
diff changeset
153 write_byte_ext_flash_plus:
heinrichsweikamp
parents:
diff changeset
154 movwf temp1 ; store data
heinrichsweikamp
parents:
diff changeset
155
heinrichsweikamp
parents:
diff changeset
156 ; First, increase dive length counter
heinrichsweikamp
parents:
diff changeset
157 incf ext_flash_dive_counter+0,F
heinrichsweikamp
parents:
diff changeset
158 movlw .0
heinrichsweikamp
parents:
diff changeset
159 addwfc ext_flash_dive_counter+1,F
heinrichsweikamp
parents:
diff changeset
160 addwfc ext_flash_dive_counter+2,F ; 24bit++
heinrichsweikamp
parents:
diff changeset
161
6
13cda523891f bugfix: dive length in normal header
heinrichsweikamp
parents: 0
diff changeset
162 write_byte_ext_flash_plus2:
0
heinrichsweikamp
parents:
diff changeset
163 ; Now test if write is done at first byte of 4kB block
heinrichsweikamp
parents:
diff changeset
164 ; if yes -> delete 4kB block first
heinrichsweikamp
parents:
diff changeset
165 tstfsz ext_flash_address+0 ; at 0x00?
heinrichsweikamp
parents:
diff changeset
166 bra write_byte_ext_flash_plus1 ; No, normal Write
heinrichsweikamp
parents:
diff changeset
167
heinrichsweikamp
parents:
diff changeset
168 movf ext_flash_address+1,W
heinrichsweikamp
parents:
diff changeset
169 andlw 0x0F ; Mask lower nibble
heinrichsweikamp
parents:
diff changeset
170 tstfsz WREG ; at 0x.0?
heinrichsweikamp
parents:
diff changeset
171 bra write_byte_ext_flash_plus1 ; No, normal Write
heinrichsweikamp
parents:
diff changeset
172
heinrichsweikamp
parents:
diff changeset
173 ; At beginning of 4kB block -> erase first!
heinrichsweikamp
parents:
diff changeset
174 rcall ext_flash_erase4kB ; Erases 4kB sector @ext_flash_address:3
heinrichsweikamp
parents:
diff changeset
175 write_byte_ext_flash_plus1:
heinrichsweikamp
parents:
diff changeset
176 movf temp1,W
heinrichsweikamp
parents:
diff changeset
177 rcall ext_flash_byte_write ; Write the byte
heinrichsweikamp
parents:
diff changeset
178 bra incf_ext_flash_address0_p1_0x20 ; +1 and roll over at 0x200000 to 0x000000 and return
heinrichsweikamp
parents:
diff changeset
179
heinrichsweikamp
parents:
diff changeset
180 global ext_flash_byte_write ; Write from WREG
heinrichsweikamp
parents:
diff changeset
181 ext_flash_byte_write:
heinrichsweikamp
parents:
diff changeset
182 movwf temp1 ; store data byte
heinrichsweikamp
parents:
diff changeset
183 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
184 movlw 0x06 ; WREN command
heinrichsweikamp
parents:
diff changeset
185 rcall write_spi
heinrichsweikamp
parents:
diff changeset
186 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
187 movlw 0x02 ; Write command
heinrichsweikamp
parents:
diff changeset
188 rcall write_spi
heinrichsweikamp
parents:
diff changeset
189 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
heinrichsweikamp
parents:
diff changeset
190 movf temp1,W ; load data byte
heinrichsweikamp
parents:
diff changeset
191 rcall write_spi ; write one byte of data!
heinrichsweikamp
parents:
diff changeset
192 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
193 return
heinrichsweikamp
parents:
diff changeset
194
heinrichsweikamp
parents:
diff changeset
195 global ext_flash_disable_protection ; Disable write protection
heinrichsweikamp
parents:
diff changeset
196 ext_flash_disable_protection:
heinrichsweikamp
parents:
diff changeset
197 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
198 movlw 0x50 ; EWSR command
heinrichsweikamp
parents:
diff changeset
199 rcall write_spi
heinrichsweikamp
parents:
diff changeset
200 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
201
heinrichsweikamp
parents:
diff changeset
202 movlw 0x01 ; WRSR command
heinrichsweikamp
parents:
diff changeset
203 rcall write_spi
heinrichsweikamp
parents:
diff changeset
204 movlw b'00000000' ; New status
heinrichsweikamp
parents:
diff changeset
205 rcall write_spi
heinrichsweikamp
parents:
diff changeset
206 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
207 return
heinrichsweikamp
parents:
diff changeset
208
heinrichsweikamp
parents:
diff changeset
209 global ext_flash_enable_protection
heinrichsweikamp
parents:
diff changeset
210 ext_flash_enable_protection:
heinrichsweikamp
parents:
diff changeset
211 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
212 movlw 0x50 ; EWSR command
heinrichsweikamp
parents:
diff changeset
213 rcall write_spi
heinrichsweikamp
parents:
diff changeset
214 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
215
heinrichsweikamp
parents:
diff changeset
216 movlw 0x01 ; WRSR command
heinrichsweikamp
parents:
diff changeset
217 rcall write_spi
heinrichsweikamp
parents:
diff changeset
218 movlw b'00011100' ; New status (Write protect on)
heinrichsweikamp
parents:
diff changeset
219 rcall write_spi
heinrichsweikamp
parents:
diff changeset
220 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
221 return
heinrichsweikamp
parents:
diff changeset
222
heinrichsweikamp
parents:
diff changeset
223
heinrichsweikamp
parents:
diff changeset
224 global ext_flash_erase4kB ; Erases 4kB sector
heinrichsweikamp
parents:
diff changeset
225 ext_flash_erase4kB:
heinrichsweikamp
parents:
diff changeset
226 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
227 movlw 0x06 ; WREN command
heinrichsweikamp
parents:
diff changeset
228 rcall write_spi
heinrichsweikamp
parents:
diff changeset
229 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
230 movlw 0x20 ; Sector erase command
heinrichsweikamp
parents:
diff changeset
231 rcall write_spi
heinrichsweikamp
parents:
diff changeset
232 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
heinrichsweikamp
parents:
diff changeset
233 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
234 ; bra ext_flash_wait_write ; Wait for write... and return
heinrichsweikamp
parents:
diff changeset
235 ext_flash_wait_write:
heinrichsweikamp
parents:
diff changeset
236 WAITMS d'1' ; TBE=25ms...
heinrichsweikamp
parents:
diff changeset
237 movlw 0x05 ; RDSR command
heinrichsweikamp
parents:
diff changeset
238 rcall write_spi ; Read status
heinrichsweikamp
parents:
diff changeset
239 rcall write_spi ; Read status into WREG
heinrichsweikamp
parents:
diff changeset
240 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
241 btfsc SSP2BUF,0 ; Write operation in process?
heinrichsweikamp
parents:
diff changeset
242 bra ext_flash_wait_write ; Yes, wait more..
heinrichsweikamp
parents:
diff changeset
243 return
heinrichsweikamp
parents:
diff changeset
244
heinrichsweikamp
parents:
diff changeset
245 global ext_flash_erase_logbook ; erases logbook memory (000000h -> 2FFFFFh -> 3MByte)
heinrichsweikamp
parents:
diff changeset
246 ext_flash_erase_logbook:
heinrichsweikamp
parents:
diff changeset
247 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
248 clrf ext_flash_address+0
heinrichsweikamp
parents:
diff changeset
249 clrf ext_flash_address+1
heinrichsweikamp
parents:
diff changeset
250 clrf ext_flash_address+2
heinrichsweikamp
parents:
diff changeset
251
heinrichsweikamp
parents:
diff changeset
252 movlw d'48'
heinrichsweikamp
parents:
diff changeset
253 movwf temp1 ; 48*64kB=917504 Bytes
heinrichsweikamp
parents:
diff changeset
254 ext_flash_erase_logbook_loop:
heinrichsweikamp
parents:
diff changeset
255 movlw 0x06 ; WREN command
heinrichsweikamp
parents:
diff changeset
256 rcall write_spi
heinrichsweikamp
parents:
diff changeset
257 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
258 movlw 0xD8 ; 64kB erase command
heinrichsweikamp
parents:
diff changeset
259 rcall write_spi
heinrichsweikamp
parents:
diff changeset
260 rcall ext_flash_write_address ; Write 24bit address ext_flash_address:3 via SPI
heinrichsweikamp
parents:
diff changeset
261 bsf flash_ncs ; CS=1
heinrichsweikamp
parents:
diff changeset
262 rcall ext_flash_wait_write ; Wait for write...
heinrichsweikamp
parents:
diff changeset
263
heinrichsweikamp
parents:
diff changeset
264 incf ext_flash_address+2,F ; 64kB ahead
heinrichsweikamp
parents:
diff changeset
265 decfsz temp1,F
heinrichsweikamp
parents:
diff changeset
266 bra ext_flash_erase_logbook_loop
heinrichsweikamp
parents:
diff changeset
267 return
heinrichsweikamp
parents:
diff changeset
268
heinrichsweikamp
parents:
diff changeset
269
heinrichsweikamp
parents:
diff changeset
270 write_spi: ; With data in WREG...
heinrichsweikamp
parents:
diff changeset
271 bcf flash_ncs ; CS
heinrichsweikamp
parents:
diff changeset
272 global write_spi1
heinrichsweikamp
parents:
diff changeset
273 write_spi1: ; With data in WREG...
heinrichsweikamp
parents:
diff changeset
274 bcf SSP2STAT,WCOL ; Clear flag
heinrichsweikamp
parents:
diff changeset
275 movwf SSP2BUF ; Write to buffer
heinrichsweikamp
parents:
diff changeset
276 btfsc SSP2STAT,WCOL ; Was buffer full?
heinrichsweikamp
parents:
diff changeset
277 bra write_spi1 ; Yes, try again
heinrichsweikamp
parents:
diff changeset
278
heinrichsweikamp
parents:
diff changeset
279 write_spi2: ; Wait for write command
heinrichsweikamp
parents:
diff changeset
280 btfss SSP2STAT, BF ; Buffer full?
heinrichsweikamp
parents:
diff changeset
281 bra write_spi2 ; No, wait.
heinrichsweikamp
parents:
diff changeset
282 movf SSP2BUF,W
heinrichsweikamp
parents:
diff changeset
283 return ; Returns RX data in WREG and SSP2BUF
heinrichsweikamp
parents:
diff changeset
284
heinrichsweikamp
parents:
diff changeset
285 END