annotate src/ports.inc @ 653:8bcd138ab744

add tools/o3pack.bat and the required tools/libs
author heinrichsweikamp
date Fri, 11 Aug 2023 15:53:49 +0200
parents cd58f7fc86db
children 75e90cd0c2c3
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
heinrichsweikamp
parents:
diff changeset
1 ;=============================================================================
heinrichsweikamp
parents:
diff changeset
2 ;
623
c40025d8e750 3.03 beta released
heinrichsweikamp
parents: 604
diff changeset
3 ; File ports.inc combined next generation V3.0.4b
0
heinrichsweikamp
parents:
diff changeset
4 ;
heinrichsweikamp
parents:
diff changeset
5 ; Portmap
heinrichsweikamp
parents:
diff changeset
6 ;
heinrichsweikamp
parents:
diff changeset
7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
heinrichsweikamp
parents:
diff changeset
8 ;=============================================================================
heinrichsweikamp
parents:
diff changeset
9 ; HISTORY
heinrichsweikamp
parents:
diff changeset
10 ; 2012-08-13 : [mH] Creation
heinrichsweikamp
parents:
diff changeset
11
heinrichsweikamp
parents:
diff changeset
12 ;----------------------------- PORTS ---------------------------------
heinrichsweikamp
parents:
diff changeset
13
heinrichsweikamp
parents:
diff changeset
14 ; PORTA: TFT_HIGH
heinrichsweikamp
parents:
diff changeset
15 ; TRIS=b'00000000'
heinrichsweikamp
parents:
diff changeset
16
heinrichsweikamp
parents:
diff changeset
17 ; PORTB
628
cd58f7fc86db 3.05 stable work
heinrichsweikamp
parents: 627
diff changeset
18 #DEFINE switch_left1 PORTB,1 ; switch
cd58f7fc86db 3.05 stable work
heinrichsweikamp
parents: 627
diff changeset
19 #DEFINE switch_right2 PORTB,0 ; switch
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
20 #DEFINE mcp_power PORTB,2 ; RX power supply
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
21 #DEFINE s8_npower PORTB,3 ; power supply for S8 bulkhead (inverted)
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
22 #DEFINE LEDg PORTB,4 ; LED green / active_reset_ostc_rx (<- do no longer use this LED unless for debugging)
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
23 #DEFINE active_reset_ostc_rx PORTB,4 ; set to 1 to hold RX circuity in reset
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
24 #DEFINE tft_power PORTB,5 ; via P-MOSFET (inverted)
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
25 #DEFINE icsp_clk PORTB,6 ; ICSP
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
26 #DEFINE icsp_dat PORTB,7 ; ICSP
0
heinrichsweikamp
parents:
diff changeset
27 ; TRIS=b'00001011'
heinrichsweikamp
parents:
diff changeset
28
heinrichsweikamp
parents:
diff changeset
29 ; PORTC
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
30 #DEFINE SOSC_RC0 PORTC,0 ; SOSC
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
31 #DEFINE SOSC_RC1 PORTC,1 ; SOSC
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
32 #DEFINE TFT_PWM PORTC,2 ; TFT backlight
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
33 #DEFINE I2C_RC3 PORTC,3 ; I²C
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
34 #DEFINE I2C_RC4 PORTC,4 ; I²C
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
35 #DEFINE MS5541_mosi PORTC,5 ; MS5541
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
36 #DEFINE uart1_RC6 PORTC,6 ; UART1 (USB/BLE)
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
37 #DEFINE uart1_RC7 PORTC,7 ; UART1 (USB/BLE)
0
heinrichsweikamp
parents:
diff changeset
38 ; TRIS=b'10011010'
heinrichsweikamp
parents:
diff changeset
39
heinrichsweikamp
parents:
diff changeset
40 ; PORTD
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
41 #DEFINE tft_cs PORTD,0 ; /CS
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
42 #DEFINE tft_rs PORTD,1 ; RS
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
43 #DEFINE tft_nwr PORTD,2 ; /WR
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
44 #DEFINE tft_rd PORTD,3 ; RD
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
45 #DEFINE flash_mosi PORTD,4 ; MOSI
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
46 #DEFINE flash_miso PORTD,5 ; MISO
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
47 #DEFINE flash_clk PORTD,6 ; CLK
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
48 #DEFINE tft_nreset PORTD,7 ; /RESET
0
heinrichsweikamp
parents:
diff changeset
49 ; TRIS=b'00100000'
heinrichsweikamp
parents:
diff changeset
50
heinrichsweikamp
parents:
diff changeset
51 ; PORTE
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
52 #DEFINE RE0_unused PORTE,0 ; unused
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
53 #DEFINE ir_power PORTE,1 ; power supply for IR
623
c40025d8e750 3.03 beta released
heinrichsweikamp
parents: 604
diff changeset
54 #DEFINE charge_disable PORTE,2 ; ex. mcp_ncs (RX /CS) (available from hardware rev x.x only)
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
55 #DEFINE LEDr PORTE,3 ; LED red
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
56 #DEFINE power_sw2 PORTE,4 ; power supply for switch1 circuit
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
57 #DEFINE RE5_unused PORTE,5 ; unused
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
58 #DEFINE lightsen_power PORTE,6 ; power supply for lightsensor
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
59 #DEFINE flash_ncs PORTE,7 ; /CS
0
heinrichsweikamp
parents:
diff changeset
60 ; TRIS=b'00000000'
623
c40025d8e750 3.03 beta released
heinrichsweikamp
parents: 604
diff changeset
61 #DEFINE charge_enable TRISE,2 ; tristating of charge_disable pin
0
heinrichsweikamp
parents:
diff changeset
62
heinrichsweikamp
parents:
diff changeset
63 ; PORTF
623
c40025d8e750 3.03 beta released
heinrichsweikamp
parents: 604
diff changeset
64 ; PORTF,1 ; (AN6, Batt_analog)
c40025d8e750 3.03 beta released
heinrichsweikamp
parents: 604
diff changeset
65 ; PORTF,2 ; (AN7, Lightsensor)
209
56276a2418f9 cleanup
heinrichsweikamp
parents: 113
diff changeset
66 ; TRIS=b'01111110'
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
67 #DEFINE NRTS PORTF,6 ; I
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
68 #DEFINE NCTS PORTF,7 ; 0
0
heinrichsweikamp
parents:
diff changeset
69
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
70 ; PORTG
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
71 #DEFINE TX3_PIEZO_CFG PORTG,0
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
72 #DEFINE RG1_blocked_by_RS232_2 PORTG,1 ; unused
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
73 #DEFINE tsop_rx PORTG,2 ; IR (RX2)
623
c40025d8e750 3.03 beta released
heinrichsweikamp
parents: 604
diff changeset
74 ; PORTG,3 ; (AN17, RSSI RX)
c40025d8e750 3.03 beta released
heinrichsweikamp
parents: 604
diff changeset
75 ; PORTG,4 ; (32768Hz Clock out)
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
76 #DEFINE RG5_unused PORTG,5 ; /MCLR
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
77 #DEFINE RG6_unused PORTG,6 ; unavailable
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
78 #DEFINE RG7_unused PORTG,7 ; unavailable
0
heinrichsweikamp
parents:
diff changeset
79 ; TRIS=b'10001111'
heinrichsweikamp
parents:
diff changeset
80
heinrichsweikamp
parents:
diff changeset
81 ; PORTJ
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
82 #DEFINE RJ0_unused PORTJ,0 ; unused
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
83 #DEFINE RJ1_unused PORTJ,1 ; unused
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
84 #DEFINE CHRG_OUT PORTJ,2 ; CHRG_OUT
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
85 #DEFINE CHRG_IN PORTJ,3 ; CHRG_IN
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
86 #DEFINE vusb_in PORTJ,4 ; external power supply detect, USB enumerated
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
87 #DEFINE power_sw1 PORTJ,5 ; power supply for switch2 circuit
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
88 #DEFINE MS5541_clk PORTJ,6 ; MS5541
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 560
diff changeset
89 #DEFINE MS5541_miso PORTJ,7 ; MS5541
0
heinrichsweikamp
parents:
diff changeset
90 ; TRIS=b'10010000'
heinrichsweikamp
parents:
diff changeset
91