Mercurial > public > hwos_code
annotate src/isr.asm @ 618:7b3903536213
work on new battery menu
author | heinrichsweikamp |
---|---|
date | Mon, 04 Feb 2019 22:57:24 +0100 |
parents | d866684249bd |
children | 1ad0531e9078 |
rev | line source |
---|---|
0 | 1 ;============================================================================= |
2 ; | |
608 | 3 ; File isr.asm REFACTORED VERSION V2.99f |
0 | 4 ; |
5 ; INTERUPT subroutines | |
6 ; | |
7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. | |
8 ;============================================================================= | |
9 ; HISTORY | |
10 ; 2011-05-24 : [jDG] Cleanups from initial Matthias code. | |
11 | |
275 | 12 #include "hwos.inc" |
582 | 13 #include "shared_definitions.h" ; Mailbox from/to p2_deco.c |
0 | 14 #include "ms5541.inc" |
15 #include "adc_lightsensor.inc" | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
16 #include "eeprom_rs232.inc" |
0 | 17 |
18 ;============================================================================= | |
19 | |
582 | 20 extern start |
0 | 21 |
604 | 22 isr_high CODE 0x0008 ; high priority interrupts |
582 | 23 bra HighInt |
24 nop | |
25 nop | |
26 nop | |
27 nop | |
28 nop | |
29 nop | |
30 bra HighInt | |
0 | 31 |
604 | 32 isr_low CODE 0x00018 ; low priority interrupts |
0 | 33 ; *** low priority interrupts not used |
604 | 34 retfie FAST ; restores BSR, STATUS and WREG |
0 | 35 |
36 HighInt: | |
582 | 37 movff PRODL,isr_prod+0 |
38 movff PRODH,isr_prod+1 | |
0 | 39 |
582 | 40 ; Buttons |
604 | 41 btfsc PIR1,TMR1IF ; timer 1 INT (button hold-down timer) |
582 | 42 rcall timer1int |
604 | 43 btfsc INTCON,INT0IF ; buttons |
582 | 44 rcall isr_switch_right |
604 | 45 btfsc INTCON3,INT1IF ; buttons |
582 | 46 rcall isr_switch_left |
0 | 47 |
582 | 48 ; IR/S8 link timer int |
604 | 49 btfsc PIR3,RC2IF ; UART 2 |
50 rcall isr_uart2 ; IR/S8 link | |
51 btfsc PIR2,TMR3IF ; timer 3 | |
52 rcall isr_timer3 ; IR-Link timeout | |
113 | 53 |
582 | 54 ; Pressure sensor and others |
604 | 55 btfsc PIR5,TMR7IF ; timer 7 |
56 rcall isr_tmr7 ; every 62.5ms | |
113 | 57 |
582 | 58 ; RTCC |
604 | 59 btfsc PIR3,RTCCIF ; real-time-clock interrupt |
60 rcall isr_rtcc ; may return in bank common! | |
0 | 61 |
582 | 62 movff isr_prod+1,PRODH |
63 movff isr_prod+0,PRODL | |
604 | 64 retfie FAST ; restores BSR, STATUS and WREG |
0 | 65 |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
66 isr_set_speed_to_normal: |
582 | 67 ; Set speed to normal |
68 movlw b'01110010' | |
604 | 69 movwf OSCCON ; 16 MHz INTOSC |
582 | 70 movlw b'00000000' |
604 | 71 movwf OSCTUNE ; 4x PLL disable (bit 6) - only works with 8 or 16 MHz (=32 or 64 MHz) |
72 movlw T2CON_NORMAL | |
582 | 73 movwf T2CON |
74 btfss OSCCON,HFIOFS | |
604 | 75 bra $-2 ; wait until clock is stable |
582 | 76 return |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
77 |
604 | 78 isr_dimm_tft: ; adjust until max_CCPR1L=CCPR1L |
582 | 79 banksel common |
604 | 80 btfsc tft_is_dimming ; ignore while dimming |
582 | 81 return |
82 banksel isr_backup | |
83 movf max_CCPR1L,W | |
604 | 84 cpfsgt CCPR1L ; CCPR1L > max_CCPR1L ? |
85 bra isr_dimm_tft2 ; NO - dimm up | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
86 ; dimm down |
582 | 87 decf CCPR1L,F ; -1 |
88 return | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
89 isr_dimm_tft2: |
582 | 90 movf max_CCPR1L,W |
91 sublw ambient_light_min_eco | |
604 | 92 cpfsgt CCPR1L ; CCPR1L > max_CCPR1L-ambient_light_min_eco ? |
93 bra isr_dimm_tft3 ; NO - dimm up slow | |
582 | 94 ; dimm up faster |
95 movlw .10 | |
96 addwf CCPR1L,F | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
97 isr_dimm_tft3: |
582 | 98 incf CCPR1L,F ; +1 |
99 return | |
100 nop | |
101 nop ; block flash here | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
102 |
604 | 103 isr_restore CODE 0x00080 ; restore first flash page from EEPROM |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
104 restore_flash_0x00080: |
582 | 105 goto restore_flash |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
106 |
604 | 107 isr_routines ; CODE |
0 | 108 ;============================================================================= |
109 | |
604 | 110 isr_uart2: ; IR/S8 link |
582 | 111 banksel RCREG2 |
112 movf RCREG2,W | |
604 | 113 bcf RCSTA2,CREN ; clear receiver status |
582 | 114 bsf RCSTA2,CREN |
115 banksel isr_backup | |
604 | 116 incf ir_s8_counter,F ; increase counter |
117 movff ir_s8_counter,isr1_temp ; copy | |
582 | 118 dcfsnz isr1_temp,F |
119 movwf ir_s8_buffer+.0 | |
120 dcfsnz isr1_temp,F | |
121 movwf ir_s8_buffer+.1 | |
122 dcfsnz isr1_temp,F | |
123 movwf ir_s8_buffer+.2 | |
124 dcfsnz isr1_temp,F | |
125 movwf ir_s8_buffer+.3 | |
126 dcfsnz isr1_temp,F | |
127 movwf ir_s8_buffer+.4 | |
128 dcfsnz isr1_temp,F | |
129 movwf ir_s8_buffer+.5 | |
130 dcfsnz isr1_temp,F | |
131 movwf ir_s8_buffer+.6 | |
132 dcfsnz isr1_temp,F | |
133 movwf ir_s8_buffer+.7 | |
134 dcfsnz isr1_temp,F | |
135 movwf ir_s8_buffer+.8 | |
136 dcfsnz isr1_temp,F | |
137 movwf ir_s8_buffer+.9 | |
138 dcfsnz isr1_temp,F | |
139 movwf ir_s8_buffer+.10 | |
140 dcfsnz isr1_temp,F | |
141 movwf ir_s8_buffer+.11 | |
142 dcfsnz isr1_temp,F | |
143 movwf ir_s8_buffer+.12 | |
144 dcfsnz isr1_temp,F | |
145 movwf ir_s8_buffer+.13 | |
146 dcfsnz isr1_temp,F | |
147 movwf ir_s8_buffer+.14 | |
148 dcfsnz isr1_temp,F | |
149 movwf ir_s8_buffer+.15 | |
150 dcfsnz isr1_temp,F | |
151 movwf ir_s8_buffer+.16 | |
152 dcfsnz isr1_temp,F | |
153 movwf ir_s8_buffer+.17 | |
113 | 154 |
604 | 155 clrf TMR3L ; preload timer |
582 | 156 movlw .253 |
157 movwf TMR3H | |
604 | 158 bsf T3CON,TMR3ON ; (re)start timeout counter |
582 | 159 return |
0 | 160 |
604 | 161 isr_timer3: ; IR/S8 link timeout |
162 bcf T3CON,TMR3ON ; stop timer 3 | |
163 banksel isr_backup ; select bank 0 for ISR data | |
582 | 164 movlw .15 |
604 | 165 cpfseq ir_s8_counter ; got exactly 15 bytes? |
166 bra isr_timer3_1 ; NO - test for 16bytes | |
167 bra isr_timer3_ir ; YES - got 15 bytes, compute local checksum | |
0 | 168 isr_timer3_1: |
582 | 169 movlw .16 |
604 | 170 cpfseq ir_s8_counter ; got exactly 16 bytes? |
171 bra isr_timer3_2 ; NO - test for 17 bytes | |
172 tstfsz ir_s8_buffer+.15 ; YES - last byte = 0x00 ? | |
173 bra isr_timer3_exit ; No - exit | |
174 bra isr_timer3_ir ; YES - got 16 bytes, compute local checksum | |
113 | 175 isr_timer3_2: |
582 | 176 movlw .17 |
604 | 177 cpfseq ir_s8_counter ; got exactly 17 bytes? |
178 bra isr_timer3_exit ; NO - exit | |
179 bra isr_timer3_s8 ; YES - S8 data | |
0 | 180 |
582 | 181 isr_timer3_ir: ; IR input |
182 movff ir_s8_buffer+.0,PRODL | |
183 clrf PRODH | |
184 movf ir_s8_buffer+.1,W | |
185 rcall isr_timer3_checksum | |
186 movf ir_s8_buffer+.2,W | |
187 rcall isr_timer3_checksum | |
188 movf ir_s8_buffer+.3,W | |
189 rcall isr_timer3_checksum | |
190 movf ir_s8_buffer+.4,W | |
191 rcall isr_timer3_checksum | |
192 movf ir_s8_buffer+.5,W | |
193 rcall isr_timer3_checksum | |
194 movf ir_s8_buffer+.6,W | |
195 rcall isr_timer3_checksum | |
196 movf ir_s8_buffer+.7,W | |
197 rcall isr_timer3_checksum | |
198 movf ir_s8_buffer+.8,W | |
199 rcall isr_timer3_checksum | |
200 movf ir_s8_buffer+.9,W | |
201 rcall isr_timer3_checksum | |
202 movf ir_s8_buffer+.10,W | |
203 rcall isr_timer3_checksum | |
204 movf ir_s8_buffer+.11,W | |
205 rcall isr_timer3_checksum | |
206 movf ir_s8_buffer+.12,W | |
207 rcall isr_timer3_checksum | |
0 | 208 |
582 | 209 ; Compare checksum |
210 movf ir_s8_buffer+.13,W | |
604 | 211 cpfseq PRODL ; checksum ok? |
212 bra isr_timer3_exit ; NO - exit | |
582 | 213 movf ir_s8_buffer+.14,W |
604 | 214 cpfseq PRODH ; checksum ok? |
215 bra isr_timer3_exit ; NO - exit | |
0 | 216 |
582 | 217 ; Checksum OK, copy results |
218 movff ir_s8_buffer+.1,hud_status_byte | |
219 movff ir_s8_buffer+.2,o2_mv_sensor1+0 | |
220 movff ir_s8_buffer+.3,o2_mv_sensor1+1 | |
221 movff ir_s8_buffer+.4,o2_mv_sensor2+0 | |
222 movff ir_s8_buffer+.5,o2_mv_sensor2+1 | |
223 movff ir_s8_buffer+.6,o2_mv_sensor3+0 | |
224 movff ir_s8_buffer+.7,o2_mv_sensor3+1 | |
225 movff ir_s8_buffer+.8,o2_ppo2_sensor1 | |
226 movff ir_s8_buffer+.9,o2_ppo2_sensor2 | |
227 movff ir_s8_buffer+.10,o2_ppo2_sensor3 | |
228 movff ir_s8_buffer+.11,hud_battery_mv+0 | |
229 movff ir_s8_buffer+.12,hud_battery_mv+1 | |
0 | 230 |
604 | 231 movlw ir_timeout_value ; multiples of 62.5 ms |
232 movwf ir_s8_timeout ; reload timeout | |
227
03946aa48fa5
NEW: Support for hwHUD without the LED module
heinrichsweikamp
parents:
204
diff
changeset
|
233 |
582 | 234 banksel hud_status_byte |
604 | 235 bsf hud_connection_ok ; set manually for hwHUD w/o the HUD module... |
236 banksel isr_backup ; select bank 0 for ISR data | |
582 | 237 |
0 | 238 isr_timer3_exit: |
604 | 239 clrf ir_s8_counter ; clear pointer |
240 bcf PIR2,TMR3IF ; clear flag | |
582 | 241 return |
0 | 242 |
243 isr_timer3_checksum: | |
582 | 244 addwf PRODL,F |
245 movlw .0 | |
246 addwfc PRODH,F | |
247 return | |
0 | 248 |
582 | 249 isr_timer3_s8: ; S8 input |
250 movff ir_s8_buffer+.0,PRODL | |
251 clrf PRODH | |
252 movf ir_s8_buffer+.1,W | |
253 rcall isr_timer3_checksum | |
254 movf ir_s8_buffer+.2,W | |
255 rcall isr_timer3_checksum | |
256 movf ir_s8_buffer+.3,W | |
257 rcall isr_timer3_checksum | |
258 movf ir_s8_buffer+.4,W | |
259 rcall isr_timer3_checksum | |
260 movf ir_s8_buffer+.5,W | |
261 rcall isr_timer3_checksum | |
262 movf ir_s8_buffer+.6,W | |
263 rcall isr_timer3_checksum | |
264 movf ir_s8_buffer+.7,W | |
265 rcall isr_timer3_checksum | |
266 movf ir_s8_buffer+.8,W | |
267 rcall isr_timer3_checksum | |
268 movf ir_s8_buffer+.9,W | |
269 rcall isr_timer3_checksum | |
270 movf ir_s8_buffer+.10,W | |
271 rcall isr_timer3_checksum | |
272 movf ir_s8_buffer+.11,W | |
273 rcall isr_timer3_checksum | |
274 movf ir_s8_buffer+.12,W | |
275 rcall isr_timer3_checksum | |
276 movf ir_s8_buffer+.13,W | |
277 rcall isr_timer3_checksum | |
278 movf ir_s8_buffer+.14,W | |
279 rcall isr_timer3_checksum | |
113 | 280 |
582 | 281 ; Compare checksum |
282 movf ir_s8_buffer+.15,W | |
604 | 283 cpfseq PRODL ; checksum ok? |
284 bra isr_timer3_exit ; NO - exit | |
582 | 285 movf ir_s8_buffer+.16,W |
604 | 286 cpfseq PRODH ; checksum ok? |
287 bra isr_timer3_exit ; NO - exit | |
113 | 288 |
582 | 289 ; Checksum OK, copy results |
290 movff ir_s8_buffer+.3,hud_status_byte | |
291 movff ir_s8_buffer+.13,hud_battery_mv+0 | |
292 movff ir_s8_buffer+.14,hud_battery_mv+1 | |
113 | 293 |
582 | 294 banksel common |
604 | 295 btfsc new_s8_data_available ; =1: old data already processed? |
296 bra isr_timer3_skip ; NO - skip copying new results | |
113 | 297 |
582 | 298 movff ir_s8_buffer+.6,s8_rawdata_sensor1+2 |
299 movff ir_s8_buffer+.5,s8_rawdata_sensor1+1 | |
300 movff ir_s8_buffer+.4,s8_rawdata_sensor1+0 | |
301 movff ir_s8_buffer+.9,s8_rawdata_sensor2+2 | |
302 movff ir_s8_buffer+.8,s8_rawdata_sensor2+1 | |
303 movff ir_s8_buffer+.7,s8_rawdata_sensor2+0 | |
304 movff ir_s8_buffer+.12,s8_rawdata_sensor3+2 | |
305 movff ir_s8_buffer+.11,s8_rawdata_sensor3+1 | |
306 movff ir_s8_buffer+.10,s8_rawdata_sensor3+0 | |
307 banksel common | |
308 bsf new_s8_data_available ; set flag | |
268
29acdb601548
BUGFIX: Increase timing tolerance for S8 HUD (cR only)
heinrichsweikamp
parents:
236
diff
changeset
|
309 |
29acdb601548
BUGFIX: Increase timing tolerance for S8 HUD (cR only)
heinrichsweikamp
parents:
236
diff
changeset
|
310 isr_timer3_skip: |
582 | 311 banksel ir_s8_timeout |
604 | 312 movlw ir_timeout_value ; multiples of 62.5ms |
313 movwf ir_s8_timeout ; reload timeout | |
314 bra isr_timer3_exit ; exit | |
113 | 315 |
316 | |
0 | 317 ;============================================================================= |
318 | |
604 | 319 isr_tmr7: ; each 62.5ms |
582 | 320 bcf PIR5,TMR7IF ; clear flag |
604 | 321 banksel 0xF16 ; addresses F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM |
469 | 322 movlw .248 |
604 | 323 movwf TMR7H ; rollover after 2048 cycles -> 62.5ms |
0 | 324 |
582 | 325 banksel common |
604 | 326 call get_analog_switches ; get analog readings |
448 | 327 btfss INTCON3,INT1IE |
582 | 328 bra isr_tmr7_a |
448 | 329 btfsc analog_sw2_pressed |
330 rcall isr_switch_left | |
331 isr_tmr7_a: | |
582 | 332 banksel common |
448 | 333 btfss INTCON,INT0IE |
582 | 334 bra isr_tmr7_b |
448 | 335 btfsc analog_sw1_pressed |
336 rcall isr_switch_right | |
337 isr_tmr7_b: | |
582 | 338 banksel common |
604 | 339 btfss no_sensor_int ; sensor interrupt (because it's addressed during sleep)? |
340 bra isr_tmr7_c ; NO - continue | |
341 banksel isr_backup ; YES - back to bank 0 ISR data | |
582 | 342 return |
490
8dfb93e80338
NEW: Deep Sleep mode for OSTC Plus and OSTC 2 (2017) (Entered automatically)
heinrichsweikamp
parents:
469
diff
changeset
|
343 isr_tmr7_c: |
8dfb93e80338
NEW: Deep Sleep mode for OSTC Plus and OSTC 2 (2017) (Entered automatically)
heinrichsweikamp
parents:
469
diff
changeset
|
344 banksel isr_backup |
604 | 345 movf max_CCPR1L,W ; dimm value |
582 | 346 cpfseq CCPR1L ; = current PWM value? |
604 | 347 rcall isr_dimm_tft ; NO - adjust until max_CCPR1L=CCPR1L |
582 | 348 |
349 banksel isr_backup | |
604 | 350 decfsz ir_s8_timeout,F ; IR data still valid? |
351 bra isr_tmr7_2 ; YES - continue | |
582 | 352 ; timeout, clear IR-Data |
0 | 353 |
604 | 354 movlw ir_timeout_value ; multiples of 62.5ms |
355 movwf ir_s8_timeout ; reload timeout | |
0 | 356 |
582 | 357 banksel common |
358 btfss analog_o2_input | |
604 | 359 bra isr_tmr7_1a ; always with normal ostc3 hardware |
582 | 360 btfss s8_digital |
361 bra isr_tmr7_2 ; only when digital | |
113 | 362 isr_tmr7_1a: |
604 | 363 clrf o2_mv_sensor1+0 ; S8/IR timeout clears all analog input readings to zero -> fallback will be triggered when sensor mode was used |
582 | 364 clrf o2_mv_sensor1+1 |
365 clrf o2_mv_sensor2+0 | |
366 clrf o2_mv_sensor2+1 | |
367 clrf o2_mv_sensor3+0 | |
368 clrf o2_mv_sensor3+1 | |
369 banksel hud_battery_mv | |
370 clrf hud_battery_mv+0 | |
371 clrf hud_battery_mv+1 | |
372 banksel hud_status_byte | |
373 clrf hud_status_byte | |
374 clrf o2_ppo2_sensor1 ; for IR/S8 UD | |
375 clrf o2_ppo2_sensor2 | |
376 clrf o2_ppo2_sensor3 | |
377 | |
570
c8ea60294175
react to external S8 HUD disconnect or failure in surface mode
heinrichsweikamp
parents:
565
diff
changeset
|
378 banksel common |
582 | 379 bsf new_s8_data_available ; set flag to update in surface mode |
380 | |
0 | 381 isr_tmr7_2: |
582 | 382 banksel common |
604 | 383 btfss no_sensor_int ; sensor interrupt (because it's addressed during sleep)? |
384 bra isr_sensor_state2 ; NO - continue | |
385 banksel isr_backup ; YES - back to Bank0 ISR data | |
582 | 386 return |
0 | 387 |
388 isr_sensor_state2: | |
582 | 389 banksel common |
390 movff sensor_state_counter,WREG | |
391 btfss WREG,0 ; every 1/4 second | |
604 | 392 bsf quarter_second_update ; set flag |
393 banksel isr_backup ; back to Bank0 ISR data | |
608 | 394 movlw d'2' ; coding for normal speed |
395 cpfseq cpu_speed_state ; CPU running on normal speed? | |
396 rcall isr_set_speed_to_normal ; NO - set CPU speed to normal | |
582 | 397 |
398 incf sensor_state_counter,F ; counts to eight for state machine | |
0 | 399 |
604 | 400 ; State 1: Clear flags and average registers, get temperature (51 us) and start pressure integration (73.5 us) |
401 ; State 2: Get pressure (51 us), start temperature integration (73.5 us) and calculate temperature compensated pressure (233 us) | |
402 ; State 3: Get temperature (51 us) and start pressure integration (73.5 us) | |
403 ; State 4: Get pressure (51 us), start temperature integration (73.5 us) and calculate temperature compensated pressure (233 us) | |
404 ; State 5: Get temperature (51 us) and start pressure integration (73.5 us) | |
405 ; State 6: Get pressure (51 us), start temperature integration (73.5 us) and calculate temperature compensated pressure (233 us) | |
406 ; State 7: Get temperature (51 us) and start pressure integration (73.5 us) | |
407 ; State 8: Get pressure (51 us), start temperature integration (73.5 us), calculate temperature compensated pressure (233 us) and build average for half-second update of temperature and pressure | |
582 | 408 |
409 movff sensor_state_counter,WREG ; WREG used as temp here... | |
410 dcfsnz WREG,F | |
604 | 411 bra sensor_int_state1_plus_restart ; do State 1 |
582 | 412 dcfsnz WREG,F |
604 | 413 bra sensor_int_state2 ; do State 2 |
582 | 414 dcfsnz WREG,F |
604 | 415 bra sensor_int_state1 ; do State 3 |
582 | 416 dcfsnz WREG,F |
604 | 417 bra sensor_int_state2 ; do State 4 |
582 | 418 dcfsnz WREG,F |
604 | 419 bra sensor_int_state1 ; do State 5 |
582 | 420 dcfsnz WREG,F |
604 | 421 bra sensor_int_state2 ; do State 6 |
582 | 422 dcfsnz WREG,F |
604 | 423 bra sensor_int_state1 ; do State 7 |
424 ; bra sensor_int2_plus_average ; do State 8 | |
0 | 425 ;sensor_int2_plus_average: |
582 | 426 ; First, do state2: |
604 | 427 call get_pressure_value ; state 2: get pressure (51 us) |
428 call get_temperature_start ; and start temperature integration (73.5 us) | |
429 call calculate_compensation ; calculate temperature compensated pressure (27 us) | |
0 | 430 ; Build average |
604 | 431 bcf STATUS,C ; clear carry bit |
582 | 432 rrcf amb_pressure_avg+1 ; amb_pressure sum / 2 |
433 rrcf amb_pressure_avg+0 | |
604 | 434 bcf STATUS,C ; clear carry bit, twice |
582 | 435 rrcf amb_pressure_avg+1 ; amb_pressure sum / 4 |
436 rrcf amb_pressure_avg+0 | |
0 | 437 |
582 | 438 movff amb_pressure_avg+1,amb_pressure+1 ; copy into actual register |
439 movff amb_pressure_avg+0,amb_pressure+0 | |
0 | 440 |
582 | 441 bcf STATUS,C |
604 | 442 btfsc temperature_avg+1,7 ; copy sign bit to carry |
582 | 443 bsf STATUS,C |
604 | 444 rrcf temperature_avg+1 ; signed temperature /2 |
582 | 445 rrcf temperature_avg+0 |
446 bcf STATUS,C | |
604 | 447 btfsc temperature_avg+1,7 ; copy sign bit to carry |
582 | 448 bsf STATUS,C |
604 | 449 rrcf temperature_avg+1 ; signed temperature /4 |
582 | 450 rrcf temperature_avg+0 |
0 | 451 |
582 | 452 movff temperature_avg+1,temperature+1 ; copy into actual register |
453 movff temperature_avg+0,temperature+0 | |
0 | 454 |
604 | 455 banksel common ; flag1 is in bank 1 |
456 bcf temp_changed ; clear flag for temperature update | |
457 bcf pressure_refresh ; clear flag for pressure update | |
458 banksel isr_backup ; back to bank 0 ISR data | |
0 | 459 |
582 | 460 ; Temp changed? |
461 movf temperature+0,W | |
462 cpfseq last_temperature+0 | |
604 | 463 bra isr_sensor_state2_2 ; YES |
582 | 464 movf temperature+1,W |
465 cpfseq last_temperature+1 | |
604 | 466 bra isr_sensor_state2_2 ; YES |
0 | 467 |
582 | 468 bra isr_sensor_state2_3 ; no change |
0 | 469 |
470 isr_sensor_state2_2: | |
604 | 471 banksel common ; flag1 is in bank 1 |
472 bsf temp_changed ; YES | |
473 banksel isr_backup ; back to bank 0 ISR data | |
0 | 474 isr_sensor_state2_3: |
604 | 475 movff temperature+0,last_temperature+0 ; copy for compare |
582 | 476 movff temperature+1,last_temperature+1 |
0 | 477 |
582 | 478 movf amb_pressure+0,W |
479 cpfseq last_pressure+0 | |
604 | 480 bra isr_sensor_state2_4 ; YES |
582 | 481 movf amb_pressure+1,W |
482 cpfseq last_pressure+1 | |
604 | 483 bra isr_sensor_state2_4 ; YES |
0 | 484 |
604 | 485 bra isr_sensor_state2_5 ; no change |
0 | 486 isr_sensor_state2_4: |
604 | 487 banksel common ; flag1 is in bank 1 |
488 bsf pressure_refresh ; YES | |
489 banksel isr_backup ; back to bank 0 ISR data | |
0 | 490 isr_sensor_state2_5: |
604 | 491 movff amb_pressure+0,last_pressure+0 ; copy for compare |
582 | 492 movff amb_pressure+1,last_pressure+1 |
0 | 493 |
604 | 494 clrf sensor_state_counter ; reset state counter |
495 banksel common ; flag2 is in bank 1 | |
582 | 496 btfss simulatormode_active ; are we in simulator mode? |
604 | 497 bra comp_air_pressure ; NO |
498 bsf pressure_refresh ; always set pressure_refresh flag in simulator mode | |
499 banksel isr_backup ; back to bank 0 ISR data | |
500 movlw LOW d'1000' ; simulate 1000 mbar surface pressure | |
582 | 501 movwf last_surfpressure+0 |
502 movlw HIGH d'1000' | |
503 movwf last_surfpressure+1 | |
0 | 504 |
505 comp_air_pressure: | |
604 | 506 banksel isr_backup ; back to bank 0 ISR data |
582 | 507 movf last_surfpressure+0,W ; compensate air pressure |
508 subwf amb_pressure+0,W | |
604 | 509 movwf rel_pressure+0 ; rel_pressure stores depth |
0 | 510 |
582 | 511 movf last_surfpressure+1,W |
512 subwfb amb_pressure+1,W | |
513 movwf rel_pressure+1 | |
604 | 514 btfss STATUS,N ; is result below zero? |
515 bra sensor_int_state_exit ; NO | |
516 clrf rel_pressure+0 ; YES - do not display negative depths | |
582 | 517 clrf rel_pressure+1 ; e.g. when surface air pressure dropped during the dive |
518 bra sensor_int_state_exit | |
0 | 519 |
520 sensor_int_state1_plus_restart: | |
582 | 521 clrf amb_pressure_avg+0 ; pressure average registers |
522 clrf amb_pressure_avg+1 | |
523 clrf temperature_avg+0 | |
524 clrf temperature_avg+1 | |
0 | 525 |
526 sensor_int_state1: | |
604 | 527 call get_temperature_value ; state 1: get temperature... |
528 call get_pressure_start ; ...and start pressure integration | |
582 | 529 bra sensor_int_state_exit |
0 | 530 |
531 sensor_int_state2: | |
604 | 532 call get_pressure_value ; state 2: get pressure (51 us)... |
533 call get_temperature_start ; ...and start temperature integration (73.5 us) | |
534 call calculate_compensation ; .. and calculate temperature compensated pressure (233 us) | |
582 | 535 ;bra sensor_int_state_exit |
536 | |
0 | 537 sensor_int_state_exit: |
604 | 538 rcall isr_restore_clock ; restore clock |
582 | 539 return |
540 | |
0 | 541 ;============================================================================= |
542 | |
543 isr_rtcc: ; each second | |
582 | 544 bcf PIR3,RTCCIF ; clear flag |
604 | 545 banksel 0xF16 ; addresses, F16h through F5Fh, are also used by SFRs, but are not part of the access RAM |
582 | 546 bsf RTCCFG,RTCPTR1 |
547 bsf RTCCFG,RTCPTR0 ; year | |
604 | 548 movff RTCVALL,year ; format is BCD |
582 | 549 movff RTCVALH,day ; dummy read |
604 | 550 movff RTCVALL,day ; format is BCD |
551 movff RTCVALH,month ; format is BCD | |
552 movff RTCVALL,hours ; format is BCD | |
553 movff RTCVALH,secs ; format is BCD | |
554 movff RTCVALL,secs ; format is BCD | |
555 movff RTCVALH,mins ; format is BCD | |
556 banksel isr_backup ; back to bank 0 ISR data | |
582 | 557 |
558 ; Convert BCD to DEC and set registers | |
559 movff mins, isr1_temp | |
604 | 560 rcall isr_rtcc_convert ; converts to dec with result in WREG |
582 | 561 movff WREG,mins |
562 movff secs, isr1_temp | |
604 | 563 rcall isr_rtcc_convert ; converts to dec with result in WREG |
582 | 564 movff WREG,secs |
565 movff hours, isr1_temp | |
604 | 566 rcall isr_rtcc_convert ; converts to dec with result in WREG |
582 | 567 movff WREG,hours |
568 movff month, isr1_temp | |
604 | 569 rcall isr_rtcc_convert ; converts to dec with result in WREG |
582 | 570 movff WREG,month |
571 movff day, isr1_temp | |
604 | 572 rcall isr_rtcc_convert ; converts to dec with result in WREG |
582 | 573 movff WREG,day |
574 movff year, isr1_temp | |
604 | 575 rcall isr_rtcc_convert ; converts to dec with result in WREG |
582 | 576 movff WREG,year |
0 | 577 |
578 ; Place once/second tasks for ISR here (Be sure of the right bank!) | |
604 | 579 banksel common ; flag1 is in bank 1 |
580 btfss sleepmode ; in sleepmode? | |
581 call get_ambient_level ; NO - get ambient light level and set max_CCPR1L | |
0 | 582 |
604 | 583 rcall isr_battery_gauge ; add amount of battery consumption to battery_gauge:6 |
0 | 584 |
582 | 585 ; update uptime |
586 banksel uptime+0 | |
587 incf uptime+0,F | |
588 movlw .0 | |
589 addwfc uptime+1,F | |
590 addwfc uptime+2,F | |
591 addwfc uptime+3,F | |
592 | |
604 | 593 banksel common ; flag1 is in bank 1 |
594 bsf onesecupdate ; a new second has begun | |
582 | 595 btfsc divemode ; in divemode? |
604 | 596 rcall isr_divemode_1sec ; YES - do some divemode stuff in bank common |
0 | 597 |
582 | 598 btfss divemode ; in divemode? |
604 | 599 rcall isr_update_lastdive_time ; NO - update the last dive timer |
453
b4f28ab23b87
NEW: Show Uptime (Time since last firmware boot) in information menu
heinrichsweikamp
parents:
451
diff
changeset
|
600 |
582 | 601 tstfsz secs ; secs == 0 ? |
604 | 602 return ; NO - done |
0 | 603 |
604 | 604 bsf oneminupdate ; a new minute has begun |
0 | 605 |
604 | 606 btfss divemode ; in Divemode? |
607 rcall check_nofly_desat_time ; NO - so increase interval | |
0 | 608 |
582 | 609 ; Check if a new hour has just begun |
604 | 610 tstfsz mins ; mins == 0 ? |
611 bra isr_rtcc2 ; NP | |
612 bsf onehourupdate ; YES - set flag | |
582 | 613 |
0 | 614 isr_rtcc2: |
604 | 615 banksel isr_backup ; back to bank 0 ISR data |
616 return ; done | |
0 | 617 |
582 | 618 isr_update_lastdive_time: ; called every second when not in divemode |
619 ; update uptime | |
620 banksel lastdive_time+0 | |
621 incf lastdive_time+0,F | |
622 movlw .0 | |
623 addwfc lastdive_time+1,F | |
624 addwfc lastdive_time+2,F | |
625 addwfc lastdive_time+3,F | |
626 banksel common | |
627 return | |
628 | |
629 isr_battery_gauge: | |
604 | 630 banksel isr_backup ; bank 0 ISR data |
631 movlw current_sleepmode ; 100µA/3600 -> nAs (sleepmode current) | |
632 movwf isr1_temp ; store value (low byte) | |
633 clrf isr2_temp ; high byte | |
0 | 634 |
604 | 635 banksel common ; flag1 is in bank 1 |
636 btfss sleepmode ; in sleepmode? | |
637 rcall isr_battery_gauge2 ; NO - compute current consumption value into isr1_temp and isr2_temp | |
582 | 638 |
604 | 639 banksel isr_backup ; bank 0 ISR data |
640 movf isr1_temp,W ; 48 Bit add of isr1_temp and isr2_temp into battery_gauge:6 | |
582 | 641 addwf battery_gauge+0,F |
642 movf isr2_temp,W | |
643 addwfc battery_gauge+1,F | |
644 movlw .0 | |
645 addwfc battery_gauge+2,F | |
646 addwfc battery_gauge+3,F | |
647 addwfc battery_gauge+4,F | |
648 addwfc battery_gauge+5,F | |
649 return | |
650 | |
0 | 651 isr_battery_gauge2: |
582 | 652 ; set consumption rate in nAs for an one second interval |
0 | 653 ; Example: |
582 | 654 ; movlw LOW .55556 ; 0,2A/3600*1e9s = nAs |
604 | 655 ; movwf isr1_temp ; low byte |
582 | 656 ; movlw HIGH .55556 ; 0,2A/3600*1e9s = nAs |
604 | 657 ; movwf isr2_temp ; high byte |
0 | 658 |
659 ; Current consumption for LED backlight is 47*CCPR1L+272 | |
582 | 660 movf CCPR1L,W |
661 mullw current_backlight_multi | |
662 movlw LOW current_backlight_offset | |
663 addwf PRODL,F | |
664 movlw HIGH current_backlight_offset | |
665 addwfc PRODH,F | |
666 movff PRODL,isr1_temp | |
667 movff PRODH,isr2_temp ; isr1_temp and isr2_temp hold value for backlight | |
0 | 668 |
669 ; Add current for CPU and GPU | |
608 | 670 ; cpu_speed_state=1: ECO (3.1mA -> 861nAs), =2: NORMAL (5.50mA -> 1528nAs) or =3: FASTEST (8.04mA -> 2233nAs) |
582 | 671 banksel isr_backup ; Bank0 ISR data |
672 movlw .1 | |
608 | 673 cpfseq cpu_speed_state |
582 | 674 bra isr_battery_gauge3 |
675 movlw LOW current_speed_eco | |
676 addwf isr1_temp,F | |
677 movlw HIGH current_speed_eco | |
678 addwfc isr2_temp,F | |
679 bra isr_battery_gauge5 | |
0 | 680 isr_battery_gauge3: |
582 | 681 movlw .2 |
608 | 682 cpfseq cpu_speed_state |
582 | 683 bra isr_battery_gauge4 |
684 movlw LOW current_speed_normal | |
685 addwf isr1_temp,F | |
686 movlw HIGH current_speed_normal | |
687 addwfc isr2_temp,F | |
688 bra isr_battery_gauge5 | |
0 | 689 isr_battery_gauge4: |
582 | 690 movlw LOW current_speed_fastest |
691 addwf isr1_temp,F | |
692 movlw HIGH current_speed_fastest | |
693 addwfc isr2_temp,F | |
0 | 694 isr_battery_gauge5: |
582 | 695 ; Add current if IR receiver is on |
696 btfss ir_power ; IR enabled? | |
604 | 697 bra isr_battery_gauge6 ; NO |
582 | 698 movlw LOW current_ir_receiver |
699 addwf isr1_temp,F | |
700 movlw HIGH current_ir_receiver | |
701 addwfc isr2_temp,F | |
0 | 702 isr_battery_gauge6: |
582 | 703 ; Add current for compass/accelerometer |
704 btfss compass_enabled ; compass active? | |
604 | 705 bra isr_battery_gauge7 ; NO |
582 | 706 movlw LOW current_compass |
707 addwf isr1_temp,F | |
708 movlw HIGH current_compass | |
709 addwfc isr2_temp,F | |
0 | 710 isr_battery_gauge7: |
582 | 711 return |
0 | 712 |
713 isr_divemode_1sec: | |
582 | 714 incf samplesecs,F ; "samplingrate" diving seconds done |
715 decf samplesecs_value,W ; holds "samplingrate" value (minus 1 into WREG) | |
604 | 716 cpfsgt samplesecs ; done? |
717 bra isr_divemode_1sec2 ; NO | |
0 | 718 |
582 | 719 clrf samplesecs ; clear counter... |
720 bsf store_sample ; ...and set bit for profile storage | |
0 | 721 isr_divemode_1sec2: |
604 | 722 ; increase total divetime (regardless of start_dive_threshold) |
582 | 723 infsnz total_divetime_seconds+0,F |
604 | 724 incf total_divetime_seconds+1,F ; total dive time (regardless of start_dive_threshold) |
582 | 725 |
726 btfss divemode2 ; displayed divetime is running? | |
604 | 727 return ; NO (e.g. too shallow) |
0 | 728 |
604 | 729 ; increase divetime registers (displayed dive time) |
582 | 730 incf divesecs,F |
731 movlw d'59' | |
732 cpfsgt divesecs | |
733 bra isr_divemode_1sec2a | |
734 | |
735 clrf divesecs | |
736 bsf realdive ; this bit is always set (again) if the dive is longer then one minute | |
737 infsnz divemins+0,F | |
738 incf divemins+1,F ; increase divemins | |
0 | 739 |
582 | 740 isr_divemode_1sec2a: |
604 | 741 btfss FLAG_apnoe_mode ; are we in apnoe mode? |
742 return ; NO | |
582 | 743 |
744 incf apnoe_secs,F ; increase descent registers | |
745 movlw d'59' | |
746 cpfsgt apnoe_secs ; full minute? | |
604 | 747 return ; NO |
582 | 748 clrf apnoe_secs |
749 incf apnoe_mins,F ; increase descent mins | |
750 return | |
0 | 751 |
752 ;============================================================================= | |
582 | 753 ; BCD to Binary conversion. |
0 | 754 ; Input: isr1_temp = Value in BCD |
755 ; Output WREG = value in binary. | |
756 isr_rtcc_convert: | |
582 | 757 swapf isr1_temp, W |
758 andlw 0x0F ; W = tens | |
759 rlncf WREG, W ; W = 2*tens | |
760 subwf isr1_temp, F ; 16*tens + ones - 2*tens | |
761 subwf isr1_temp, F ; 14*tens + ones - 2*tens | |
762 subwf isr1_temp, W ; 12*tens + ones - 2*tens | |
763 return | |
0 | 764 |
765 ;============================================================================= | |
766 | |
582 | 767 isr_switch_right: |
604 | 768 bcf INTCON,INT0IE ; disable INT0 |
769 banksel common ; flag1 is in bank 1 | |
582 | 770 btfss flip_screen ; 180° flipped? |
604 | 771 bsf switch_right ; set flag |
582 | 772 btfsc flip_screen ; 180° flipped? |
604 | 773 bsf switch_left ; set flag |
774 bra isr_switch_common ; continue... | |
0 | 775 |
582 | 776 isr_switch_left: |
604 | 777 bcf INTCON3,INT1IE ; disable INT1 |
778 banksel common ; flag1 is in bank 1 | |
582 | 779 btfss flip_screen ; 180° flipped? |
604 | 780 bsf switch_left ; set flag |
582 | 781 btfsc flip_screen ; 180° flipped? |
604 | 782 bsf switch_right ; set flag |
0 | 783 isr_switch_common: |
582 | 784 ; load timer1 for first press |
785 clrf TMR1L | |
604 | 786 movlw TMR1H_VALUE_FIRST ; in steps of 7.8125 ms |
582 | 787 movwf TMR1H |
604 | 788 bsf T1CON,TMR1ON ; start timer 1 |
789 banksel isr_backup ; select bank 0 for ISR data | |
790 bcf INTCON3,INT1IF ; clear flag | |
791 bcf INTCON,INT0IF ; clear flag | |
582 | 792 return |
0 | 793 |
794 timer1int: | |
604 | 795 bcf PIR1,TMR1IF ; clear flag |
796 banksel common ; flag1 is in bank 1 | |
797 bcf INTCON,INT0IF ; clear flag | |
798 bcf INTCON3,INT1IF ; clear flag | |
451 | 799 ; digital |
604 | 800 btfss switch_left1 ; left button hold-down? |
801 bra timer1int_left ; YES | |
802 btfss switch_right2 ; right button hold-down? | |
803 bra timer1int_right ; YES | |
582 | 804 |
451 | 805 ; Analog |
604 | 806 btfsc analog_sw2_pressed ; left button hold-down? |
807 bra timer1int_left ; YES | |
808 btfsc analog_sw1_pressed ; right button hold-down? | |
809 bra timer1int_right ; YES | |
582 | 810 |
811 ; No button hold-down, stop Timer 1 | |
604 | 812 bcf T1CON,TMR1ON ; stop timer 1 |
813 bsf INTCON,INT0IE ; enable INT0 | |
814 bsf INTCON3,INT1IE ; enable INT1 | |
451 | 815 return |
0 | 816 |
817 timer1int_left: | |
582 | 818 btfss flip_screen ; 180° flipped? |
604 | 819 bsf switch_left ; (re-)set flag |
582 | 820 btfsc flip_screen ; 180° flipped? |
604 | 821 bsf switch_right ; (re-)set flag |
822 bra timer1int_common ; continue | |
0 | 823 timer1int_right: |
582 | 824 btfss flip_screen ; 180° flipped? |
604 | 825 bsf switch_right ; set flag |
582 | 826 btfsc flip_screen ; 180° flipped? |
604 | 827 bsf switch_left ; set flag |
0 | 828 timer1int_common: |
582 | 829 ; load timer1 for next press |
830 clrf TMR1L | |
604 | 831 movlw TMR1H_VALUE_CONT ; surface mode |
582 | 832 btfsc divemode |
604 | 833 movlw TMR1H_VALUE_CONT_DIVE ; sive mode |
582 | 834 movwf TMR1H |
604 | 835 return ; return from timer1int with timer1 kept running |
0 | 836 |
837 ;============================================================================= | |
838 | |
582 | 839 check_nofly_desat_time: ; called every minute when not in divemode |
840 banksel int_O_desaturation_time | |
604 | 841 movf int_O_desaturation_time+0,W ; is Desat null ? |
582 | 842 iorwf int_O_desaturation_time+1,W |
604 | 843 bz check_nofly_desat_time_1 ; YES |
0 | 844 |
582 | 845 ; int_O_desaturation_time is only computed while in start, surface mode, menue_tree or ghostwriter. |
846 ; So the ISR may clock surface_interval past the actual surface interval time. But TFT_surface_lastdive | |
847 ; will check int_O_desaturation_time and in case int_O_desaturation_time is zero it will not show | |
848 ; surface_interval but lastdive_time instead. So this glitch remains invisible. | |
0 | 849 |
147 | 850 ; Increase surface interval timer |
582 | 851 banksel common |
852 infsnz surface_interval+0,F | |
853 incf surface_interval+1,F | |
604 | 854 return ; done |
0 | 855 |
582 | 856 check_nofly_desat_time_1: |
857 banksel common | |
858 clrf surface_interval+0 | |
604 | 859 clrf surface_interval+1 ; clear surface interval timer |
860 return ; done | |
0 | 861 |
862 ;============================================================================= | |
863 | |
864 isr_restore_clock: | |
608 | 865 movff cpu_speed_request,cpu_speed_state ; acknowledge CPU speed request |
582 | 866 banksel isr_backup |
867 movlw d'1' | |
608 | 868 cpfseq cpu_speed_request |
582 | 869 bra isr_restore_speed2 |
870 ; Reset to eco | |
871 movlw b'00000000' | |
604 | 872 movwf OSCTUNE ; 4x PLL Ddsable (Bit 6) - only works with 8 or 16MHz (=32 or 64MHz) |
582 | 873 movlw b'00110010' |
604 | 874 movwf OSCCON ; 1 MHz INTOSC |
582 | 875 movlw T2CON_ECO |
876 movwf T2CON | |
877 bra isr_restore_exit | |
0 | 878 isr_restore_speed2: |
582 | 879 movlw d'2' |
608 | 880 cpfseq cpu_speed_request |
582 | 881 bra isr_restore_speed3 |
0 | 882 ; Reset to normal |
582 | 883 movlw b'01110010' |
604 | 884 movwf OSCCON ; 16 MHz INTOSC |
582 | 885 movlw b'00000000' |
604 | 886 movwf OSCTUNE ; 4x PLL disable (Bit 6) - only works with 8 or 16MHz (=32 or 64MHz) |
582 | 887 movlw T2CON_NORMAL |
888 movwf T2CON | |
889 bra isr_restore_exit | |
0 | 890 isr_restore_speed3: |
891 ; Reset to fastest | |
604 | 892 movlw b'01110010' ; 16 MHz INTOSC |
582 | 893 movwf OSCCON |
894 movlw b'01000000' | |
604 | 895 movwf OSCTUNE ; 4x PLL enable (Bit 6) - only works with 8 or 16MHz (=32 or 64MHz) |
582 | 896 movlw T2CON_FASTEST |
897 movwf T2CON | |
898 ;bra isr_restore_exit | |
0 | 899 isr_restore_exit: |
582 | 900 btfss OSCCON,HFIOFS |
901 bra isr_restore_exit ; loop until PLL is stable | |
902 return | |
0 | 903 |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
904 |
604 | 905 restore_flash: ; restore first flash page from EEPROM |
582 | 906 banksel common |
907 ; Start address in internal flash | |
908 movlw 0x00 | |
909 movwf TBLPTRL | |
910 movwf TBLPTRH | |
911 movwf TBLPTRU | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
912 |
604 | 913 movlw b'10010100' ; setup erase |
914 rcall Write ; write | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
915 |
582 | 916 movlw .128 |
604 | 917 movwf lo ; byte counter |
582 | 918 clrf EEADR |
919 movlw .3 | |
604 | 920 movwf EEADRH ; setup backup address |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
921 |
604 | 922 TBLRD*- ; dummy read to be in 128 byte block |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
923 restore_flash_loop: |
582 | 924 call read_eeprom |
925 incf EEADR,F | |
926 movff EEDATA,TABLAT ; put 1 byte | |
604 | 927 tblwt+* ; table write with pre-increment |
928 decfsz lo,F ; 128 bytes done? | |
929 bra restore_flash_loop ; NO - loop | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
930 |
604 | 931 movlw b'10000100' ; setup writes |
932 rcall Write ; write | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
933 |
604 | 934 reset ; done, reset CPU |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
935 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
936 Write: |
604 | 937 movwf EECON1 ; type of memory to write in |
582 | 938 movlw 0x55 |
939 movwf EECON2 | |
940 movlw 0xAA | |
941 movwf EECON2 | |
604 | 942 bsf EECON1,WR ; write |
582 | 943 nop |
944 nop | |
945 return | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
946 |
582 | 947 END |