Mercurial > public > hwos_code
annotate src/isr.asm @ 592:05053910d668
BUGFIX: Re-enable Sensors after sleep in PSCR mode
author | heinrichsweikamp |
---|---|
date | Wed, 18 Apr 2018 17:03:52 +0200 |
parents | b455b31ce022 |
children | ca4556fb60b9 |
rev | line source |
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0 | 1 ;============================================================================= |
2 ; | |
582 | 3 ; File isr.asm REFACTORED VERSION V2.98 |
0 | 4 ; |
5 ; INTERUPT subroutines | |
6 ; | |
7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. | |
8 ;============================================================================= | |
9 ; HISTORY | |
10 ; 2011-05-24 : [jDG] Cleanups from initial Matthias code. | |
11 | |
275 | 12 #include "hwos.inc" |
582 | 13 #include "shared_definitions.h" ; Mailbox from/to p2_deco.c |
0 | 14 #include "ms5541.inc" |
15 #include "adc_lightsensor.inc" | |
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16 #include "eeprom_rs232.inc" |
0 | 17 |
18 ;============================================================================= | |
19 | |
582 | 20 extern start |
0 | 21 |
582 | 22 isr_high CODE 0x0008 ; High Priority Interrupts |
23 bra HighInt | |
24 nop | |
25 nop | |
26 nop | |
27 nop | |
28 nop | |
29 nop | |
30 bra HighInt | |
0 | 31 |
582 | 32 isr_low CODE 0x00018 ; Low Priority Interrupts |
0 | 33 ; *** low priority interrupts not used |
582 | 34 retfie FAST ; Restores BSR, STATUS and WREG |
0 | 35 |
36 HighInt: | |
582 | 37 movff PRODL,isr_prod+0 |
38 movff PRODH,isr_prod+1 | |
0 | 39 |
582 | 40 ; Buttons |
41 btfsc PIR1,TMR1IF ; Timer1 INT (Button hold-down Timer) | |
42 rcall timer1int | |
43 btfsc INTCON,INT0IF ; Buttons | |
44 rcall isr_switch_right | |
45 btfsc INTCON3,INT1IF ; Buttons | |
46 rcall isr_switch_left | |
0 | 47 |
582 | 48 ; IR/S8 link timer int |
49 btfsc PIR3,RC2IF ; UART2 | |
50 rcall isr_uart2 ; IR/S8-Link | |
51 btfsc PIR2,TMR3IF ; Timer 3 | |
52 rcall isr_timer3 ; IR-Link Timeout | |
113 | 53 |
582 | 54 ; Pressure sensor and others |
55 btfsc PIR5,TMR7IF ; Timer 7 | |
56 rcall isr_tmr7 ; Every 62,5ms | |
113 | 57 |
582 | 58 ; RTCC |
59 btfsc PIR3,RTCCIF ; Real-time-clock interrupt | |
60 rcall isr_rtcc ; May return in bank common! | |
0 | 61 |
582 | 62 movff isr_prod+1,PRODH |
63 movff isr_prod+0,PRODL | |
64 retfie FAST ; Restores BSR, STATUS and WREG | |
0 | 65 |
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66 isr_set_speed_to_normal: |
582 | 67 ; Set speed to normal |
68 movlw b'01110010' | |
69 movwf OSCCON ; 16MHz INTOSC | |
70 movlw b'00000000' | |
71 movwf OSCTUNE ; 4x PLL Disable (Bit6) - only works with 8 or 16MHz (=32 or 64MHz) | |
72 movlw b'00001101' ; 1:2 Postscaler, 1:4 Prescaler, Timer 2 start -> 1960Hz (no-flicker) | |
73 movwf T2CON | |
74 btfss OSCCON,HFIOFS | |
75 bra $-2 ; Wait until clock is stable | |
76 return | |
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77 |
582 | 78 isr_dimm_tft: ; Adjust until max_CCPR1L=CCPR1L ! |
79 banksel common | |
80 btfsc tft_is_dimming ; Ignore while dimming | |
81 return | |
82 banksel isr_backup | |
83 movf max_CCPR1L,W | |
84 cpfsgt CCPR1L ; CCPR1L>max_CCPR1L? | |
85 bra isr_dimm_tft2 ; No, dimm up | |
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86 ; dimm down |
582 | 87 decf CCPR1L,F ; -1 |
88 return | |
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89 isr_dimm_tft2: |
582 | 90 movf max_CCPR1L,W |
91 sublw ambient_light_min_eco | |
92 cpfsgt CCPR1L ; CCPR1L>max_CCPR1L-ambient_light_min_eco? | |
93 bra isr_dimm_tft3 ; No, dimm up slow | |
94 ; dimm up faster | |
95 movlw .10 | |
96 addwf CCPR1L,F | |
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97 isr_dimm_tft3: |
582 | 98 incf CCPR1L,F ; +1 |
99 return | |
100 nop | |
101 nop ; block flash here | |
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102 |
582 | 103 isr_restore CODE 0x00080 ; Restore first flash page from EEPROM |
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104 restore_flash_0x00080: |
582 | 105 goto restore_flash |
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106 |
582 | 107 isr_routines ; CODE |
0 | 108 ;============================================================================= |
109 | |
582 | 110 isr_uart2: ; IR/S8-Link |
111 banksel RCREG2 | |
112 movf RCREG2,W | |
113 bcf RCSTA2,CREN ; Clear receiver status | |
114 bsf RCSTA2,CREN | |
115 banksel isr_backup | |
116 incf ir_s8_counter,F ; Increase counter | |
117 movff ir_s8_counter,isr1_temp ; Copy | |
118 dcfsnz isr1_temp,F | |
119 movwf ir_s8_buffer+.0 | |
120 dcfsnz isr1_temp,F | |
121 movwf ir_s8_buffer+.1 | |
122 dcfsnz isr1_temp,F | |
123 movwf ir_s8_buffer+.2 | |
124 dcfsnz isr1_temp,F | |
125 movwf ir_s8_buffer+.3 | |
126 dcfsnz isr1_temp,F | |
127 movwf ir_s8_buffer+.4 | |
128 dcfsnz isr1_temp,F | |
129 movwf ir_s8_buffer+.5 | |
130 dcfsnz isr1_temp,F | |
131 movwf ir_s8_buffer+.6 | |
132 dcfsnz isr1_temp,F | |
133 movwf ir_s8_buffer+.7 | |
134 dcfsnz isr1_temp,F | |
135 movwf ir_s8_buffer+.8 | |
136 dcfsnz isr1_temp,F | |
137 movwf ir_s8_buffer+.9 | |
138 dcfsnz isr1_temp,F | |
139 movwf ir_s8_buffer+.10 | |
140 dcfsnz isr1_temp,F | |
141 movwf ir_s8_buffer+.11 | |
142 dcfsnz isr1_temp,F | |
143 movwf ir_s8_buffer+.12 | |
144 dcfsnz isr1_temp,F | |
145 movwf ir_s8_buffer+.13 | |
146 dcfsnz isr1_temp,F | |
147 movwf ir_s8_buffer+.14 | |
148 dcfsnz isr1_temp,F | |
149 movwf ir_s8_buffer+.15 | |
150 dcfsnz isr1_temp,F | |
151 movwf ir_s8_buffer+.16 | |
152 dcfsnz isr1_temp,F | |
153 movwf ir_s8_buffer+.17 | |
113 | 154 |
582 | 155 clrf TMR3L ; Preload timer |
156 movlw .253 | |
157 movwf TMR3H | |
158 bsf T3CON,TMR3ON ; (Re)Start Timeout counter | |
159 return | |
0 | 160 |
582 | 161 isr_timer3: ; IR/S8-Link Timeout |
162 bcf T3CON,TMR3ON ; Stop Timer3 | |
163 banksel isr_backup ; Select Bank0 for ISR data. | |
164 movlw .15 | |
165 cpfseq ir_s8_counter ; Got exact 15bytes? | |
166 bra isr_timer3_1 ; No, test for 16bytes | |
167 bra isr_timer3_ir ; Got 15 bytes, compute local checksum | |
0 | 168 isr_timer3_1: |
582 | 169 movlw .16 |
170 cpfseq ir_s8_counter ; Got exact 16bytes? | |
171 bra isr_timer3_2 ; No, test for 17bytes | |
172 tstfsz ir_s8_buffer+.15 ; Last byte=0x00 | |
173 bra isr_timer3_exit ; No, exit | |
174 bra isr_timer3_ir ; Got 16 bytes, compute local checksum | |
113 | 175 isr_timer3_2: |
582 | 176 movlw .17 |
177 cpfseq ir_s8_counter ; Got exact 17bytes? | |
178 bra isr_timer3_exit ; No, exit | |
179 bra isr_timer3_s8 ; S8 data | |
0 | 180 |
582 | 181 isr_timer3_ir: ; IR input |
182 movff ir_s8_buffer+.0,PRODL | |
183 clrf PRODH | |
184 movf ir_s8_buffer+.1,W | |
185 rcall isr_timer3_checksum | |
186 movf ir_s8_buffer+.2,W | |
187 rcall isr_timer3_checksum | |
188 movf ir_s8_buffer+.3,W | |
189 rcall isr_timer3_checksum | |
190 movf ir_s8_buffer+.4,W | |
191 rcall isr_timer3_checksum | |
192 movf ir_s8_buffer+.5,W | |
193 rcall isr_timer3_checksum | |
194 movf ir_s8_buffer+.6,W | |
195 rcall isr_timer3_checksum | |
196 movf ir_s8_buffer+.7,W | |
197 rcall isr_timer3_checksum | |
198 movf ir_s8_buffer+.8,W | |
199 rcall isr_timer3_checksum | |
200 movf ir_s8_buffer+.9,W | |
201 rcall isr_timer3_checksum | |
202 movf ir_s8_buffer+.10,W | |
203 rcall isr_timer3_checksum | |
204 movf ir_s8_buffer+.11,W | |
205 rcall isr_timer3_checksum | |
206 movf ir_s8_buffer+.12,W | |
207 rcall isr_timer3_checksum | |
0 | 208 |
582 | 209 ; Compare checksum |
210 movf ir_s8_buffer+.13,W | |
211 cpfseq PRODL ; Checksum ok? | |
212 bra isr_timer3_exit ; No, exit | |
213 movf ir_s8_buffer+.14,W | |
214 cpfseq PRODH ; Checksum ok? | |
215 bra isr_timer3_exit ; No, exit | |
0 | 216 |
582 | 217 ; Checksum OK, copy results |
218 movff ir_s8_buffer+.1,hud_status_byte | |
219 movff ir_s8_buffer+.2,o2_mv_sensor1+0 | |
220 movff ir_s8_buffer+.3,o2_mv_sensor1+1 | |
221 movff ir_s8_buffer+.4,o2_mv_sensor2+0 | |
222 movff ir_s8_buffer+.5,o2_mv_sensor2+1 | |
223 movff ir_s8_buffer+.6,o2_mv_sensor3+0 | |
224 movff ir_s8_buffer+.7,o2_mv_sensor3+1 | |
225 movff ir_s8_buffer+.8,o2_ppo2_sensor1 | |
226 movff ir_s8_buffer+.9,o2_ppo2_sensor2 | |
227 movff ir_s8_buffer+.10,o2_ppo2_sensor3 | |
228 movff ir_s8_buffer+.11,hud_battery_mv+0 | |
229 movff ir_s8_buffer+.12,hud_battery_mv+1 | |
0 | 230 |
582 | 231 movlw ir_timeout_value ; multiples of 62,5ms |
232 movwf ir_s8_timeout ; Reload timeout | |
227
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233 |
582 | 234 banksel hud_status_byte |
235 bsf hud_connection_ok ; Set manually for hwHUD w/o the HUD module... | |
236 banksel isr_backup ; Select Bank0 for ISR data. | |
237 | |
0 | 238 isr_timer3_exit: |
582 | 239 clrf ir_s8_counter ; Clear pointer |
240 bcf PIR2,TMR3IF ; Clear flag | |
241 return | |
0 | 242 |
243 isr_timer3_checksum: | |
582 | 244 addwf PRODL,F |
245 movlw .0 | |
246 addwfc PRODH,F | |
247 return | |
0 | 248 |
582 | 249 isr_timer3_s8: ; S8 input |
250 movff ir_s8_buffer+.0,PRODL | |
251 clrf PRODH | |
252 movf ir_s8_buffer+.1,W | |
253 rcall isr_timer3_checksum | |
254 movf ir_s8_buffer+.2,W | |
255 rcall isr_timer3_checksum | |
256 movf ir_s8_buffer+.3,W | |
257 rcall isr_timer3_checksum | |
258 movf ir_s8_buffer+.4,W | |
259 rcall isr_timer3_checksum | |
260 movf ir_s8_buffer+.5,W | |
261 rcall isr_timer3_checksum | |
262 movf ir_s8_buffer+.6,W | |
263 rcall isr_timer3_checksum | |
264 movf ir_s8_buffer+.7,W | |
265 rcall isr_timer3_checksum | |
266 movf ir_s8_buffer+.8,W | |
267 rcall isr_timer3_checksum | |
268 movf ir_s8_buffer+.9,W | |
269 rcall isr_timer3_checksum | |
270 movf ir_s8_buffer+.10,W | |
271 rcall isr_timer3_checksum | |
272 movf ir_s8_buffer+.11,W | |
273 rcall isr_timer3_checksum | |
274 movf ir_s8_buffer+.12,W | |
275 rcall isr_timer3_checksum | |
276 movf ir_s8_buffer+.13,W | |
277 rcall isr_timer3_checksum | |
278 movf ir_s8_buffer+.14,W | |
279 rcall isr_timer3_checksum | |
113 | 280 |
582 | 281 ; Compare checksum |
282 movf ir_s8_buffer+.15,W | |
283 cpfseq PRODL ; Checksum ok? | |
284 bra isr_timer3_exit ; No, exit | |
285 movf ir_s8_buffer+.16,W | |
286 cpfseq PRODH ; Checksum ok? | |
287 bra isr_timer3_exit ; No, exit | |
113 | 288 |
582 | 289 ; Checksum OK, copy results |
290 movff ir_s8_buffer+.3,hud_status_byte | |
291 movff ir_s8_buffer+.13,hud_battery_mv+0 | |
292 movff ir_s8_buffer+.14,hud_battery_mv+1 | |
113 | 293 |
582 | 294 banksel common |
295 btfsc new_s8_data_available ; =1: Old data already processed? | |
296 bra isr_timer3_skip ; No, skip copying new results | |
113 | 297 |
582 | 298 movff ir_s8_buffer+.6,s8_rawdata_sensor1+2 |
299 movff ir_s8_buffer+.5,s8_rawdata_sensor1+1 | |
300 movff ir_s8_buffer+.4,s8_rawdata_sensor1+0 | |
301 movff ir_s8_buffer+.9,s8_rawdata_sensor2+2 | |
302 movff ir_s8_buffer+.8,s8_rawdata_sensor2+1 | |
303 movff ir_s8_buffer+.7,s8_rawdata_sensor2+0 | |
304 movff ir_s8_buffer+.12,s8_rawdata_sensor3+2 | |
305 movff ir_s8_buffer+.11,s8_rawdata_sensor3+1 | |
306 movff ir_s8_buffer+.10,s8_rawdata_sensor3+0 | |
307 banksel common | |
308 bsf new_s8_data_available ; set flag | |
268
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309 |
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310 isr_timer3_skip: |
582 | 311 banksel ir_s8_timeout |
312 movlw ir_timeout_value ; multiples of 62,5ms | |
313 movwf ir_s8_timeout ; Reload timeout | |
314 bra isr_timer3_exit ; Exit | |
113 | 315 |
316 | |
0 | 317 ;============================================================================= |
318 | |
582 | 319 isr_tmr7: ; each 62,5ms |
320 bcf PIR5,TMR7IF ; clear flag | |
321 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM. | |
469 | 322 movlw .248 |
582 | 323 movwf TMR7H ; -> Rollover after 2048 cycles -> 62,5ms |
0 | 324 |
582 | 325 banksel common |
448 | 326 call get_analog_switches ; Get analog readings |
327 btfss INTCON3,INT1IE | |
582 | 328 bra isr_tmr7_a |
448 | 329 btfsc analog_sw2_pressed |
330 rcall isr_switch_left | |
331 isr_tmr7_a: | |
582 | 332 banksel common |
448 | 333 btfss INTCON,INT0IE |
582 | 334 bra isr_tmr7_b |
448 | 335 btfsc analog_sw1_pressed |
336 rcall isr_switch_right | |
337 isr_tmr7_b: | |
582 | 338 banksel common |
339 btfss no_sensor_int ; No sensor interrupt (because it's addressed during sleep) | |
340 bra isr_tmr7_c ; No, continue | |
341 banksel isr_backup ; Back to Bank0 ISR data | |
342 return | |
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343 isr_tmr7_c: |
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344 banksel isr_backup |
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345 movf max_CCPR1L,W ; Dimm value |
582 | 346 cpfseq CCPR1L ; = current PWM value? |
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347 rcall isr_dimm_tft ; No, adjust until max_CCPR1L=CCPR1L ! |
582 | 348 |
349 banksel isr_backup | |
350 decfsz ir_s8_timeout,F ; IR Data still valid? | |
351 bra isr_tmr7_2 ; Yes, continue | |
352 ; timeout, clear IR-Data | |
0 | 353 |
582 | 354 movlw ir_timeout_value ; multiples of 62,5ms |
355 movwf ir_s8_timeout ; Reload timeout | |
0 | 356 |
582 | 357 banksel common |
358 btfss analog_o2_input | |
359 bra isr_tmr7_1a ; Always with normal ostc3 hardware | |
360 btfss s8_digital | |
361 bra isr_tmr7_2 ; only when digital | |
113 | 362 isr_tmr7_1a: |
582 | 363 clrf o2_mv_sensor1+0 ; S8/IR timeout clears all analog input readings to zero -> Fallback will be triggered when sensor mode was used |
364 clrf o2_mv_sensor1+1 | |
365 clrf o2_mv_sensor2+0 | |
366 clrf o2_mv_sensor2+1 | |
367 clrf o2_mv_sensor3+0 | |
368 clrf o2_mv_sensor3+1 | |
369 banksel hud_battery_mv | |
370 clrf hud_battery_mv+0 | |
371 clrf hud_battery_mv+1 | |
372 banksel hud_status_byte | |
373 clrf hud_status_byte | |
374 clrf o2_ppo2_sensor1 ; for IR/S8 UD | |
375 clrf o2_ppo2_sensor2 | |
376 clrf o2_ppo2_sensor3 | |
377 | |
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378 banksel common |
582 | 379 bsf new_s8_data_available ; set flag to update in surface mode |
380 | |
0 | 381 isr_tmr7_2: |
582 | 382 banksel common |
383 btfss no_sensor_int ; No sensor interrupt (because it's addressed during sleep) | |
384 bra isr_sensor_state2 ; No, continue | |
385 banksel isr_backup ; Back to Bank0 ISR data | |
386 return | |
0 | 387 |
388 isr_sensor_state2: | |
582 | 389 banksel common |
390 movff sensor_state_counter,WREG | |
391 btfss WREG,0 ; every 1/4 second | |
392 bsf quarter_second_update ; Set flag | |
393 banksel isr_backup ; Back to Bank0 ISR data | |
394 movlw d'2' | |
395 cpfseq speed_setting ; Set to normal in case it's not already in normal speed mode | |
396 rcall isr_set_speed_to_normal | |
397 | |
398 incf sensor_state_counter,F ; counts to eight for state machine | |
0 | 399 |
400 ; State 1: Clear flags and average registers, get temperature (51us) and start pressure integration (73,5us) | |
401 ; State 2: Get pressure (51us), start temperature integration (73,5us) and calculate temperature compensated pressure (233us) | |
402 ; State 3: Get temperature (51us) and start pressure integration (73,5us) | |
403 ; State 4: Get pressure (51us), start temperature integration (73,5us) and calculate temperature compensated pressure (233us) | |
404 ; State 5: Get temperature (51us) and start pressure integration (73,5us) | |
405 ; State 6: Get pressure (51us), start temperature integration (73,5us) and calculate temperature compensated pressure (233us) | |
406 ; State 7: Get temperature (51us) and start pressure integration (73,5us) | |
407 ; State 8: Get pressure (51us), start temperature integration (73,5us), calculate temperature compensated pressure (233us) and build average for half-second update of tempperature and pressure | |
582 | 408 |
409 movff sensor_state_counter,WREG ; WREG used as temp here... | |
410 dcfsnz WREG,F | |
411 bra sensor_int_state1_plus_restart ; Do State 1 | |
412 dcfsnz WREG,F | |
413 bra sensor_int_state2 ; Do State 2 | |
414 dcfsnz WREG,F | |
415 bra sensor_int_state1 ; Do State 3 | |
416 dcfsnz WREG,F | |
417 bra sensor_int_state2 ; Do State 4 | |
418 dcfsnz WREG,F | |
419 bra sensor_int_state1 ; Do State 5 | |
420 dcfsnz WREG,F | |
421 bra sensor_int_state2 ; Do State 6 | |
422 dcfsnz WREG,F | |
423 bra sensor_int_state1 ; Do State 7 | |
424 ; bra sensor_int2_plus_average ; Do State 8 | |
0 | 425 ;sensor_int2_plus_average: |
582 | 426 ; First, do state2: |
427 call get_pressure_value ; State2: Get pressure (51us) | |
428 call get_temperature_start ; and start temperature integration (73,5us) | |
429 call calculate_compensation ; calculate temperature compensated pressure (27us) | |
0 | 430 ; Build average |
582 | 431 bcf STATUS,C ; clear carry bit. |
432 rrcf amb_pressure_avg+1 ; amb_pressure sum / 2 | |
433 rrcf amb_pressure_avg+0 | |
434 bcf STATUS,C ; clear carry bit, twice. | |
435 rrcf amb_pressure_avg+1 ; amb_pressure sum / 4 | |
436 rrcf amb_pressure_avg+0 | |
0 | 437 |
582 | 438 movff amb_pressure_avg+1,amb_pressure+1 ; copy into actual register |
439 movff amb_pressure_avg+0,amb_pressure+0 | |
0 | 440 |
582 | 441 bcf STATUS,C |
442 btfsc temperature_avg+1,7 ; Copy sign bit to carry | |
443 bsf STATUS,C | |
444 rrcf temperature_avg+1 ; Signed temperature /2 | |
445 rrcf temperature_avg+0 | |
446 bcf STATUS,C | |
447 btfsc temperature_avg+1,7 ; Copy sign bit to carry | |
448 bsf STATUS,C | |
449 rrcf temperature_avg+1 ; Signed temperature /4 | |
450 rrcf temperature_avg+0 | |
0 | 451 |
582 | 452 movff temperature_avg+1,temperature+1 ; copy into actual register |
453 movff temperature_avg+0,temperature+0 | |
0 | 454 |
582 | 455 banksel common ; flag1 is in Bank1 |
456 bcf temp_changed ; Clear flag for temperature update | |
457 bcf pressure_refresh ; Clear flag for pressure update | |
458 banksel isr_backup ; Back to Bank0 ISR data | |
0 | 459 |
582 | 460 ; Temp changed? |
461 movf temperature+0,W | |
462 cpfseq last_temperature+0 | |
463 bra isr_sensor_state2_2 ; Yes | |
464 movf temperature+1,W | |
465 cpfseq last_temperature+1 | |
466 bra isr_sensor_state2_2 ; Yes | |
0 | 467 |
582 | 468 bra isr_sensor_state2_3 ; no change |
0 | 469 |
470 isr_sensor_state2_2: | |
582 | 471 banksel common ; flag1 is in Bank1 |
472 bsf temp_changed ; Yes | |
473 banksel isr_backup ; Back to Bank0 ISR data | |
0 | 474 isr_sensor_state2_3: |
582 | 475 movff temperature+0,last_temperature+0 ; Copy for compare |
476 movff temperature+1,last_temperature+1 | |
0 | 477 |
582 | 478 movf amb_pressure+0,W |
479 cpfseq last_pressure+0 | |
480 bra isr_sensor_state2_4 ; Yes | |
481 movf amb_pressure+1,W | |
482 cpfseq last_pressure+1 | |
483 bra isr_sensor_state2_4 ; Yes | |
0 | 484 |
582 | 485 bra isr_sensor_state2_5 ; No change |
0 | 486 isr_sensor_state2_4: |
582 | 487 banksel common ; flag1 is in Bank1 |
488 bsf pressure_refresh ; Yes | |
489 banksel isr_backup ; Back to Bank0 ISR data | |
0 | 490 isr_sensor_state2_5: |
582 | 491 movff amb_pressure+0,last_pressure+0 ; Copy for compare |
492 movff amb_pressure+1,last_pressure+1 | |
0 | 493 |
582 | 494 clrf sensor_state_counter ; Then reset State counter |
495 banksel common ; flag2 is in Bank1 | |
496 btfss simulatormode_active ; are we in simulator mode? | |
497 bra comp_air_pressure ; no | |
498 ; Always set pressure_refresh flag in simulator mode | |
499 bsf pressure_refresh ; Yes | |
500 banksel isr_backup ; Back to Bank0 ISR data | |
501 movlw LOW d'1000' ; yes, so simulate 1000mbar surface pressure | |
502 movwf last_surfpressure+0 | |
503 movlw HIGH d'1000' | |
504 movwf last_surfpressure+1 | |
0 | 505 |
506 comp_air_pressure: | |
582 | 507 banksel isr_backup ; Back to Bank0 ISR data |
508 movf last_surfpressure+0,W ; compensate air pressure | |
509 subwf amb_pressure+0,W | |
510 movwf rel_pressure+0 ; rel_pressure stores depth! | |
0 | 511 |
582 | 512 movf last_surfpressure+1,W |
513 subwfb amb_pressure+1,W | |
514 movwf rel_pressure+1 | |
515 btfss STATUS,N ; result is below zero? | |
516 bra sensor_int_state_exit | |
517 clrf rel_pressure+0 ; Yes, do not display negative depths | |
518 clrf rel_pressure+1 ; e.g. when surface air pressure dropped during the dive | |
519 bra sensor_int_state_exit | |
0 | 520 |
521 sensor_int_state1_plus_restart: | |
582 | 522 clrf amb_pressure_avg+0 ; pressure average registers |
523 clrf amb_pressure_avg+1 | |
524 clrf temperature_avg+0 | |
525 clrf temperature_avg+1 | |
0 | 526 |
527 sensor_int_state1: | |
582 | 528 call get_temperature_value ; State 1: Get temperature |
529 call get_pressure_start ; and start pressure integration. | |
530 bra sensor_int_state_exit | |
0 | 531 |
532 sensor_int_state2: | |
582 | 533 call get_pressure_value ; State2: Get pressure (51us) |
534 call get_temperature_start ; and start temperature integration (73,5us) | |
535 call calculate_compensation ; calculate temperature compensated pressure (233us) | |
536 ;bra sensor_int_state_exit | |
537 | |
0 | 538 sensor_int_state_exit: |
582 | 539 rcall isr_restore_clock ; Restore clock |
540 return | |
541 | |
0 | 542 ;============================================================================= |
543 | |
544 isr_rtcc: ; each second | |
582 | 545 bcf PIR3,RTCCIF ; clear flag |
546 banksel 0xF16 ; Addresses, F16h through F5Fh, are also used by SFRs, but are not part of the Access RAM. | |
547 bsf RTCCFG,RTCPTR1 | |
548 bsf RTCCFG,RTCPTR0 ; year | |
549 movff RTCVALL,year ; format is BCD! | |
550 movff RTCVALH,day ; dummy read | |
551 movff RTCVALL,day ; format is BCD! | |
552 movff RTCVALH,month ; format is BCD! | |
553 movff RTCVALL,hours ; format is BCD! | |
554 movff RTCVALH,secs ; format is BCD! | |
555 movff RTCVALL,secs ; format is BCD! | |
556 movff RTCVALH,mins ; format is BCD! | |
557 banksel isr_backup ; Back to Bank0 ISR data | |
558 | |
559 ; Convert BCD to DEC and set registers | |
560 movff mins, isr1_temp | |
561 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
562 movff WREG,mins | |
563 movff secs, isr1_temp | |
564 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
565 movff WREG,secs | |
566 movff hours, isr1_temp | |
567 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
568 movff WREG,hours | |
569 movff month, isr1_temp | |
570 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
571 movff WREG,month | |
572 movff day, isr1_temp | |
573 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
574 movff WREG,day | |
575 movff year, isr1_temp | |
576 rcall isr_rtcc_convert ; Converts to dec with result in WREG | |
577 movff WREG,year | |
0 | 578 |
579 ; Place once/second tasks for ISR here (Be sure of the right bank!) | |
582 | 580 banksel common ; flag1 is in Bank1 |
581 btfss sleepmode ; in Sleepmode? | |
582 call get_ambient_level ; No, get ambient light level and set max_CCPR1L | |
0 | 583 |
582 | 584 rcall isr_battery_gauge ; Add amount of battery consumption to battery_gauge:6 |
0 | 585 |
582 | 586 ; update uptime |
587 banksel uptime+0 | |
588 incf uptime+0,F | |
589 movlw .0 | |
590 addwfc uptime+1,F | |
591 addwfc uptime+2,F | |
592 addwfc uptime+3,F | |
593 | |
594 banksel common ; flag1 is in Bank1 | |
595 bsf onesecupdate ; A new second has begun | |
596 btfsc divemode ; in divemode? | |
597 rcall isr_divemode_1sec ; Yes, do some divemode stuff in bank common | |
0 | 598 |
582 | 599 btfss divemode ; in divemode? |
600 rcall isr_update_lastdive_time ; No, update the lastdive timer | |
453
b4f28ab23b87
NEW: Show Uptime (Time since last firmware boot) in information menu
heinrichsweikamp
parents:
451
diff
changeset
|
601 |
582 | 602 tstfsz secs ; secs == 0 ? |
603 return ; No, Done. | |
0 | 604 |
582 | 605 bsf oneminupdate ; A new minute has begun |
0 | 606 |
582 | 607 btfss divemode ; In Divemode? |
608 rcall check_nofly_desat_time ; No, so increase interval | |
0 | 609 |
582 | 610 ; Check if a new hour has just begun |
611 tstfsz mins ; mins == 0? | |
612 bra isr_rtcc2 ; No | |
613 bsf onehourupdate ; Yes, set flag | |
614 | |
0 | 615 isr_rtcc2: |
582 | 616 banksel isr_backup ; Back to Bank0 ISR data |
617 return ; Done. | |
0 | 618 |
582 | 619 isr_update_lastdive_time: ; called every second when not in divemode |
620 ; update uptime | |
621 banksel lastdive_time+0 | |
622 incf lastdive_time+0,F | |
623 movlw .0 | |
624 addwfc lastdive_time+1,F | |
625 addwfc lastdive_time+2,F | |
626 addwfc lastdive_time+3,F | |
627 banksel common | |
628 return | |
629 | |
630 isr_battery_gauge: | |
631 banksel isr_backup ; Bank0 ISR data | |
632 movlw current_sleepmode ; 100µA/3600 -> nAs (Sleepmode current) | |
633 movwf isr1_temp ; Store value (low byte) | |
634 clrf isr2_temp ; High byte | |
0 | 635 |
582 | 636 banksel common ; flag1 is in Bank1 |
637 btfss sleepmode ; in Sleepmode? | |
638 rcall isr_battery_gauge2 ; No, compute current consumption value into isr1_temp and isr2_temp | |
639 | |
640 banksel isr_backup ; Bank0 ISR data | |
641 movf isr1_temp,W ; 48Bit add of isr1_temp and isr2_temp into battery_gauge:6 | |
642 addwf battery_gauge+0,F | |
643 movf isr2_temp,W | |
644 addwfc battery_gauge+1,F | |
645 movlw .0 | |
646 addwfc battery_gauge+2,F | |
647 addwfc battery_gauge+3,F | |
648 addwfc battery_gauge+4,F | |
649 addwfc battery_gauge+5,F | |
650 return | |
651 | |
0 | 652 isr_battery_gauge2: |
582 | 653 ; set consumption rate in nAs for an one second interval |
0 | 654 ; Example: |
582 | 655 ; movlw LOW .55556 ; 0,2A/3600*1e9s = nAs |
656 ; movwf isr1_temp ; Low byte | |
657 ; movlw HIGH .55556 ; 0,2A/3600*1e9s = nAs | |
658 ; movwf isr2_temp ; High byte | |
0 | 659 |
660 ; Current consumption for LED backlight is 47*CCPR1L+272 | |
582 | 661 movf CCPR1L,W |
662 mullw current_backlight_multi | |
663 movlw LOW current_backlight_offset | |
664 addwf PRODL,F | |
665 movlw HIGH current_backlight_offset | |
666 addwfc PRODH,F | |
667 movff PRODL,isr1_temp | |
668 movff PRODH,isr2_temp ; isr1_temp and isr2_temp hold value for backlight | |
0 | 669 |
670 ; Add current for CPU and GPU | |
671 ; speed_setting=1: ECO (3,1mA -> 861nAs), =2: NORMAL (5,50mA -> 1528nAs) or =3: FASTEST (8,04mA -> 2233nAs) | |
582 | 672 banksel isr_backup ; Bank0 ISR data |
673 movlw .1 | |
674 cpfseq speed_setting | |
675 bra isr_battery_gauge3 | |
676 movlw LOW current_speed_eco | |
677 addwf isr1_temp,F | |
678 movlw HIGH current_speed_eco | |
679 addwfc isr2_temp,F | |
680 bra isr_battery_gauge5 | |
0 | 681 isr_battery_gauge3: |
582 | 682 movlw .2 |
683 cpfseq speed_setting | |
684 bra isr_battery_gauge4 | |
685 movlw LOW current_speed_normal | |
686 addwf isr1_temp,F | |
687 movlw HIGH current_speed_normal | |
688 addwfc isr2_temp,F | |
689 bra isr_battery_gauge5 | |
0 | 690 isr_battery_gauge4: |
582 | 691 movlw LOW current_speed_fastest |
692 addwf isr1_temp,F | |
693 movlw HIGH current_speed_fastest | |
694 addwfc isr2_temp,F | |
0 | 695 isr_battery_gauge5: |
582 | 696 ; Add current if IR receiver is on |
697 btfss ir_power ; IR enabled? | |
698 bra isr_battery_gauge6 ; no | |
699 movlw LOW current_ir_receiver | |
700 addwf isr1_temp,F | |
701 movlw HIGH current_ir_receiver | |
702 addwfc isr2_temp,F | |
0 | 703 isr_battery_gauge6: |
582 | 704 ; Add current for compass/accelerometer |
705 btfss compass_enabled ; compass active? | |
706 bra isr_battery_gauge7 ; no | |
707 movlw LOW current_compass | |
708 addwf isr1_temp,F | |
709 movlw HIGH current_compass | |
710 addwfc isr2_temp,F | |
0 | 711 isr_battery_gauge7: |
582 | 712 return |
0 | 713 |
714 isr_divemode_1sec: | |
582 | 715 incf samplesecs,F ; "samplingrate" diving seconds done |
716 decf samplesecs_value,W ; holds "samplingrate" value (minus 1 into WREG) | |
717 cpfsgt samplesecs ; Done? | |
718 bra isr_divemode_1sec2 ; no | |
0 | 719 |
582 | 720 clrf samplesecs ; clear counter... |
721 bsf store_sample ; ...and set bit for profile storage | |
0 | 722 isr_divemode_1sec2: |
582 | 723 ; Increase re-setable average depth divetime counter |
724 infsnz average_divesecs+0,F ; increase stopwatch registers | |
725 incf average_divesecs+1,F ; increase stopwatch registers | |
726 ; Increase total divetime (Regardless of start_dive_threshold) | |
727 infsnz total_divetime_seconds+0,F | |
728 incf total_divetime_seconds+1,F ; Total dive time (Regardless of start_dive_threshold) | |
729 | |
730 btfss divemode2 ; displayed divetime is running? | |
731 return ; No (e.g. too shallow) | |
0 | 732 |
582 | 733 ; increase divetime registers (Displayed dive time) |
734 incf divesecs,F | |
735 movlw d'59' | |
736 cpfsgt divesecs | |
737 bra isr_divemode_1sec2a | |
738 | |
739 clrf divesecs | |
740 bsf realdive ; this bit is always set (again) if the dive is longer then one minute | |
741 infsnz divemins+0,F | |
742 incf divemins+1,F ; increase divemins | |
0 | 743 |
582 | 744 isr_divemode_1sec2a: |
745 btfss FLAG_apnoe_mode ; Are we in Apnoe mode? | |
746 return ; No | |
747 | |
748 incf apnoe_secs,F ; increase descent registers | |
749 movlw d'59' | |
750 cpfsgt apnoe_secs ; full minute? | |
751 return ; No | |
752 clrf apnoe_secs | |
753 incf apnoe_mins,F ; increase descent mins | |
754 return | |
0 | 755 |
756 ;============================================================================= | |
582 | 757 ; BCD to Binary conversion. |
0 | 758 ; Input: isr1_temp = Value in BCD |
759 ; Output WREG = value in binary. | |
760 isr_rtcc_convert: | |
582 | 761 swapf isr1_temp, W |
762 andlw 0x0F ; W = tens | |
763 rlncf WREG, W ; W = 2*tens | |
764 subwf isr1_temp, F ; 16*tens + ones - 2*tens | |
765 subwf isr1_temp, F ; 14*tens + ones - 2*tens | |
766 subwf isr1_temp, W ; 12*tens + ones - 2*tens | |
767 return | |
0 | 768 |
769 ;============================================================================= | |
770 | |
582 | 771 isr_switch_right: |
772 bcf INTCON,INT0IE ; Disable INT0 | |
773 banksel common ; flag1 is in Bank1 | |
774 btfss flip_screen ; 180° flipped? | |
775 bsf switch_right ; Set flag | |
776 btfsc flip_screen ; 180° flipped? | |
777 bsf switch_left ; Set flag | |
778 bra isr_switch_common ; Continue... | |
0 | 779 |
582 | 780 isr_switch_left: |
781 bcf INTCON3,INT1IE ; Disable INT1 | |
782 banksel common ; flag1 is in Bank1 | |
783 btfss flip_screen ; 180° flipped? | |
784 bsf switch_left ; Set flag | |
785 btfsc flip_screen ; 180° flipped? | |
786 bsf switch_right ; Set flag | |
0 | 787 isr_switch_common: |
582 | 788 ; load timer1 for first press |
789 clrf TMR1L | |
790 movlw TMR1H_VALUE_FIRST ; in steps of 7,8125ms | |
791 movwf TMR1H | |
792 bsf T1CON,TMR1ON ; Start Timer 1 | |
793 banksel isr_backup ; Select Bank0 for ISR data. | |
794 bcf INTCON3,INT1IF ; Clear flag | |
795 bcf INTCON,INT0IF ; Clear flag | |
796 return | |
0 | 797 |
798 timer1int: | |
582 | 799 bcf PIR1,TMR1IF ; Clear flag |
800 banksel common ; flag1 is in Bank1 | |
801 bcf INTCON,INT0IF ; Clear flag | |
802 bcf INTCON3,INT1IF ; Clear flag | |
451 | 803 ; digital |
582 | 804 btfss switch_left1 ; Left button hold-down? |
805 bra timer1int_left ; Yes | |
806 btfss switch_right2 ; Right button hold-down? | |
807 bra timer1int_right ; Yes | |
808 | |
451 | 809 ; Analog |
582 | 810 btfsc analog_sw2_pressed ; Left button hold-down? |
811 bra timer1int_left ; Yes | |
812 btfsc analog_sw1_pressed ; Right button hold-down? | |
813 bra timer1int_right ; Yes | |
814 | |
815 ; No button hold-down, stop Timer 1 | |
816 bcf T1CON,TMR1ON ; Stop Timer 1 | |
817 bsf INTCON,INT0IE ; Enable INT0 | |
818 bsf INTCON3,INT1IE ; Enable INT1 | |
451 | 819 return |
0 | 820 |
821 timer1int_left: | |
582 | 822 btfss flip_screen ; 180° flipped? |
823 bsf switch_left ; (Re-)Set flag | |
824 btfsc flip_screen ; 180° flipped? | |
825 bsf switch_right ; (Re-)Set flag | |
826 bra timer1int_common ; Continue | |
0 | 827 timer1int_right: |
582 | 828 btfss flip_screen ; 180° flipped? |
829 bsf switch_right ; Set flag | |
830 btfsc flip_screen ; 180° flipped? | |
831 bsf switch_left ; Set flag | |
0 | 832 timer1int_common: |
582 | 833 ; load timer1 for next press |
834 clrf TMR1L | |
835 movlw TMR1H_VALUE_CONT ; Surface mode | |
836 btfsc divemode | |
837 movlw TMR1H_VALUE_CONT_DIVE ; Dive mode | |
838 movwf TMR1H | |
839 return ; Return from timer1int with timer1 kept running | |
0 | 840 |
841 ;============================================================================= | |
842 | |
582 | 843 check_nofly_desat_time: ; called every minute when not in divemode |
844 banksel int_O_desaturation_time | |
845 movf int_O_desaturation_time+0,W ; Is Desat null ? | |
846 iorwf int_O_desaturation_time+1,W | |
847 bz check_nofly_desat_time_1 ; yes... | |
0 | 848 |
582 | 849 ; int_O_desaturation_time is only computed while in start, surface mode, menue_tree or ghostwriter. |
850 ; So the ISR may clock surface_interval past the actual surface interval time. But TFT_surface_lastdive | |
851 ; will check int_O_desaturation_time and in case int_O_desaturation_time is zero it will not show | |
852 ; surface_interval but lastdive_time instead. So this glitch remains invisible. | |
0 | 853 |
147 | 854 ; Increase surface interval timer |
582 | 855 banksel common |
856 infsnz surface_interval+0,F | |
857 incf surface_interval+1,F | |
858 return ; Done | |
0 | 859 |
582 | 860 check_nofly_desat_time_1: |
861 banksel common | |
862 clrf surface_interval+0 | |
863 clrf surface_interval+1 ; Clear surface interval timer | |
864 return ; Done. | |
0 | 865 |
866 ;============================================================================= | |
867 | |
868 isr_restore_clock: | |
582 | 869 banksel isr_backup |
870 movlw d'1' | |
871 cpfseq speed_setting | |
872 bra isr_restore_speed2 | |
873 ; Reset to eco | |
874 movlw b'00000000' | |
875 movwf OSCTUNE ; 4x PLL Disable (Bit6) - only works with 8 or 16MHz (=32 or 64MHz) | |
876 movlw b'00110010' | |
877 movwf OSCCON ; 1MHz INTOSC | |
878 movlw T2CON_ECO | |
879 movwf T2CON | |
880 bra isr_restore_exit | |
0 | 881 isr_restore_speed2: |
582 | 882 movlw d'2' |
883 cpfseq speed_setting | |
884 bra isr_restore_speed3 | |
0 | 885 ; Reset to normal |
582 | 886 movlw b'01110010' |
887 movwf OSCCON ; 16MHz INTOSC | |
888 movlw b'00000000' | |
889 movwf OSCTUNE ; 4x PLL Disable (Bit6) - only works with 8 or 16MHz (=32 or 64MHz) | |
890 movlw T2CON_NORMAL | |
891 movwf T2CON | |
892 bra isr_restore_exit | |
0 | 893 |
894 isr_restore_speed3: | |
895 ; Reset to fastest | |
582 | 896 movlw b'01110010' ; 16MHz INTOSC |
897 movwf OSCCON | |
898 movlw b'01000000' | |
899 movwf OSCTUNE ; 4x PLL Enable (Bit6) - only works with 8 or 16MHz (=32 or 64MHz) | |
900 movlw T2CON_FASTEST | |
901 movwf T2CON | |
902 ;bra isr_restore_exit | |
903 | |
0 | 904 isr_restore_exit: |
582 | 905 btfss OSCCON,HFIOFS |
906 bra isr_restore_exit ; loop until PLL is stable | |
907 return | |
0 | 908 |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
909 |
582 | 910 restore_flash: ; Restore first flash page from eeprom |
911 banksel common | |
912 ; Start address in internal flash | |
913 movlw 0x00 | |
914 movwf TBLPTRL | |
915 movwf TBLPTRH | |
916 movwf TBLPTRU | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
917 |
582 | 918 movlw b'10010100' ; Setup erase |
919 rcall Write ; Write! | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
920 |
582 | 921 movlw .128 |
922 movwf lo ; Byte counter | |
923 clrf EEADR | |
924 movlw .3 | |
925 movwf EEADRH ; Setup backup address | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
926 |
582 | 927 TBLRD*- ; Dummy read to be in 128 byte block |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
928 restore_flash_loop: |
582 | 929 call read_eeprom |
930 incf EEADR,F | |
931 movff EEDATA,TABLAT ; put 1 byte | |
932 tblwt+* ; Table Write with Pre-Increment | |
933 decfsz lo,F ; 128byte done? | |
934 bra restore_flash_loop ; No | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
935 |
582 | 936 movlw b'10000100' ; Setup writes |
937 rcall Write ; Write! | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
938 |
582 | 939 reset ; Done, reset CPU |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
940 |
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
941 Write: |
582 | 942 movwf EECON1 ; Type of memory to write in |
943 movlw 0x55 | |
944 movwf EECON2 | |
945 movlw 0xAA | |
946 movwf EECON2 | |
947 bsf EECON1,WR ; Write | |
948 nop | |
949 nop | |
950 return | |
410
d3087a8ed7e1
BUGFIX: Fix rare issue after battery change (OSTC3 did not start properly)
heinrichsweikamp
parents:
378
diff
changeset
|
951 |
582 | 952 END |